1343044c4SJared McNeill /*- 2343044c4SJared McNeill * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 3343044c4SJared McNeill * All rights reserved. 4343044c4SJared McNeill * 5343044c4SJared McNeill * Redistribution and use in source and binary forms, with or without 6343044c4SJared McNeill * modification, are permitted provided that the following conditions 7343044c4SJared McNeill * are met: 8343044c4SJared McNeill * 1. Redistributions of source code must retain the above copyright 9343044c4SJared McNeill * notice, this list of conditions and the following disclaimer. 10343044c4SJared McNeill * 2. Redistributions in binary form must reproduce the above copyright 11343044c4SJared McNeill * notice, this list of conditions and the following disclaimer in the 12343044c4SJared McNeill * documentation and/or other materials provided with the distribution. 13343044c4SJared McNeill * 14343044c4SJared McNeill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15343044c4SJared McNeill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16343044c4SJared McNeill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17343044c4SJared McNeill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18343044c4SJared McNeill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19343044c4SJared McNeill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20343044c4SJared McNeill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21343044c4SJared McNeill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22343044c4SJared McNeill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23343044c4SJared McNeill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24343044c4SJared McNeill * SUCH DAMAGE. 25343044c4SJared McNeill * 26343044c4SJared McNeill * $FreeBSD$ 27343044c4SJared McNeill */ 28343044c4SJared McNeill 29343044c4SJared McNeill /* 30343044c4SJared McNeill * Allwinner thermal sensor controller 31343044c4SJared McNeill */ 32343044c4SJared McNeill 33343044c4SJared McNeill #include <sys/cdefs.h> 34343044c4SJared McNeill __FBSDID("$FreeBSD$"); 35343044c4SJared McNeill 36343044c4SJared McNeill #include <sys/param.h> 37343044c4SJared McNeill #include <sys/systm.h> 38343044c4SJared McNeill #include <sys/bus.h> 39343044c4SJared McNeill #include <sys/rman.h> 40343044c4SJared McNeill #include <sys/kernel.h> 41343044c4SJared McNeill #include <sys/sysctl.h> 42d69d5ab0SJared McNeill #include <sys/reboot.h> 43343044c4SJared McNeill #include <sys/module.h> 44343044c4SJared McNeill #include <machine/bus.h> 45343044c4SJared McNeill 46343044c4SJared McNeill #include <dev/ofw/ofw_bus.h> 47343044c4SJared McNeill #include <dev/ofw/ofw_bus_subr.h> 48343044c4SJared McNeill 49d69d5ab0SJared McNeill #include <dev/extres/clk/clk.h> 50d69d5ab0SJared McNeill #include <dev/extres/hwreset/hwreset.h> 51d69d5ab0SJared McNeill 52343044c4SJared McNeill #include <arm/allwinner/aw_sid.h> 53343044c4SJared McNeill 54343044c4SJared McNeill #define THS_CTRL0 0x00 55d69d5ab0SJared McNeill #define THS_CTRL1 0x04 56d69d5ab0SJared McNeill #define ADC_CALI_EN (1 << 17) 57343044c4SJared McNeill #define THS_CTRL2 0x40 58343044c4SJared McNeill #define SENSOR_ACQ1_SHIFT 16 59343044c4SJared McNeill #define SENSOR2_EN (1 << 2) 60343044c4SJared McNeill #define SENSOR1_EN (1 << 1) 61343044c4SJared McNeill #define SENSOR0_EN (1 << 0) 62343044c4SJared McNeill #define THS_INTC 0x44 63343044c4SJared McNeill #define THS_INTS 0x48 64d69d5ab0SJared McNeill #define THS2_DATA_IRQ_STS (1 << 10) 65d69d5ab0SJared McNeill #define THS1_DATA_IRQ_STS (1 << 9) 66d69d5ab0SJared McNeill #define THS0_DATA_IRQ_STS (1 << 8) 67d69d5ab0SJared McNeill #define SHUT_INT2_STS (1 << 6) 68d69d5ab0SJared McNeill #define SHUT_INT1_STS (1 << 5) 69d69d5ab0SJared McNeill #define SHUT_INT0_STS (1 << 4) 70d69d5ab0SJared McNeill #define ALARM_INT2_STS (1 << 2) 71d69d5ab0SJared McNeill #define ALARM_INT1_STS (1 << 1) 72d69d5ab0SJared McNeill #define ALARM_INT0_STS (1 << 0) 73343044c4SJared McNeill #define THS_FILTER 0x70 74343044c4SJared McNeill #define THS_CALIB0 0x74 75343044c4SJared McNeill #define THS_CALIB1 0x78 76343044c4SJared McNeill #define THS_DATA0 0x80 77343044c4SJared McNeill #define THS_DATA1 0x84 78343044c4SJared McNeill #define THS_DATA2 0x88 79343044c4SJared McNeill #define DATA_MASK 0xfff 80343044c4SJared McNeill 81d69d5ab0SJared McNeill #define A83T_ADC_ACQUIRE_TIME 0x17 82d69d5ab0SJared McNeill #define A83T_FILTER 0x4 83d69d5ab0SJared McNeill #define A83T_INTC 0x1000 84d69d5ab0SJared McNeill #define A83T_TEMP_BASE 2719000 854e7f43baSJared McNeill #define A83T_TEMP_MUL 1000 86d69d5ab0SJared McNeill #define A83T_TEMP_DIV 14186 87d69d5ab0SJared McNeill #define A83T_CLK_RATE 24000000 88d69d5ab0SJared McNeill 89d69d5ab0SJared McNeill #define A64_ADC_ACQUIRE_TIME 0x190 90d69d5ab0SJared McNeill #define A64_FILTER 0x6 91d69d5ab0SJared McNeill #define A64_INTC 0x18000 92d69d5ab0SJared McNeill #define A64_TEMP_BASE 2170000 934e7f43baSJared McNeill #define A64_TEMP_MUL 1000 94d69d5ab0SJared McNeill #define A64_TEMP_DIV 8560 95d69d5ab0SJared McNeill #define A64_CLK_RATE 4000000 96d69d5ab0SJared McNeill 974e7f43baSJared McNeill #define H3_ADC_ACQUIRE_TIME 0x3f 984e7f43baSJared McNeill #define H3_FILTER 0x6 994e7f43baSJared McNeill #define H3_INTC 0x191000 1004e7f43baSJared McNeill #define H3_TEMP_BASE 217000000 1014e7f43baSJared McNeill #define H3_TEMP_MUL 121168 1024e7f43baSJared McNeill #define H3_TEMP_DIV 1000000 1034e7f43baSJared McNeill #define H3_CLK_RATE 4000000 1044e7f43baSJared McNeill 105d69d5ab0SJared McNeill #define TEMP_C_TO_K 273 106343044c4SJared McNeill #define SENSOR_ENABLE_ALL (SENSOR0_EN|SENSOR1_EN|SENSOR2_EN) 107d69d5ab0SJared McNeill #define SHUT_INT_ALL (SHUT_INT0_STS|SHUT_INT1_STS|SHUT_INT2_STS) 108343044c4SJared McNeill 109d69d5ab0SJared McNeill #define MAX_SENSORS 3 110343044c4SJared McNeill 111d69d5ab0SJared McNeill struct aw_thermal_sensor { 112343044c4SJared McNeill const char *name; 113343044c4SJared McNeill const char *desc; 114343044c4SJared McNeill }; 115343044c4SJared McNeill 116d69d5ab0SJared McNeill struct aw_thermal_config { 117d69d5ab0SJared McNeill struct aw_thermal_sensor sensors[MAX_SENSORS]; 118d69d5ab0SJared McNeill int nsensors; 119d69d5ab0SJared McNeill uint64_t clk_rate; 120d69d5ab0SJared McNeill uint32_t adc_acquire_time; 121d69d5ab0SJared McNeill uint32_t filter; 122d69d5ab0SJared McNeill uint32_t intc; 1234e7f43baSJared McNeill int temp_base; 1244e7f43baSJared McNeill int temp_mul; 1254e7f43baSJared McNeill int temp_div; 1264e7f43baSJared McNeill int calib; 127d69d5ab0SJared McNeill }; 128d69d5ab0SJared McNeill 129d69d5ab0SJared McNeill static const struct aw_thermal_config a83t_config = { 130d69d5ab0SJared McNeill .nsensors = 3, 131d69d5ab0SJared McNeill .sensors = { 132d69d5ab0SJared McNeill [0] = { 133d69d5ab0SJared McNeill .name = "cluster0", 134d69d5ab0SJared McNeill .desc = "CPU cluster 0 temperature", 135d69d5ab0SJared McNeill }, 136d69d5ab0SJared McNeill [1] = { 137d69d5ab0SJared McNeill .name = "cluster1", 138d69d5ab0SJared McNeill .desc = "CPU cluster 1 temperature", 139d69d5ab0SJared McNeill }, 140d69d5ab0SJared McNeill [2] = { 141d69d5ab0SJared McNeill .name = "gpu", 142d69d5ab0SJared McNeill .desc = "GPU temperature", 143d69d5ab0SJared McNeill }, 144d69d5ab0SJared McNeill }, 145d69d5ab0SJared McNeill .clk_rate = A83T_CLK_RATE, 146d69d5ab0SJared McNeill .adc_acquire_time = A83T_ADC_ACQUIRE_TIME, 147d69d5ab0SJared McNeill .filter = A83T_FILTER, 148d69d5ab0SJared McNeill .intc = A83T_INTC, 149d69d5ab0SJared McNeill .temp_base = A83T_TEMP_BASE, 1504e7f43baSJared McNeill .temp_mul = A83T_TEMP_MUL, 151d69d5ab0SJared McNeill .temp_div = A83T_TEMP_DIV, 1524e7f43baSJared McNeill .calib = 1, 153d69d5ab0SJared McNeill }; 154d69d5ab0SJared McNeill 155d69d5ab0SJared McNeill static const struct aw_thermal_config a64_config = { 156d69d5ab0SJared McNeill .nsensors = 3, 157d69d5ab0SJared McNeill .sensors = { 158d69d5ab0SJared McNeill [0] = { 159d69d5ab0SJared McNeill .name = "cpu", 160d69d5ab0SJared McNeill .desc = "CPU temperature", 161d69d5ab0SJared McNeill }, 162d69d5ab0SJared McNeill [1] = { 163d69d5ab0SJared McNeill .name = "gpu1", 164d69d5ab0SJared McNeill .desc = "GPU temperature 1", 165d69d5ab0SJared McNeill }, 166d69d5ab0SJared McNeill [2] = { 167d69d5ab0SJared McNeill .name = "gpu2", 168d69d5ab0SJared McNeill .desc = "GPU temperature 2", 169d69d5ab0SJared McNeill }, 170d69d5ab0SJared McNeill }, 171d69d5ab0SJared McNeill .clk_rate = A64_CLK_RATE, 172d69d5ab0SJared McNeill .adc_acquire_time = A64_ADC_ACQUIRE_TIME, 173d69d5ab0SJared McNeill .filter = A64_FILTER, 174d69d5ab0SJared McNeill .intc = A64_INTC, 175d69d5ab0SJared McNeill .temp_base = A64_TEMP_BASE, 1764e7f43baSJared McNeill .temp_mul = A64_TEMP_MUL, 177d69d5ab0SJared McNeill .temp_div = A64_TEMP_DIV, 178343044c4SJared McNeill }; 179343044c4SJared McNeill 1804e7f43baSJared McNeill static const struct aw_thermal_config h3_config = { 1814e7f43baSJared McNeill .nsensors = 1, 1824e7f43baSJared McNeill .sensors = { 1834e7f43baSJared McNeill [0] = { 1844e7f43baSJared McNeill .name = "cpu", 1854e7f43baSJared McNeill .desc = "CPU temperature", 1864e7f43baSJared McNeill }, 1874e7f43baSJared McNeill }, 1884e7f43baSJared McNeill .clk_rate = H3_CLK_RATE, 1894e7f43baSJared McNeill .adc_acquire_time = H3_ADC_ACQUIRE_TIME, 1904e7f43baSJared McNeill .filter = H3_FILTER, 1914e7f43baSJared McNeill .intc = H3_INTC, 1924e7f43baSJared McNeill .temp_base = H3_TEMP_BASE, 1934e7f43baSJared McNeill .temp_mul = H3_TEMP_MUL, 1944e7f43baSJared McNeill .temp_div = H3_TEMP_DIV, 1954e7f43baSJared McNeill }; 1964e7f43baSJared McNeill 197343044c4SJared McNeill static struct ofw_compat_data compat_data[] = { 198d69d5ab0SJared McNeill { "allwinner,sun8i-a83t-ts", (uintptr_t)&a83t_config }, 1994e7f43baSJared McNeill { "allwinner,sun8i-h3-ts", (uintptr_t)&h3_config }, 200d69d5ab0SJared McNeill { "allwinner,sun50i-a64-ts", (uintptr_t)&a64_config }, 201343044c4SJared McNeill { NULL, (uintptr_t)NULL } 202343044c4SJared McNeill }; 203343044c4SJared McNeill 204343044c4SJared McNeill #define THS_CONF(d) \ 205343044c4SJared McNeill (void *)ofw_bus_search_compatible((d), compat_data)->ocd_data 206343044c4SJared McNeill 207343044c4SJared McNeill struct aw_thermal_softc { 208d69d5ab0SJared McNeill struct resource *res[2]; 209d69d5ab0SJared McNeill struct aw_thermal_config *conf; 210343044c4SJared McNeill }; 211343044c4SJared McNeill 212343044c4SJared McNeill static struct resource_spec aw_thermal_spec[] = { 213343044c4SJared McNeill { SYS_RES_MEMORY, 0, RF_ACTIVE }, 214d69d5ab0SJared McNeill { SYS_RES_IRQ, 0, RF_ACTIVE }, 215343044c4SJared McNeill { -1, 0 } 216343044c4SJared McNeill }; 217343044c4SJared McNeill 218d69d5ab0SJared McNeill #define RD4(sc, reg) bus_read_4((sc)->res[0], (reg)) 219d69d5ab0SJared McNeill #define WR4(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val)) 220343044c4SJared McNeill 221343044c4SJared McNeill static int 222343044c4SJared McNeill aw_thermal_init(struct aw_thermal_softc *sc) 223343044c4SJared McNeill { 224343044c4SJared McNeill uint32_t calib0, calib1; 225343044c4SJared McNeill int error; 226343044c4SJared McNeill 2274e7f43baSJared McNeill if (sc->conf->calib) { 228343044c4SJared McNeill /* Read calibration settings from SRAM */ 229343044c4SJared McNeill error = aw_sid_read_tscalib(&calib0, &calib1); 230343044c4SJared McNeill if (error != 0) 231343044c4SJared McNeill return (error); 232343044c4SJared McNeill 233343044c4SJared McNeill /* Write calibration settings to thermal controller */ 234343044c4SJared McNeill WR4(sc, THS_CALIB0, calib0); 235343044c4SJared McNeill WR4(sc, THS_CALIB1, calib1); 2364e7f43baSJared McNeill } 237343044c4SJared McNeill 238343044c4SJared McNeill /* Configure ADC acquire time (CLK_IN/(N+1)) and enable sensors */ 239d69d5ab0SJared McNeill WR4(sc, THS_CTRL1, ADC_CALI_EN); 240d69d5ab0SJared McNeill WR4(sc, THS_CTRL0, sc->conf->adc_acquire_time); 241d69d5ab0SJared McNeill WR4(sc, THS_CTRL2, sc->conf->adc_acquire_time << SENSOR_ACQ1_SHIFT); 242343044c4SJared McNeill 243343044c4SJared McNeill /* Enable average filter */ 244d69d5ab0SJared McNeill WR4(sc, THS_FILTER, sc->conf->filter); 245d69d5ab0SJared McNeill 246d69d5ab0SJared McNeill /* Enable interrupts */ 247d69d5ab0SJared McNeill WR4(sc, THS_INTS, RD4(sc, THS_INTS)); 248d69d5ab0SJared McNeill WR4(sc, THS_INTC, sc->conf->intc | SHUT_INT_ALL); 249d69d5ab0SJared McNeill 250d69d5ab0SJared McNeill /* Enable sensors */ 251d69d5ab0SJared McNeill WR4(sc, THS_CTRL2, RD4(sc, THS_CTRL2) | SENSOR_ENABLE_ALL); 252343044c4SJared McNeill 253343044c4SJared McNeill return (0); 254343044c4SJared McNeill } 255343044c4SJared McNeill 256343044c4SJared McNeill static int 257d69d5ab0SJared McNeill aw_thermal_reg_to_temp(struct aw_thermal_softc *sc, uint32_t val) 258343044c4SJared McNeill { 2594e7f43baSJared McNeill return ((sc->conf->temp_base - (val * sc->conf->temp_mul)) / 2604e7f43baSJared McNeill sc->conf->temp_div); 261d69d5ab0SJared McNeill } 262343044c4SJared McNeill 263d69d5ab0SJared McNeill static int 264d69d5ab0SJared McNeill aw_thermal_gettemp(struct aw_thermal_softc *sc, int sensor) 265d69d5ab0SJared McNeill { 266d69d5ab0SJared McNeill uint32_t val; 267d69d5ab0SJared McNeill 268d69d5ab0SJared McNeill val = RD4(sc, THS_DATA0 + (sensor * 4)); 269d69d5ab0SJared McNeill 270d69d5ab0SJared McNeill return (aw_thermal_reg_to_temp(sc, val) + TEMP_C_TO_K); 271343044c4SJared McNeill } 272343044c4SJared McNeill 273343044c4SJared McNeill static int 274343044c4SJared McNeill aw_thermal_sysctl(SYSCTL_HANDLER_ARGS) 275343044c4SJared McNeill { 276343044c4SJared McNeill struct aw_thermal_softc *sc; 277d69d5ab0SJared McNeill int sensor, val; 278343044c4SJared McNeill 279343044c4SJared McNeill sc = arg1; 280343044c4SJared McNeill sensor = arg2; 281343044c4SJared McNeill 282d69d5ab0SJared McNeill val = aw_thermal_gettemp(sc, sensor); 283343044c4SJared McNeill 284343044c4SJared McNeill return sysctl_handle_opaque(oidp, &val, sizeof(val), req); 285343044c4SJared McNeill } 286343044c4SJared McNeill 287d69d5ab0SJared McNeill static void 288d69d5ab0SJared McNeill aw_thermal_intr(void *arg) 289d69d5ab0SJared McNeill { 290d69d5ab0SJared McNeill struct aw_thermal_softc *sc; 291d69d5ab0SJared McNeill device_t dev; 292d69d5ab0SJared McNeill uint32_t ints; 293d69d5ab0SJared McNeill 294d69d5ab0SJared McNeill dev = arg; 295d69d5ab0SJared McNeill sc = device_get_softc(dev); 296d69d5ab0SJared McNeill 297d69d5ab0SJared McNeill ints = RD4(sc, THS_INTS); 298d69d5ab0SJared McNeill WR4(sc, THS_INTS, ints); 299d69d5ab0SJared McNeill 300d69d5ab0SJared McNeill if ((ints & SHUT_INT_ALL) != 0) { 301d69d5ab0SJared McNeill device_printf(dev, 302d69d5ab0SJared McNeill "WARNING - current temperature exceeds safe limits\n"); 303d69d5ab0SJared McNeill shutdown_nice(RB_POWEROFF); 304d69d5ab0SJared McNeill } 305d69d5ab0SJared McNeill } 306d69d5ab0SJared McNeill 307343044c4SJared McNeill static int 308343044c4SJared McNeill aw_thermal_probe(device_t dev) 309343044c4SJared McNeill { 310343044c4SJared McNeill if (!ofw_bus_status_okay(dev)) 311343044c4SJared McNeill return (ENXIO); 312343044c4SJared McNeill 313343044c4SJared McNeill if (THS_CONF(dev) == NULL) 314343044c4SJared McNeill return (ENXIO); 315343044c4SJared McNeill 316343044c4SJared McNeill device_set_desc(dev, "Allwinner Thermal Sensor Controller"); 317343044c4SJared McNeill return (BUS_PROBE_DEFAULT); 318343044c4SJared McNeill } 319343044c4SJared McNeill 320343044c4SJared McNeill static int 321343044c4SJared McNeill aw_thermal_attach(device_t dev) 322343044c4SJared McNeill { 323343044c4SJared McNeill struct aw_thermal_softc *sc; 324d69d5ab0SJared McNeill clk_t clk_ahb, clk_ths; 325d69d5ab0SJared McNeill hwreset_t rst; 326d69d5ab0SJared McNeill int i, error; 327d69d5ab0SJared McNeill void *ih; 328343044c4SJared McNeill 329343044c4SJared McNeill sc = device_get_softc(dev); 330d69d5ab0SJared McNeill clk_ahb = clk_ths = NULL; 331d69d5ab0SJared McNeill rst = NULL; 332d69d5ab0SJared McNeill ih = NULL; 333343044c4SJared McNeill 334343044c4SJared McNeill sc->conf = THS_CONF(dev); 335343044c4SJared McNeill 336d69d5ab0SJared McNeill if (bus_alloc_resources(dev, aw_thermal_spec, sc->res) != 0) { 337343044c4SJared McNeill device_printf(dev, "cannot allocate resources for device\n"); 338343044c4SJared McNeill return (ENXIO); 339343044c4SJared McNeill } 340343044c4SJared McNeill 341d69d5ab0SJared McNeill if (clk_get_by_ofw_name(dev, 0, "ahb", &clk_ahb) == 0) { 342d69d5ab0SJared McNeill error = clk_enable(clk_ahb); 343d69d5ab0SJared McNeill if (error != 0) { 344d69d5ab0SJared McNeill device_printf(dev, "cannot enable ahb clock\n"); 345d69d5ab0SJared McNeill goto fail; 346d69d5ab0SJared McNeill } 347d69d5ab0SJared McNeill } 348d69d5ab0SJared McNeill if (clk_get_by_ofw_name(dev, 0, "ths", &clk_ths) == 0) { 349d69d5ab0SJared McNeill error = clk_set_freq(clk_ths, sc->conf->clk_rate, 0); 350d69d5ab0SJared McNeill if (error != 0) { 351d69d5ab0SJared McNeill device_printf(dev, "cannot set ths clock rate\n"); 352d69d5ab0SJared McNeill goto fail; 353d69d5ab0SJared McNeill } 354d69d5ab0SJared McNeill error = clk_enable(clk_ths); 355d69d5ab0SJared McNeill if (error != 0) { 356d69d5ab0SJared McNeill device_printf(dev, "cannot enable ths clock\n"); 357d69d5ab0SJared McNeill goto fail; 358d69d5ab0SJared McNeill } 359d69d5ab0SJared McNeill } 360d69d5ab0SJared McNeill if (hwreset_get_by_ofw_idx(dev, 0, 0, &rst) == 0) { 361d69d5ab0SJared McNeill error = hwreset_deassert(rst); 362d69d5ab0SJared McNeill if (error != 0) { 363d69d5ab0SJared McNeill device_printf(dev, "cannot de-assert reset\n"); 364d69d5ab0SJared McNeill goto fail; 365d69d5ab0SJared McNeill } 366d69d5ab0SJared McNeill } 367343044c4SJared McNeill 368d69d5ab0SJared McNeill error = bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE, 369d69d5ab0SJared McNeill NULL, aw_thermal_intr, dev, &ih); 370d69d5ab0SJared McNeill if (error != 0) { 371d69d5ab0SJared McNeill device_printf(dev, "cannot setup interrupt handler\n"); 372d69d5ab0SJared McNeill goto fail; 373d69d5ab0SJared McNeill } 374d69d5ab0SJared McNeill 375d69d5ab0SJared McNeill if (aw_thermal_init(sc) != 0) 376d69d5ab0SJared McNeill goto fail; 377d69d5ab0SJared McNeill 378d69d5ab0SJared McNeill for (i = 0; i < sc->conf->nsensors; i++) 379343044c4SJared McNeill SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 380343044c4SJared McNeill SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 381d69d5ab0SJared McNeill OID_AUTO, sc->conf->sensors[i].name, 382343044c4SJared McNeill CTLTYPE_INT | CTLFLAG_RD, 383d69d5ab0SJared McNeill sc, i, aw_thermal_sysctl, "IK0", 384d69d5ab0SJared McNeill sc->conf->sensors[i].desc); 385343044c4SJared McNeill 386343044c4SJared McNeill return (0); 387d69d5ab0SJared McNeill 388d69d5ab0SJared McNeill fail: 389d69d5ab0SJared McNeill if (ih != NULL) 390d69d5ab0SJared McNeill bus_teardown_intr(dev, sc->res[1], ih); 391d69d5ab0SJared McNeill if (rst != NULL) 392d69d5ab0SJared McNeill hwreset_release(rst); 393d69d5ab0SJared McNeill if (clk_ahb != NULL) 394d69d5ab0SJared McNeill clk_release(clk_ahb); 395d69d5ab0SJared McNeill if (clk_ths != NULL) 396d69d5ab0SJared McNeill clk_release(clk_ths); 397d69d5ab0SJared McNeill bus_release_resources(dev, aw_thermal_spec, sc->res); 398d69d5ab0SJared McNeill 399d69d5ab0SJared McNeill return (ENXIO); 400343044c4SJared McNeill } 401343044c4SJared McNeill 402343044c4SJared McNeill static device_method_t aw_thermal_methods[] = { 403343044c4SJared McNeill /* Device interface */ 404343044c4SJared McNeill DEVMETHOD(device_probe, aw_thermal_probe), 405343044c4SJared McNeill DEVMETHOD(device_attach, aw_thermal_attach), 406343044c4SJared McNeill 407343044c4SJared McNeill DEVMETHOD_END 408343044c4SJared McNeill }; 409343044c4SJared McNeill 410343044c4SJared McNeill static driver_t aw_thermal_driver = { 411343044c4SJared McNeill "aw_thermal", 412343044c4SJared McNeill aw_thermal_methods, 413343044c4SJared McNeill sizeof(struct aw_thermal_softc), 414343044c4SJared McNeill }; 415343044c4SJared McNeill 416343044c4SJared McNeill static devclass_t aw_thermal_devclass; 417343044c4SJared McNeill 418343044c4SJared McNeill DRIVER_MODULE(aw_thermal, simplebus, aw_thermal_driver, aw_thermal_devclass, 419343044c4SJared McNeill 0, 0); 420343044c4SJared McNeill MODULE_VERSION(aw_thermal, 1); 421