1343044c4SJared McNeill /*-
2343044c4SJared McNeill * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
3343044c4SJared McNeill *
4343044c4SJared McNeill * Redistribution and use in source and binary forms, with or without
5343044c4SJared McNeill * modification, are permitted provided that the following conditions
6343044c4SJared McNeill * are met:
7343044c4SJared McNeill * 1. Redistributions of source code must retain the above copyright
8343044c4SJared McNeill * notice, this list of conditions and the following disclaimer.
9343044c4SJared McNeill * 2. Redistributions in binary form must reproduce the above copyright
10343044c4SJared McNeill * notice, this list of conditions and the following disclaimer in the
11343044c4SJared McNeill * documentation and/or other materials provided with the distribution.
12343044c4SJared McNeill *
13343044c4SJared McNeill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14343044c4SJared McNeill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15343044c4SJared McNeill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16343044c4SJared McNeill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17343044c4SJared McNeill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
18343044c4SJared McNeill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
19343044c4SJared McNeill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
20343044c4SJared McNeill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
21343044c4SJared McNeill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22343044c4SJared McNeill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23343044c4SJared McNeill * SUCH DAMAGE.
24343044c4SJared McNeill */
25343044c4SJared McNeill
26343044c4SJared McNeill /*
27343044c4SJared McNeill * Allwinner thermal sensor controller
28343044c4SJared McNeill */
29343044c4SJared McNeill
30343044c4SJared McNeill #include <sys/param.h>
31343044c4SJared McNeill #include <sys/systm.h>
32e2e050c8SConrad Meyer #include <sys/eventhandler.h>
33343044c4SJared McNeill #include <sys/bus.h>
34343044c4SJared McNeill #include <sys/rman.h>
35343044c4SJared McNeill #include <sys/kernel.h>
36343044c4SJared McNeill #include <sys/sysctl.h>
37d69d5ab0SJared McNeill #include <sys/reboot.h>
38343044c4SJared McNeill #include <sys/module.h>
393c2b90f1SJared McNeill #include <sys/cpu.h>
402e4f9347SJared McNeill #include <sys/taskqueue.h>
41343044c4SJared McNeill #include <machine/bus.h>
42343044c4SJared McNeill
43343044c4SJared McNeill #include <dev/ofw/ofw_bus.h>
44343044c4SJared McNeill #include <dev/ofw/ofw_bus_subr.h>
45343044c4SJared McNeill
46be82b3a0SEmmanuel Vadot #include <dev/clk/clk.h>
471f469a9fSEmmanuel Vadot #include <dev/hwreset/hwreset.h>
48e51b3d8eSEmmanuel Vadot #include <dev/nvmem/nvmem.h>
49d69d5ab0SJared McNeill
50343044c4SJared McNeill #include <arm/allwinner/aw_sid.h>
51343044c4SJared McNeill
523c2b90f1SJared McNeill #include "cpufreq_if.h"
5397eb836fSEmmanuel Vadot #include "nvmem_if.h"
543c2b90f1SJared McNeill
55343044c4SJared McNeill #define THS_CTRL0 0x00
56d69d5ab0SJared McNeill #define THS_CTRL1 0x04
57d69d5ab0SJared McNeill #define ADC_CALI_EN (1 << 17)
58343044c4SJared McNeill #define THS_CTRL2 0x40
59343044c4SJared McNeill #define SENSOR_ACQ1_SHIFT 16
60343044c4SJared McNeill #define SENSOR2_EN (1 << 2)
61343044c4SJared McNeill #define SENSOR1_EN (1 << 1)
62343044c4SJared McNeill #define SENSOR0_EN (1 << 0)
63343044c4SJared McNeill #define THS_INTC 0x44
64d19afc9aSEmmanuel Vadot #define THS_THERMAL_PER_SHIFT 12
65343044c4SJared McNeill #define THS_INTS 0x48
66d69d5ab0SJared McNeill #define THS2_DATA_IRQ_STS (1 << 10)
67d69d5ab0SJared McNeill #define THS1_DATA_IRQ_STS (1 << 9)
68d69d5ab0SJared McNeill #define THS0_DATA_IRQ_STS (1 << 8)
69d69d5ab0SJared McNeill #define SHUT_INT2_STS (1 << 6)
70d69d5ab0SJared McNeill #define SHUT_INT1_STS (1 << 5)
71d69d5ab0SJared McNeill #define SHUT_INT0_STS (1 << 4)
72d69d5ab0SJared McNeill #define ALARM_INT2_STS (1 << 2)
73d69d5ab0SJared McNeill #define ALARM_INT1_STS (1 << 1)
74d69d5ab0SJared McNeill #define ALARM_INT0_STS (1 << 0)
753c2b90f1SJared McNeill #define THS_ALARM0_CTRL 0x50
763c2b90f1SJared McNeill #define ALARM_T_HOT_MASK 0xfff
773c2b90f1SJared McNeill #define ALARM_T_HOT_SHIFT 16
783c2b90f1SJared McNeill #define ALARM_T_HYST_MASK 0xfff
793c2b90f1SJared McNeill #define ALARM_T_HYST_SHIFT 0
803c2b90f1SJared McNeill #define THS_SHUTDOWN0_CTRL 0x60
813c2b90f1SJared McNeill #define SHUT_T_HOT_MASK 0xfff
823c2b90f1SJared McNeill #define SHUT_T_HOT_SHIFT 16
83343044c4SJared McNeill #define THS_FILTER 0x70
84343044c4SJared McNeill #define THS_CALIB0 0x74
85343044c4SJared McNeill #define THS_CALIB1 0x78
86343044c4SJared McNeill #define THS_DATA0 0x80
87343044c4SJared McNeill #define THS_DATA1 0x84
88343044c4SJared McNeill #define THS_DATA2 0x88
89343044c4SJared McNeill #define DATA_MASK 0xfff
90343044c4SJared McNeill
91d19afc9aSEmmanuel Vadot #define A83T_CLK_RATE 24000000
92d19afc9aSEmmanuel Vadot #define A83T_ADC_ACQUIRE_TIME 23 /* 24Mhz/(23 + 1) = 1us */
93d19afc9aSEmmanuel Vadot #define A83T_THERMAL_PER 1 /* 4096 * (1 + 1) / 24Mhz = 341 us */
94d19afc9aSEmmanuel Vadot #define A83T_FILTER 0x5 /* Filter enabled, avg of 4 */
95d69d5ab0SJared McNeill #define A83T_TEMP_BASE 2719000
964e7f43baSJared McNeill #define A83T_TEMP_MUL 1000
97d69d5ab0SJared McNeill #define A83T_TEMP_DIV 14186
98d69d5ab0SJared McNeill
99d19afc9aSEmmanuel Vadot #define A64_CLK_RATE 4000000
100d19afc9aSEmmanuel Vadot #define A64_ADC_ACQUIRE_TIME 400 /* 4Mhz/(400 + 1) = 100 us */
101d19afc9aSEmmanuel Vadot #define A64_THERMAL_PER 24 /* 4096 * (24 + 1) / 4Mhz = 25.6 ms */
102d19afc9aSEmmanuel Vadot #define A64_FILTER 0x6 /* Filter enabled, avg of 8 */
103d69d5ab0SJared McNeill #define A64_TEMP_BASE 2170000
1044e7f43baSJared McNeill #define A64_TEMP_MUL 1000
105d69d5ab0SJared McNeill #define A64_TEMP_DIV 8560
106d69d5ab0SJared McNeill
107d19afc9aSEmmanuel Vadot #define H3_CLK_RATE 4000000
1084e7f43baSJared McNeill #define H3_ADC_ACQUIRE_TIME 0x3f
109d19afc9aSEmmanuel Vadot #define H3_THERMAL_PER 401
110d19afc9aSEmmanuel Vadot #define H3_FILTER 0x6 /* Filter enabled, avg of 8 */
1110a30b4b2SJared McNeill #define H3_TEMP_BASE 217
1123c2b90f1SJared McNeill #define H3_TEMP_MUL 1000
1130a30b4b2SJared McNeill #define H3_TEMP_DIV 8253
1140a30b4b2SJared McNeill #define H3_TEMP_MINUS 1794000
1150a30b4b2SJared McNeill #define H3_INIT_ALARM 90 /* degC */
1160a30b4b2SJared McNeill #define H3_INIT_SHUT 105 /* degC */
1174e7f43baSJared McNeill
118d19afc9aSEmmanuel Vadot #define H5_CLK_RATE 24000000
119d19afc9aSEmmanuel Vadot #define H5_ADC_ACQUIRE_TIME 479 /* 24Mhz/479 = 20us */
120d19afc9aSEmmanuel Vadot #define H5_THERMAL_PER 58 /* 4096 * (58 + 1) / 24Mhz = 10ms */
121d19afc9aSEmmanuel Vadot #define H5_FILTER 0x6 /* Filter enabled, avg of 8 */
122d19afc9aSEmmanuel Vadot #define H5_TEMP_BASE 233832448
123d19afc9aSEmmanuel Vadot #define H5_TEMP_MUL 124885
124d19afc9aSEmmanuel Vadot #define H5_TEMP_DIV 20
125d19afc9aSEmmanuel Vadot #define H5_TEMP_BASE_CPU 271581184
126d19afc9aSEmmanuel Vadot #define H5_TEMP_MUL_CPU 152253
127d19afc9aSEmmanuel Vadot #define H5_TEMP_BASE_GPU 289406976
128d19afc9aSEmmanuel Vadot #define H5_TEMP_MUL_GPU 166724
129d19afc9aSEmmanuel Vadot #define H5_INIT_CPU_ALARM 80 /* degC */
130d19afc9aSEmmanuel Vadot #define H5_INIT_CPU_SHUT 96 /* degC */
131d19afc9aSEmmanuel Vadot #define H5_INIT_GPU_ALARM 84 /* degC */
132d19afc9aSEmmanuel Vadot #define H5_INIT_GPU_SHUT 100 /* degC */
133d19afc9aSEmmanuel Vadot
134d69d5ab0SJared McNeill #define TEMP_C_TO_K 273
135343044c4SJared McNeill #define SENSOR_ENABLE_ALL (SENSOR0_EN|SENSOR1_EN|SENSOR2_EN)
136d69d5ab0SJared McNeill #define SHUT_INT_ALL (SHUT_INT0_STS|SHUT_INT1_STS|SHUT_INT2_STS)
1373c2b90f1SJared McNeill #define ALARM_INT_ALL (ALARM_INT0_STS)
138343044c4SJared McNeill
139d69d5ab0SJared McNeill #define MAX_SENSORS 3
1403c2b90f1SJared McNeill #define MAX_CF_LEVELS 64
1413c2b90f1SJared McNeill
1423c2b90f1SJared McNeill #define THROTTLE_ENABLE_DEFAULT 1
1433c2b90f1SJared McNeill
1443c2b90f1SJared McNeill /* Enable thermal throttling */
1453c2b90f1SJared McNeill static int aw_thermal_throttle_enable = THROTTLE_ENABLE_DEFAULT;
1463c2b90f1SJared McNeill TUNABLE_INT("hw.aw_thermal.throttle_enable", &aw_thermal_throttle_enable);
147343044c4SJared McNeill
148d69d5ab0SJared McNeill struct aw_thermal_sensor {
149343044c4SJared McNeill const char *name;
150343044c4SJared McNeill const char *desc;
1510a30b4b2SJared McNeill int init_alarm;
1520a30b4b2SJared McNeill int init_shut;
153343044c4SJared McNeill };
154343044c4SJared McNeill
155d69d5ab0SJared McNeill struct aw_thermal_config {
156d69d5ab0SJared McNeill struct aw_thermal_sensor sensors[MAX_SENSORS];
157d69d5ab0SJared McNeill int nsensors;
158d69d5ab0SJared McNeill uint64_t clk_rate;
159d69d5ab0SJared McNeill uint32_t adc_acquire_time;
1603c2b90f1SJared McNeill int adc_cali_en;
161d69d5ab0SJared McNeill uint32_t filter;
162d19afc9aSEmmanuel Vadot uint32_t thermal_per;
163d19afc9aSEmmanuel Vadot int (*to_temp)(uint32_t, int);
164d19afc9aSEmmanuel Vadot uint32_t (*to_reg)(int, int);
1654e7f43baSJared McNeill int temp_base;
1664e7f43baSJared McNeill int temp_mul;
1674e7f43baSJared McNeill int temp_div;
1683c2b90f1SJared McNeill int calib0, calib1;
1693c2b90f1SJared McNeill uint32_t calib0_mask, calib1_mask;
170d69d5ab0SJared McNeill };
171d69d5ab0SJared McNeill
1723c2b90f1SJared McNeill static int
a83t_to_temp(uint32_t val,int sensor)173d19afc9aSEmmanuel Vadot a83t_to_temp(uint32_t val, int sensor)
1743c2b90f1SJared McNeill {
1753c2b90f1SJared McNeill return ((A83T_TEMP_BASE - (val * A83T_TEMP_MUL)) / A83T_TEMP_DIV);
1763c2b90f1SJared McNeill }
1773c2b90f1SJared McNeill
178d69d5ab0SJared McNeill static const struct aw_thermal_config a83t_config = {
179d69d5ab0SJared McNeill .nsensors = 3,
180d69d5ab0SJared McNeill .sensors = {
181d69d5ab0SJared McNeill [0] = {
182d69d5ab0SJared McNeill .name = "cluster0",
183d69d5ab0SJared McNeill .desc = "CPU cluster 0 temperature",
184d69d5ab0SJared McNeill },
185d69d5ab0SJared McNeill [1] = {
186d69d5ab0SJared McNeill .name = "cluster1",
187d69d5ab0SJared McNeill .desc = "CPU cluster 1 temperature",
188d69d5ab0SJared McNeill },
189d69d5ab0SJared McNeill [2] = {
190d69d5ab0SJared McNeill .name = "gpu",
191d69d5ab0SJared McNeill .desc = "GPU temperature",
192d69d5ab0SJared McNeill },
193d69d5ab0SJared McNeill },
194d69d5ab0SJared McNeill .clk_rate = A83T_CLK_RATE,
195d69d5ab0SJared McNeill .adc_acquire_time = A83T_ADC_ACQUIRE_TIME,
1963c2b90f1SJared McNeill .adc_cali_en = 1,
197d69d5ab0SJared McNeill .filter = A83T_FILTER,
198d19afc9aSEmmanuel Vadot .thermal_per = A83T_THERMAL_PER,
1993c2b90f1SJared McNeill .to_temp = a83t_to_temp,
2003c2b90f1SJared McNeill .calib0_mask = 0xffffffff,
201d19afc9aSEmmanuel Vadot .calib1_mask = 0xffff,
202d69d5ab0SJared McNeill };
203d69d5ab0SJared McNeill
2043c2b90f1SJared McNeill static int
a64_to_temp(uint32_t val,int sensor)205d19afc9aSEmmanuel Vadot a64_to_temp(uint32_t val, int sensor)
2063c2b90f1SJared McNeill {
2073c2b90f1SJared McNeill return ((A64_TEMP_BASE - (val * A64_TEMP_MUL)) / A64_TEMP_DIV);
2083c2b90f1SJared McNeill }
2093c2b90f1SJared McNeill
210d69d5ab0SJared McNeill static const struct aw_thermal_config a64_config = {
211d69d5ab0SJared McNeill .nsensors = 3,
212d69d5ab0SJared McNeill .sensors = {
213d69d5ab0SJared McNeill [0] = {
214d69d5ab0SJared McNeill .name = "cpu",
215d69d5ab0SJared McNeill .desc = "CPU temperature",
216d69d5ab0SJared McNeill },
217d69d5ab0SJared McNeill [1] = {
218d69d5ab0SJared McNeill .name = "gpu1",
219d69d5ab0SJared McNeill .desc = "GPU temperature 1",
220d69d5ab0SJared McNeill },
221d69d5ab0SJared McNeill [2] = {
222d69d5ab0SJared McNeill .name = "gpu2",
223d69d5ab0SJared McNeill .desc = "GPU temperature 2",
224d69d5ab0SJared McNeill },
225d69d5ab0SJared McNeill },
226d69d5ab0SJared McNeill .clk_rate = A64_CLK_RATE,
227d69d5ab0SJared McNeill .adc_acquire_time = A64_ADC_ACQUIRE_TIME,
228d19afc9aSEmmanuel Vadot .adc_cali_en = 1,
229d69d5ab0SJared McNeill .filter = A64_FILTER,
230d19afc9aSEmmanuel Vadot .thermal_per = A64_THERMAL_PER,
2313c2b90f1SJared McNeill .to_temp = a64_to_temp,
232d19afc9aSEmmanuel Vadot .calib0_mask = 0xffffffff,
233d19afc9aSEmmanuel Vadot .calib1_mask = 0xffff,
234343044c4SJared McNeill };
235343044c4SJared McNeill
2363c2b90f1SJared McNeill static int
h3_to_temp(uint32_t val,int sensor)237d19afc9aSEmmanuel Vadot h3_to_temp(uint32_t val, int sensor)
2383c2b90f1SJared McNeill {
2390a30b4b2SJared McNeill return (H3_TEMP_BASE - ((val * H3_TEMP_MUL) / H3_TEMP_DIV));
2400a30b4b2SJared McNeill }
2410a30b4b2SJared McNeill
2420a30b4b2SJared McNeill static uint32_t
h3_to_reg(int val,int sensor)243d19afc9aSEmmanuel Vadot h3_to_reg(int val, int sensor)
2440a30b4b2SJared McNeill {
2450a30b4b2SJared McNeill return ((H3_TEMP_MINUS - (val * H3_TEMP_DIV)) / H3_TEMP_MUL);
2463c2b90f1SJared McNeill }
2473c2b90f1SJared McNeill
2484e7f43baSJared McNeill static const struct aw_thermal_config h3_config = {
2494e7f43baSJared McNeill .nsensors = 1,
2504e7f43baSJared McNeill .sensors = {
2514e7f43baSJared McNeill [0] = {
2524e7f43baSJared McNeill .name = "cpu",
2534e7f43baSJared McNeill .desc = "CPU temperature",
2540a30b4b2SJared McNeill .init_alarm = H3_INIT_ALARM,
2550a30b4b2SJared McNeill .init_shut = H3_INIT_SHUT,
2564e7f43baSJared McNeill },
2574e7f43baSJared McNeill },
2584e7f43baSJared McNeill .clk_rate = H3_CLK_RATE,
2594e7f43baSJared McNeill .adc_acquire_time = H3_ADC_ACQUIRE_TIME,
260d19afc9aSEmmanuel Vadot .adc_cali_en = 1,
2614e7f43baSJared McNeill .filter = H3_FILTER,
262d19afc9aSEmmanuel Vadot .thermal_per = H3_THERMAL_PER,
2633c2b90f1SJared McNeill .to_temp = h3_to_temp,
2640a30b4b2SJared McNeill .to_reg = h3_to_reg,
265d6b44474SEmmanuel Vadot .calib0_mask = 0xffffffff,
266d19afc9aSEmmanuel Vadot };
267d19afc9aSEmmanuel Vadot
268d19afc9aSEmmanuel Vadot static int
h5_to_temp(uint32_t val,int sensor)269d19afc9aSEmmanuel Vadot h5_to_temp(uint32_t val, int sensor)
270d19afc9aSEmmanuel Vadot {
271d19afc9aSEmmanuel Vadot int tmp;
272d19afc9aSEmmanuel Vadot
273d19afc9aSEmmanuel Vadot /* Temp is lower than 70 degrees */
274d19afc9aSEmmanuel Vadot if (val > 0x500) {
275d19afc9aSEmmanuel Vadot tmp = H5_TEMP_BASE - (val * H5_TEMP_MUL);
276d19afc9aSEmmanuel Vadot tmp >>= H5_TEMP_DIV;
277d19afc9aSEmmanuel Vadot return (tmp);
278d19afc9aSEmmanuel Vadot }
279d19afc9aSEmmanuel Vadot
280d19afc9aSEmmanuel Vadot if (sensor == 0)
281d19afc9aSEmmanuel Vadot tmp = H5_TEMP_BASE_CPU - (val * H5_TEMP_MUL_CPU);
282d19afc9aSEmmanuel Vadot else if (sensor == 1)
283d19afc9aSEmmanuel Vadot tmp = H5_TEMP_BASE_GPU - (val * H5_TEMP_MUL_GPU);
284d19afc9aSEmmanuel Vadot else {
285d19afc9aSEmmanuel Vadot printf("Unknown sensor %d\n", sensor);
286d19afc9aSEmmanuel Vadot return (val);
287d19afc9aSEmmanuel Vadot }
288d19afc9aSEmmanuel Vadot
289d19afc9aSEmmanuel Vadot tmp >>= H5_TEMP_DIV;
290d19afc9aSEmmanuel Vadot return (tmp);
291d19afc9aSEmmanuel Vadot }
292d19afc9aSEmmanuel Vadot
293d19afc9aSEmmanuel Vadot static uint32_t
h5_to_reg(int val,int sensor)294d19afc9aSEmmanuel Vadot h5_to_reg(int val, int sensor)
295d19afc9aSEmmanuel Vadot {
296d19afc9aSEmmanuel Vadot int tmp;
297d19afc9aSEmmanuel Vadot
298d19afc9aSEmmanuel Vadot if (val < 70) {
299d19afc9aSEmmanuel Vadot tmp = H5_TEMP_BASE - (val << H5_TEMP_DIV);
300d19afc9aSEmmanuel Vadot tmp /= H5_TEMP_MUL;
301d19afc9aSEmmanuel Vadot } else {
302d19afc9aSEmmanuel Vadot if (sensor == 0) {
303d19afc9aSEmmanuel Vadot tmp = H5_TEMP_BASE_CPU - (val << H5_TEMP_DIV);
304d19afc9aSEmmanuel Vadot tmp /= H5_TEMP_MUL_CPU;
305d19afc9aSEmmanuel Vadot } else if (sensor == 1) {
306d19afc9aSEmmanuel Vadot tmp = H5_TEMP_BASE_GPU - (val << H5_TEMP_DIV);
307d19afc9aSEmmanuel Vadot tmp /= H5_TEMP_MUL_GPU;
308d19afc9aSEmmanuel Vadot } else {
309d19afc9aSEmmanuel Vadot printf("Unknown sensor %d\n", sensor);
310d19afc9aSEmmanuel Vadot return (val);
311d19afc9aSEmmanuel Vadot }
312d19afc9aSEmmanuel Vadot }
313d19afc9aSEmmanuel Vadot
314d19afc9aSEmmanuel Vadot return ((uint32_t)tmp);
315d19afc9aSEmmanuel Vadot }
316d19afc9aSEmmanuel Vadot
317d19afc9aSEmmanuel Vadot static const struct aw_thermal_config h5_config = {
318d19afc9aSEmmanuel Vadot .nsensors = 2,
319d19afc9aSEmmanuel Vadot .sensors = {
320d19afc9aSEmmanuel Vadot [0] = {
321d19afc9aSEmmanuel Vadot .name = "cpu",
322d19afc9aSEmmanuel Vadot .desc = "CPU temperature",
323d19afc9aSEmmanuel Vadot .init_alarm = H5_INIT_CPU_ALARM,
324d19afc9aSEmmanuel Vadot .init_shut = H5_INIT_CPU_SHUT,
325d19afc9aSEmmanuel Vadot },
326d19afc9aSEmmanuel Vadot [1] = {
327d19afc9aSEmmanuel Vadot .name = "gpu",
328d19afc9aSEmmanuel Vadot .desc = "GPU temperature",
329d19afc9aSEmmanuel Vadot .init_alarm = H5_INIT_GPU_ALARM,
330d19afc9aSEmmanuel Vadot .init_shut = H5_INIT_GPU_SHUT,
331d19afc9aSEmmanuel Vadot },
332d19afc9aSEmmanuel Vadot },
333d19afc9aSEmmanuel Vadot .clk_rate = H5_CLK_RATE,
334d19afc9aSEmmanuel Vadot .adc_acquire_time = H5_ADC_ACQUIRE_TIME,
335d19afc9aSEmmanuel Vadot .filter = H5_FILTER,
336d19afc9aSEmmanuel Vadot .thermal_per = H5_THERMAL_PER,
337d19afc9aSEmmanuel Vadot .to_temp = h5_to_temp,
338d19afc9aSEmmanuel Vadot .to_reg = h5_to_reg,
339d19afc9aSEmmanuel Vadot .calib0_mask = 0xffffffff,
3404e7f43baSJared McNeill };
3414e7f43baSJared McNeill
342343044c4SJared McNeill static struct ofw_compat_data compat_data[] = {
343d19afc9aSEmmanuel Vadot { "allwinner,sun8i-a83t-ths", (uintptr_t)&a83t_config },
344d19afc9aSEmmanuel Vadot { "allwinner,sun8i-h3-ths", (uintptr_t)&h3_config },
345d19afc9aSEmmanuel Vadot { "allwinner,sun50i-a64-ths", (uintptr_t)&a64_config },
346d19afc9aSEmmanuel Vadot { "allwinner,sun50i-h5-ths", (uintptr_t)&h5_config },
347343044c4SJared McNeill { NULL, (uintptr_t)NULL }
348343044c4SJared McNeill };
349343044c4SJared McNeill
350343044c4SJared McNeill #define THS_CONF(d) \
351343044c4SJared McNeill (void *)ofw_bus_search_compatible((d), compat_data)->ocd_data
352343044c4SJared McNeill
353343044c4SJared McNeill struct aw_thermal_softc {
3543c2b90f1SJared McNeill device_t dev;
355d69d5ab0SJared McNeill struct resource *res[2];
356d69d5ab0SJared McNeill struct aw_thermal_config *conf;
3573c2b90f1SJared McNeill
3582e4f9347SJared McNeill struct task cf_task;
3593c2b90f1SJared McNeill int throttle;
3603c2b90f1SJared McNeill int min_freq;
3613c2b90f1SJared McNeill struct cf_level levels[MAX_CF_LEVELS];
3623c2b90f1SJared McNeill eventhandler_tag cf_pre_tag;
363d19afc9aSEmmanuel Vadot
364d19afc9aSEmmanuel Vadot clk_t clk_apb;
365d19afc9aSEmmanuel Vadot clk_t clk_ths;
366343044c4SJared McNeill };
367343044c4SJared McNeill
368343044c4SJared McNeill static struct resource_spec aw_thermal_spec[] = {
369343044c4SJared McNeill { SYS_RES_MEMORY, 0, RF_ACTIVE },
370d69d5ab0SJared McNeill { SYS_RES_IRQ, 0, RF_ACTIVE },
371343044c4SJared McNeill { -1, 0 }
372343044c4SJared McNeill };
373343044c4SJared McNeill
374d69d5ab0SJared McNeill #define RD4(sc, reg) bus_read_4((sc)->res[0], (reg))
375d69d5ab0SJared McNeill #define WR4(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
376343044c4SJared McNeill
377343044c4SJared McNeill static int
aw_thermal_init(struct aw_thermal_softc * sc)378343044c4SJared McNeill aw_thermal_init(struct aw_thermal_softc *sc)
379343044c4SJared McNeill {
38097eb836fSEmmanuel Vadot phandle_t node;
38197eb836fSEmmanuel Vadot uint32_t calib[2];
382343044c4SJared McNeill int error;
383343044c4SJared McNeill
38497eb836fSEmmanuel Vadot node = ofw_bus_get_node(sc->dev);
385d6b44474SEmmanuel Vadot if (nvmem_get_cell_len(node, "calibration") > sizeof(calib)) {
386d6b44474SEmmanuel Vadot device_printf(sc->dev, "calibration nvmem cell is too large\n");
387d19afc9aSEmmanuel Vadot return (ENXIO);
388d19afc9aSEmmanuel Vadot }
389d6b44474SEmmanuel Vadot error = nvmem_read_cell_by_name(node, "calibration",
390d6b44474SEmmanuel Vadot (void *)&calib, nvmem_get_cell_len(node, "calibration"));
39197eb836fSEmmanuel Vadot /* Read calibration settings from EFUSE */
39297eb836fSEmmanuel Vadot if (error != 0) {
39397eb836fSEmmanuel Vadot device_printf(sc->dev, "Cannot read THS efuse\n");
394343044c4SJared McNeill return (error);
39597eb836fSEmmanuel Vadot }
396343044c4SJared McNeill
39797eb836fSEmmanuel Vadot calib[0] &= sc->conf->calib0_mask;
39897eb836fSEmmanuel Vadot calib[1] &= sc->conf->calib1_mask;
3993c2b90f1SJared McNeill
400343044c4SJared McNeill /* Write calibration settings to thermal controller */
40197eb836fSEmmanuel Vadot if (calib[0] != 0)
40297eb836fSEmmanuel Vadot WR4(sc, THS_CALIB0, calib[0]);
40397eb836fSEmmanuel Vadot if (calib[1] != 0)
40497eb836fSEmmanuel Vadot WR4(sc, THS_CALIB1, calib[1]);
405343044c4SJared McNeill
406343044c4SJared McNeill /* Configure ADC acquire time (CLK_IN/(N+1)) and enable sensors */
407d69d5ab0SJared McNeill WR4(sc, THS_CTRL1, ADC_CALI_EN);
408d69d5ab0SJared McNeill WR4(sc, THS_CTRL0, sc->conf->adc_acquire_time);
409d69d5ab0SJared McNeill WR4(sc, THS_CTRL2, sc->conf->adc_acquire_time << SENSOR_ACQ1_SHIFT);
410343044c4SJared McNeill
411d19afc9aSEmmanuel Vadot /* Set thermal period */
412d19afc9aSEmmanuel Vadot WR4(sc, THS_INTC, sc->conf->thermal_per << THS_THERMAL_PER_SHIFT);
413d19afc9aSEmmanuel Vadot
414343044c4SJared McNeill /* Enable average filter */
415d69d5ab0SJared McNeill WR4(sc, THS_FILTER, sc->conf->filter);
416d69d5ab0SJared McNeill
417d69d5ab0SJared McNeill /* Enable interrupts */
418d69d5ab0SJared McNeill WR4(sc, THS_INTS, RD4(sc, THS_INTS));
419d19afc9aSEmmanuel Vadot WR4(sc, THS_INTC, RD4(sc, THS_INTC) | SHUT_INT_ALL | ALARM_INT_ALL);
420d69d5ab0SJared McNeill
421d69d5ab0SJared McNeill /* Enable sensors */
422d69d5ab0SJared McNeill WR4(sc, THS_CTRL2, RD4(sc, THS_CTRL2) | SENSOR_ENABLE_ALL);
423343044c4SJared McNeill
424343044c4SJared McNeill return (0);
425343044c4SJared McNeill }
426343044c4SJared McNeill
427343044c4SJared McNeill static int
aw_thermal_gettemp(struct aw_thermal_softc * sc,int sensor)428d69d5ab0SJared McNeill aw_thermal_gettemp(struct aw_thermal_softc *sc, int sensor)
429d69d5ab0SJared McNeill {
430d69d5ab0SJared McNeill uint32_t val;
431d69d5ab0SJared McNeill
432d69d5ab0SJared McNeill val = RD4(sc, THS_DATA0 + (sensor * 4));
433d69d5ab0SJared McNeill
434d19afc9aSEmmanuel Vadot return (sc->conf->to_temp(val, sensor));
4353c2b90f1SJared McNeill }
4363c2b90f1SJared McNeill
4373c2b90f1SJared McNeill static int
aw_thermal_getshut(struct aw_thermal_softc * sc,int sensor)4383c2b90f1SJared McNeill aw_thermal_getshut(struct aw_thermal_softc *sc, int sensor)
4393c2b90f1SJared McNeill {
4403c2b90f1SJared McNeill uint32_t val;
4413c2b90f1SJared McNeill
4423c2b90f1SJared McNeill val = RD4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4));
4433c2b90f1SJared McNeill val = (val >> SHUT_T_HOT_SHIFT) & SHUT_T_HOT_MASK;
4443c2b90f1SJared McNeill
445d19afc9aSEmmanuel Vadot return (sc->conf->to_temp(val, sensor));
4460a30b4b2SJared McNeill }
4470a30b4b2SJared McNeill
4480a30b4b2SJared McNeill static void
aw_thermal_setshut(struct aw_thermal_softc * sc,int sensor,int temp)4490a30b4b2SJared McNeill aw_thermal_setshut(struct aw_thermal_softc *sc, int sensor, int temp)
4500a30b4b2SJared McNeill {
4510a30b4b2SJared McNeill uint32_t val;
4520a30b4b2SJared McNeill
4530a30b4b2SJared McNeill val = RD4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4));
4540a30b4b2SJared McNeill val &= ~(SHUT_T_HOT_MASK << SHUT_T_HOT_SHIFT);
455d19afc9aSEmmanuel Vadot val |= (sc->conf->to_reg(temp, sensor) << SHUT_T_HOT_SHIFT);
4560a30b4b2SJared McNeill WR4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4), val);
4573c2b90f1SJared McNeill }
4583c2b90f1SJared McNeill
4593c2b90f1SJared McNeill static int
aw_thermal_gethyst(struct aw_thermal_softc * sc,int sensor)4603c2b90f1SJared McNeill aw_thermal_gethyst(struct aw_thermal_softc *sc, int sensor)
4613c2b90f1SJared McNeill {
4623c2b90f1SJared McNeill uint32_t val;
4633c2b90f1SJared McNeill
4643c2b90f1SJared McNeill val = RD4(sc, THS_ALARM0_CTRL + (sensor * 4));
4653c2b90f1SJared McNeill val = (val >> ALARM_T_HYST_SHIFT) & ALARM_T_HYST_MASK;
4663c2b90f1SJared McNeill
467d19afc9aSEmmanuel Vadot return (sc->conf->to_temp(val, sensor));
4683c2b90f1SJared McNeill }
4693c2b90f1SJared McNeill
4703c2b90f1SJared McNeill static int
aw_thermal_getalarm(struct aw_thermal_softc * sc,int sensor)4713c2b90f1SJared McNeill aw_thermal_getalarm(struct aw_thermal_softc *sc, int sensor)
4723c2b90f1SJared McNeill {
4733c2b90f1SJared McNeill uint32_t val;
4743c2b90f1SJared McNeill
4753c2b90f1SJared McNeill val = RD4(sc, THS_ALARM0_CTRL + (sensor * 4));
4763c2b90f1SJared McNeill val = (val >> ALARM_T_HOT_SHIFT) & ALARM_T_HOT_MASK;
4773c2b90f1SJared McNeill
478d19afc9aSEmmanuel Vadot return (sc->conf->to_temp(val, sensor));
4790a30b4b2SJared McNeill }
4800a30b4b2SJared McNeill
4810a30b4b2SJared McNeill static void
aw_thermal_setalarm(struct aw_thermal_softc * sc,int sensor,int temp)4820a30b4b2SJared McNeill aw_thermal_setalarm(struct aw_thermal_softc *sc, int sensor, int temp)
4830a30b4b2SJared McNeill {
4840a30b4b2SJared McNeill uint32_t val;
4850a30b4b2SJared McNeill
4860a30b4b2SJared McNeill val = RD4(sc, THS_ALARM0_CTRL + (sensor * 4));
4870a30b4b2SJared McNeill val &= ~(ALARM_T_HOT_MASK << ALARM_T_HOT_SHIFT);
488d19afc9aSEmmanuel Vadot val |= (sc->conf->to_reg(temp, sensor) << ALARM_T_HOT_SHIFT);
4890a30b4b2SJared McNeill WR4(sc, THS_ALARM0_CTRL + (sensor * 4), val);
490343044c4SJared McNeill }
491343044c4SJared McNeill
492343044c4SJared McNeill static int
aw_thermal_sysctl(SYSCTL_HANDLER_ARGS)493343044c4SJared McNeill aw_thermal_sysctl(SYSCTL_HANDLER_ARGS)
494343044c4SJared McNeill {
495343044c4SJared McNeill struct aw_thermal_softc *sc;
496d69d5ab0SJared McNeill int sensor, val;
497343044c4SJared McNeill
498343044c4SJared McNeill sc = arg1;
499343044c4SJared McNeill sensor = arg2;
500343044c4SJared McNeill
5010a30b4b2SJared McNeill val = aw_thermal_gettemp(sc, sensor) + TEMP_C_TO_K;
502343044c4SJared McNeill
503343044c4SJared McNeill return sysctl_handle_opaque(oidp, &val, sizeof(val), req);
504343044c4SJared McNeill }
505343044c4SJared McNeill
506d69d5ab0SJared McNeill static void
aw_thermal_throttle(struct aw_thermal_softc * sc,int enable)5073c2b90f1SJared McNeill aw_thermal_throttle(struct aw_thermal_softc *sc, int enable)
5083c2b90f1SJared McNeill {
5093c2b90f1SJared McNeill device_t cf_dev;
5103c2b90f1SJared McNeill int count, error;
5113c2b90f1SJared McNeill
5123c2b90f1SJared McNeill if (enable == sc->throttle)
5133c2b90f1SJared McNeill return;
5143c2b90f1SJared McNeill
5153c2b90f1SJared McNeill if (enable != 0) {
5163c2b90f1SJared McNeill /* Set the lowest available frequency */
5173c2b90f1SJared McNeill cf_dev = devclass_get_device(devclass_find("cpufreq"), 0);
5183c2b90f1SJared McNeill if (cf_dev == NULL)
5193c2b90f1SJared McNeill return;
5203c2b90f1SJared McNeill count = MAX_CF_LEVELS;
5213c2b90f1SJared McNeill error = CPUFREQ_LEVELS(cf_dev, sc->levels, &count);
5223c2b90f1SJared McNeill if (error != 0 || count == 0)
5233c2b90f1SJared McNeill return;
5243c2b90f1SJared McNeill sc->min_freq = sc->levels[count - 1].total_set.freq;
5253c2b90f1SJared McNeill error = CPUFREQ_SET(cf_dev, &sc->levels[count - 1],
5263c2b90f1SJared McNeill CPUFREQ_PRIO_USER);
5273c2b90f1SJared McNeill if (error != 0)
5283c2b90f1SJared McNeill return;
5293c2b90f1SJared McNeill }
5303c2b90f1SJared McNeill
5313c2b90f1SJared McNeill sc->throttle = enable;
5323c2b90f1SJared McNeill }
5333c2b90f1SJared McNeill
5343c2b90f1SJared McNeill static void
aw_thermal_cf_task(void * arg,int pending)5352e4f9347SJared McNeill aw_thermal_cf_task(void *arg, int pending)
5362e4f9347SJared McNeill {
5372e4f9347SJared McNeill struct aw_thermal_softc *sc;
5382e4f9347SJared McNeill
5392e4f9347SJared McNeill sc = arg;
5402e4f9347SJared McNeill
5412e4f9347SJared McNeill aw_thermal_throttle(sc, 1);
5422e4f9347SJared McNeill }
5432e4f9347SJared McNeill
5442e4f9347SJared McNeill static void
aw_thermal_cf_pre_change(void * arg,const struct cf_level * level,int * status)5453c2b90f1SJared McNeill aw_thermal_cf_pre_change(void *arg, const struct cf_level *level, int *status)
5463c2b90f1SJared McNeill {
5473c2b90f1SJared McNeill struct aw_thermal_softc *sc;
5483c2b90f1SJared McNeill int temp_cur, temp_alarm;
5493c2b90f1SJared McNeill
5503c2b90f1SJared McNeill sc = arg;
5513c2b90f1SJared McNeill
5523c2b90f1SJared McNeill if (aw_thermal_throttle_enable == 0 || sc->throttle == 0 ||
5533c2b90f1SJared McNeill level->total_set.freq == sc->min_freq)
5543c2b90f1SJared McNeill return;
5553c2b90f1SJared McNeill
5563c2b90f1SJared McNeill temp_cur = aw_thermal_gettemp(sc, 0);
5573c2b90f1SJared McNeill temp_alarm = aw_thermal_getalarm(sc, 0);
5583c2b90f1SJared McNeill
5593c2b90f1SJared McNeill if (temp_cur < temp_alarm)
5603c2b90f1SJared McNeill aw_thermal_throttle(sc, 0);
5613c2b90f1SJared McNeill else
5623c2b90f1SJared McNeill *status = ENXIO;
5633c2b90f1SJared McNeill }
5643c2b90f1SJared McNeill
5653c2b90f1SJared McNeill static void
aw_thermal_intr(void * arg)566d69d5ab0SJared McNeill aw_thermal_intr(void *arg)
567d69d5ab0SJared McNeill {
568d69d5ab0SJared McNeill struct aw_thermal_softc *sc;
569d69d5ab0SJared McNeill device_t dev;
570d69d5ab0SJared McNeill uint32_t ints;
571d69d5ab0SJared McNeill
572d69d5ab0SJared McNeill dev = arg;
573d69d5ab0SJared McNeill sc = device_get_softc(dev);
574d69d5ab0SJared McNeill
575d69d5ab0SJared McNeill ints = RD4(sc, THS_INTS);
576d69d5ab0SJared McNeill WR4(sc, THS_INTS, ints);
577d69d5ab0SJared McNeill
578d69d5ab0SJared McNeill if ((ints & SHUT_INT_ALL) != 0) {
579d69d5ab0SJared McNeill device_printf(dev,
580d69d5ab0SJared McNeill "WARNING - current temperature exceeds safe limits\n");
581d69d5ab0SJared McNeill shutdown_nice(RB_POWEROFF);
582d69d5ab0SJared McNeill }
5833c2b90f1SJared McNeill
5843c2b90f1SJared McNeill if ((ints & ALARM_INT_ALL) != 0)
5852e4f9347SJared McNeill taskqueue_enqueue(taskqueue_thread, &sc->cf_task);
586d69d5ab0SJared McNeill }
587d69d5ab0SJared McNeill
588343044c4SJared McNeill static int
aw_thermal_probe(device_t dev)589343044c4SJared McNeill aw_thermal_probe(device_t dev)
590343044c4SJared McNeill {
591343044c4SJared McNeill if (!ofw_bus_status_okay(dev))
592343044c4SJared McNeill return (ENXIO);
593343044c4SJared McNeill
594343044c4SJared McNeill if (THS_CONF(dev) == NULL)
595343044c4SJared McNeill return (ENXIO);
596343044c4SJared McNeill
597343044c4SJared McNeill device_set_desc(dev, "Allwinner Thermal Sensor Controller");
598343044c4SJared McNeill return (BUS_PROBE_DEFAULT);
599343044c4SJared McNeill }
600343044c4SJared McNeill
601343044c4SJared McNeill static int
aw_thermal_attach(device_t dev)602343044c4SJared McNeill aw_thermal_attach(device_t dev)
603343044c4SJared McNeill {
604343044c4SJared McNeill struct aw_thermal_softc *sc;
605d69d5ab0SJared McNeill hwreset_t rst;
606d69d5ab0SJared McNeill int i, error;
607d69d5ab0SJared McNeill void *ih;
608343044c4SJared McNeill
609343044c4SJared McNeill sc = device_get_softc(dev);
610d19afc9aSEmmanuel Vadot sc->dev = dev;
611d69d5ab0SJared McNeill rst = NULL;
612d69d5ab0SJared McNeill ih = NULL;
613343044c4SJared McNeill
614343044c4SJared McNeill sc->conf = THS_CONF(dev);
6152e4f9347SJared McNeill TASK_INIT(&sc->cf_task, 0, aw_thermal_cf_task, sc);
616343044c4SJared McNeill
617d69d5ab0SJared McNeill if (bus_alloc_resources(dev, aw_thermal_spec, sc->res) != 0) {
618343044c4SJared McNeill device_printf(dev, "cannot allocate resources for device\n");
619343044c4SJared McNeill return (ENXIO);
620343044c4SJared McNeill }
621343044c4SJared McNeill
622d6b44474SEmmanuel Vadot if (clk_get_by_ofw_name(dev, 0, "bus", &sc->clk_apb) == 0) {
623d19afc9aSEmmanuel Vadot error = clk_enable(sc->clk_apb);
624d69d5ab0SJared McNeill if (error != 0) {
625d19afc9aSEmmanuel Vadot device_printf(dev, "cannot enable apb clock\n");
626d69d5ab0SJared McNeill goto fail;
627d69d5ab0SJared McNeill }
628d69d5ab0SJared McNeill }
629d19afc9aSEmmanuel Vadot
630d6b44474SEmmanuel Vadot if (clk_get_by_ofw_name(dev, 0, "mod", &sc->clk_ths) == 0) {
631d19afc9aSEmmanuel Vadot error = clk_set_freq(sc->clk_ths, sc->conf->clk_rate, 0);
632d69d5ab0SJared McNeill if (error != 0) {
633d69d5ab0SJared McNeill device_printf(dev, "cannot set ths clock rate\n");
634d69d5ab0SJared McNeill goto fail;
635d69d5ab0SJared McNeill }
636d19afc9aSEmmanuel Vadot error = clk_enable(sc->clk_ths);
637d69d5ab0SJared McNeill if (error != 0) {
638d69d5ab0SJared McNeill device_printf(dev, "cannot enable ths clock\n");
639d69d5ab0SJared McNeill goto fail;
640d69d5ab0SJared McNeill }
641d69d5ab0SJared McNeill }
642d19afc9aSEmmanuel Vadot
643d69d5ab0SJared McNeill if (hwreset_get_by_ofw_idx(dev, 0, 0, &rst) == 0) {
644d69d5ab0SJared McNeill error = hwreset_deassert(rst);
645d69d5ab0SJared McNeill if (error != 0) {
646d69d5ab0SJared McNeill device_printf(dev, "cannot de-assert reset\n");
647d69d5ab0SJared McNeill goto fail;
648d69d5ab0SJared McNeill }
649d69d5ab0SJared McNeill }
650343044c4SJared McNeill
651d69d5ab0SJared McNeill error = bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
652d69d5ab0SJared McNeill NULL, aw_thermal_intr, dev, &ih);
653d69d5ab0SJared McNeill if (error != 0) {
654d69d5ab0SJared McNeill device_printf(dev, "cannot setup interrupt handler\n");
655d69d5ab0SJared McNeill goto fail;
656d69d5ab0SJared McNeill }
657d69d5ab0SJared McNeill
6580a30b4b2SJared McNeill for (i = 0; i < sc->conf->nsensors; i++) {
6590a30b4b2SJared McNeill if (sc->conf->sensors[i].init_alarm > 0)
6600a30b4b2SJared McNeill aw_thermal_setalarm(sc, i,
6610a30b4b2SJared McNeill sc->conf->sensors[i].init_alarm);
6620a30b4b2SJared McNeill if (sc->conf->sensors[i].init_shut > 0)
6630a30b4b2SJared McNeill aw_thermal_setshut(sc, i,
6640a30b4b2SJared McNeill sc->conf->sensors[i].init_shut);
6650a30b4b2SJared McNeill }
6660a30b4b2SJared McNeill
667d69d5ab0SJared McNeill if (aw_thermal_init(sc) != 0)
668d69d5ab0SJared McNeill goto fail;
669d69d5ab0SJared McNeill
670d69d5ab0SJared McNeill for (i = 0; i < sc->conf->nsensors; i++)
671343044c4SJared McNeill SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
672343044c4SJared McNeill SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
673d69d5ab0SJared McNeill OID_AUTO, sc->conf->sensors[i].name,
6748eea36aeSPawel Biernacki CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT,
675d69d5ab0SJared McNeill sc, i, aw_thermal_sysctl, "IK0",
676d69d5ab0SJared McNeill sc->conf->sensors[i].desc);
677343044c4SJared McNeill
6783c2b90f1SJared McNeill if (bootverbose)
6793c2b90f1SJared McNeill for (i = 0; i < sc->conf->nsensors; i++) {
6803c2b90f1SJared McNeill device_printf(dev,
681d19afc9aSEmmanuel Vadot "%s: alarm %dC hyst %dC shut %dC\n",
682d19afc9aSEmmanuel Vadot sc->conf->sensors[i].name,
6830a30b4b2SJared McNeill aw_thermal_getalarm(sc, i),
6840a30b4b2SJared McNeill aw_thermal_gethyst(sc, i),
6850a30b4b2SJared McNeill aw_thermal_getshut(sc, i));
6863c2b90f1SJared McNeill }
6873c2b90f1SJared McNeill
6883c2b90f1SJared McNeill sc->cf_pre_tag = EVENTHANDLER_REGISTER(cpufreq_pre_change,
6893c2b90f1SJared McNeill aw_thermal_cf_pre_change, sc, EVENTHANDLER_PRI_FIRST);
6903c2b90f1SJared McNeill
691343044c4SJared McNeill return (0);
692d69d5ab0SJared McNeill
693d69d5ab0SJared McNeill fail:
694d69d5ab0SJared McNeill if (ih != NULL)
695d69d5ab0SJared McNeill bus_teardown_intr(dev, sc->res[1], ih);
696d69d5ab0SJared McNeill if (rst != NULL)
697d69d5ab0SJared McNeill hwreset_release(rst);
698d19afc9aSEmmanuel Vadot if (sc->clk_apb != NULL)
699d19afc9aSEmmanuel Vadot clk_release(sc->clk_apb);
700d19afc9aSEmmanuel Vadot if (sc->clk_ths != NULL)
701d19afc9aSEmmanuel Vadot clk_release(sc->clk_ths);
702d69d5ab0SJared McNeill bus_release_resources(dev, aw_thermal_spec, sc->res);
703d69d5ab0SJared McNeill
704d69d5ab0SJared McNeill return (ENXIO);
705343044c4SJared McNeill }
706343044c4SJared McNeill
707343044c4SJared McNeill static device_method_t aw_thermal_methods[] = {
708343044c4SJared McNeill /* Device interface */
709343044c4SJared McNeill DEVMETHOD(device_probe, aw_thermal_probe),
710343044c4SJared McNeill DEVMETHOD(device_attach, aw_thermal_attach),
711343044c4SJared McNeill
712343044c4SJared McNeill DEVMETHOD_END
713343044c4SJared McNeill };
714343044c4SJared McNeill
715343044c4SJared McNeill static driver_t aw_thermal_driver = {
716343044c4SJared McNeill "aw_thermal",
717343044c4SJared McNeill aw_thermal_methods,
718343044c4SJared McNeill sizeof(struct aw_thermal_softc),
719343044c4SJared McNeill };
720343044c4SJared McNeill
7217e1e2ba1SJohn Baldwin DRIVER_MODULE(aw_thermal, simplebus, aw_thermal_driver, 0, 0);
722343044c4SJared McNeill MODULE_VERSION(aw_thermal, 1);
723f9b1c6a0SEmmanuel Vadot MODULE_DEPEND(aw_thermal, aw_sid, 1, 1, 1);
724f9b1c6a0SEmmanuel Vadot SIMPLEBUS_PNP_INFO(compat_data);
725