1343044c4SJared McNeill /*- 2343044c4SJared McNeill * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 3343044c4SJared McNeill * All rights reserved. 4343044c4SJared McNeill * 5343044c4SJared McNeill * Redistribution and use in source and binary forms, with or without 6343044c4SJared McNeill * modification, are permitted provided that the following conditions 7343044c4SJared McNeill * are met: 8343044c4SJared McNeill * 1. Redistributions of source code must retain the above copyright 9343044c4SJared McNeill * notice, this list of conditions and the following disclaimer. 10343044c4SJared McNeill * 2. Redistributions in binary form must reproduce the above copyright 11343044c4SJared McNeill * notice, this list of conditions and the following disclaimer in the 12343044c4SJared McNeill * documentation and/or other materials provided with the distribution. 13343044c4SJared McNeill * 14343044c4SJared McNeill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15343044c4SJared McNeill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16343044c4SJared McNeill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17343044c4SJared McNeill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18343044c4SJared McNeill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19343044c4SJared McNeill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20343044c4SJared McNeill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21343044c4SJared McNeill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22343044c4SJared McNeill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23343044c4SJared McNeill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24343044c4SJared McNeill * SUCH DAMAGE. 25343044c4SJared McNeill * 26343044c4SJared McNeill * $FreeBSD$ 27343044c4SJared McNeill */ 28343044c4SJared McNeill 29343044c4SJared McNeill /* 30343044c4SJared McNeill * Allwinner thermal sensor controller 31343044c4SJared McNeill */ 32343044c4SJared McNeill 33343044c4SJared McNeill #include <sys/cdefs.h> 34343044c4SJared McNeill __FBSDID("$FreeBSD$"); 35343044c4SJared McNeill 36343044c4SJared McNeill #include <sys/param.h> 37343044c4SJared McNeill #include <sys/systm.h> 38343044c4SJared McNeill #include <sys/bus.h> 39343044c4SJared McNeill #include <sys/rman.h> 40343044c4SJared McNeill #include <sys/kernel.h> 41343044c4SJared McNeill #include <sys/sysctl.h> 42d69d5ab0SJared McNeill #include <sys/reboot.h> 43343044c4SJared McNeill #include <sys/module.h> 443c2b90f1SJared McNeill #include <sys/cpu.h> 452e4f9347SJared McNeill #include <sys/taskqueue.h> 46343044c4SJared McNeill #include <machine/bus.h> 47343044c4SJared McNeill 48343044c4SJared McNeill #include <dev/ofw/ofw_bus.h> 49343044c4SJared McNeill #include <dev/ofw/ofw_bus_subr.h> 50343044c4SJared McNeill 51d69d5ab0SJared McNeill #include <dev/extres/clk/clk.h> 52d69d5ab0SJared McNeill #include <dev/extres/hwreset/hwreset.h> 5397eb836fSEmmanuel Vadot #include <dev/extres/nvmem/nvmem.h> 54d69d5ab0SJared McNeill 55343044c4SJared McNeill #include <arm/allwinner/aw_sid.h> 56343044c4SJared McNeill 573c2b90f1SJared McNeill #include "cpufreq_if.h" 5897eb836fSEmmanuel Vadot #include "nvmem_if.h" 593c2b90f1SJared McNeill 60343044c4SJared McNeill #define THS_CTRL0 0x00 61d69d5ab0SJared McNeill #define THS_CTRL1 0x04 62d69d5ab0SJared McNeill #define ADC_CALI_EN (1 << 17) 63343044c4SJared McNeill #define THS_CTRL2 0x40 64343044c4SJared McNeill #define SENSOR_ACQ1_SHIFT 16 65343044c4SJared McNeill #define SENSOR2_EN (1 << 2) 66343044c4SJared McNeill #define SENSOR1_EN (1 << 1) 67343044c4SJared McNeill #define SENSOR0_EN (1 << 0) 68343044c4SJared McNeill #define THS_INTC 0x44 69d19afc9aSEmmanuel Vadot #define THS_THERMAL_PER_SHIFT 12 70343044c4SJared McNeill #define THS_INTS 0x48 71d69d5ab0SJared McNeill #define THS2_DATA_IRQ_STS (1 << 10) 72d69d5ab0SJared McNeill #define THS1_DATA_IRQ_STS (1 << 9) 73d69d5ab0SJared McNeill #define THS0_DATA_IRQ_STS (1 << 8) 74d69d5ab0SJared McNeill #define SHUT_INT2_STS (1 << 6) 75d69d5ab0SJared McNeill #define SHUT_INT1_STS (1 << 5) 76d69d5ab0SJared McNeill #define SHUT_INT0_STS (1 << 4) 77d69d5ab0SJared McNeill #define ALARM_INT2_STS (1 << 2) 78d69d5ab0SJared McNeill #define ALARM_INT1_STS (1 << 1) 79d69d5ab0SJared McNeill #define ALARM_INT0_STS (1 << 0) 803c2b90f1SJared McNeill #define THS_ALARM0_CTRL 0x50 813c2b90f1SJared McNeill #define ALARM_T_HOT_MASK 0xfff 823c2b90f1SJared McNeill #define ALARM_T_HOT_SHIFT 16 833c2b90f1SJared McNeill #define ALARM_T_HYST_MASK 0xfff 843c2b90f1SJared McNeill #define ALARM_T_HYST_SHIFT 0 853c2b90f1SJared McNeill #define THS_SHUTDOWN0_CTRL 0x60 863c2b90f1SJared McNeill #define SHUT_T_HOT_MASK 0xfff 873c2b90f1SJared McNeill #define SHUT_T_HOT_SHIFT 16 88343044c4SJared McNeill #define THS_FILTER 0x70 89343044c4SJared McNeill #define THS_CALIB0 0x74 90343044c4SJared McNeill #define THS_CALIB1 0x78 91343044c4SJared McNeill #define THS_DATA0 0x80 92343044c4SJared McNeill #define THS_DATA1 0x84 93343044c4SJared McNeill #define THS_DATA2 0x88 94343044c4SJared McNeill #define DATA_MASK 0xfff 95343044c4SJared McNeill 96d19afc9aSEmmanuel Vadot #define A83T_CLK_RATE 24000000 97d19afc9aSEmmanuel Vadot #define A83T_ADC_ACQUIRE_TIME 23 /* 24Mhz/(23 + 1) = 1us */ 98d19afc9aSEmmanuel Vadot #define A83T_THERMAL_PER 1 /* 4096 * (1 + 1) / 24Mhz = 341 us */ 99d19afc9aSEmmanuel Vadot #define A83T_FILTER 0x5 /* Filter enabled, avg of 4 */ 100d69d5ab0SJared McNeill #define A83T_TEMP_BASE 2719000 1014e7f43baSJared McNeill #define A83T_TEMP_MUL 1000 102d69d5ab0SJared McNeill #define A83T_TEMP_DIV 14186 103d69d5ab0SJared McNeill 104d19afc9aSEmmanuel Vadot #define A64_CLK_RATE 4000000 105d19afc9aSEmmanuel Vadot #define A64_ADC_ACQUIRE_TIME 400 /* 4Mhz/(400 + 1) = 100 us */ 106d19afc9aSEmmanuel Vadot #define A64_THERMAL_PER 24 /* 4096 * (24 + 1) / 4Mhz = 25.6 ms */ 107d19afc9aSEmmanuel Vadot #define A64_FILTER 0x6 /* Filter enabled, avg of 8 */ 108d69d5ab0SJared McNeill #define A64_TEMP_BASE 2170000 1094e7f43baSJared McNeill #define A64_TEMP_MUL 1000 110d69d5ab0SJared McNeill #define A64_TEMP_DIV 8560 111d69d5ab0SJared McNeill 112d19afc9aSEmmanuel Vadot #define H3_CLK_RATE 4000000 1134e7f43baSJared McNeill #define H3_ADC_ACQUIRE_TIME 0x3f 114d19afc9aSEmmanuel Vadot #define H3_THERMAL_PER 401 115d19afc9aSEmmanuel Vadot #define H3_FILTER 0x6 /* Filter enabled, avg of 8 */ 1160a30b4b2SJared McNeill #define H3_TEMP_BASE 217 1173c2b90f1SJared McNeill #define H3_TEMP_MUL 1000 1180a30b4b2SJared McNeill #define H3_TEMP_DIV 8253 1190a30b4b2SJared McNeill #define H3_TEMP_MINUS 1794000 1200a30b4b2SJared McNeill #define H3_INIT_ALARM 90 /* degC */ 1210a30b4b2SJared McNeill #define H3_INIT_SHUT 105 /* degC */ 1224e7f43baSJared McNeill 123d19afc9aSEmmanuel Vadot #define H5_CLK_RATE 24000000 124d19afc9aSEmmanuel Vadot #define H5_ADC_ACQUIRE_TIME 479 /* 24Mhz/479 = 20us */ 125d19afc9aSEmmanuel Vadot #define H5_THERMAL_PER 58 /* 4096 * (58 + 1) / 24Mhz = 10ms */ 126d19afc9aSEmmanuel Vadot #define H5_FILTER 0x6 /* Filter enabled, avg of 8 */ 127d19afc9aSEmmanuel Vadot #define H5_TEMP_BASE 233832448 128d19afc9aSEmmanuel Vadot #define H5_TEMP_MUL 124885 129d19afc9aSEmmanuel Vadot #define H5_TEMP_DIV 20 130d19afc9aSEmmanuel Vadot #define H5_TEMP_BASE_CPU 271581184 131d19afc9aSEmmanuel Vadot #define H5_TEMP_MUL_CPU 152253 132d19afc9aSEmmanuel Vadot #define H5_TEMP_BASE_GPU 289406976 133d19afc9aSEmmanuel Vadot #define H5_TEMP_MUL_GPU 166724 134d19afc9aSEmmanuel Vadot #define H5_INIT_CPU_ALARM 80 /* degC */ 135d19afc9aSEmmanuel Vadot #define H5_INIT_CPU_SHUT 96 /* degC */ 136d19afc9aSEmmanuel Vadot #define H5_INIT_GPU_ALARM 84 /* degC */ 137d19afc9aSEmmanuel Vadot #define H5_INIT_GPU_SHUT 100 /* degC */ 138d19afc9aSEmmanuel Vadot 139d69d5ab0SJared McNeill #define TEMP_C_TO_K 273 140343044c4SJared McNeill #define SENSOR_ENABLE_ALL (SENSOR0_EN|SENSOR1_EN|SENSOR2_EN) 141d69d5ab0SJared McNeill #define SHUT_INT_ALL (SHUT_INT0_STS|SHUT_INT1_STS|SHUT_INT2_STS) 1423c2b90f1SJared McNeill #define ALARM_INT_ALL (ALARM_INT0_STS) 143343044c4SJared McNeill 144d69d5ab0SJared McNeill #define MAX_SENSORS 3 1453c2b90f1SJared McNeill #define MAX_CF_LEVELS 64 1463c2b90f1SJared McNeill 1473c2b90f1SJared McNeill #define THROTTLE_ENABLE_DEFAULT 1 1483c2b90f1SJared McNeill 1493c2b90f1SJared McNeill /* Enable thermal throttling */ 1503c2b90f1SJared McNeill static int aw_thermal_throttle_enable = THROTTLE_ENABLE_DEFAULT; 1513c2b90f1SJared McNeill TUNABLE_INT("hw.aw_thermal.throttle_enable", &aw_thermal_throttle_enable); 152343044c4SJared McNeill 153d69d5ab0SJared McNeill struct aw_thermal_sensor { 154343044c4SJared McNeill const char *name; 155343044c4SJared McNeill const char *desc; 1560a30b4b2SJared McNeill int init_alarm; 1570a30b4b2SJared McNeill int init_shut; 158343044c4SJared McNeill }; 159343044c4SJared McNeill 160d69d5ab0SJared McNeill struct aw_thermal_config { 161d69d5ab0SJared McNeill struct aw_thermal_sensor sensors[MAX_SENSORS]; 162d69d5ab0SJared McNeill int nsensors; 163d69d5ab0SJared McNeill uint64_t clk_rate; 164d69d5ab0SJared McNeill uint32_t adc_acquire_time; 1653c2b90f1SJared McNeill int adc_cali_en; 166d69d5ab0SJared McNeill uint32_t filter; 167d19afc9aSEmmanuel Vadot uint32_t thermal_per; 168d19afc9aSEmmanuel Vadot int (*to_temp)(uint32_t, int); 169d19afc9aSEmmanuel Vadot uint32_t (*to_reg)(int, int); 1704e7f43baSJared McNeill int temp_base; 1714e7f43baSJared McNeill int temp_mul; 1724e7f43baSJared McNeill int temp_div; 1733c2b90f1SJared McNeill int calib0, calib1; 1743c2b90f1SJared McNeill uint32_t calib0_mask, calib1_mask; 175d69d5ab0SJared McNeill }; 176d69d5ab0SJared McNeill 1773c2b90f1SJared McNeill static int 178d19afc9aSEmmanuel Vadot a83t_to_temp(uint32_t val, int sensor) 1793c2b90f1SJared McNeill { 1803c2b90f1SJared McNeill return ((A83T_TEMP_BASE - (val * A83T_TEMP_MUL)) / A83T_TEMP_DIV); 1813c2b90f1SJared McNeill } 1823c2b90f1SJared McNeill 183d69d5ab0SJared McNeill static const struct aw_thermal_config a83t_config = { 184d69d5ab0SJared McNeill .nsensors = 3, 185d69d5ab0SJared McNeill .sensors = { 186d69d5ab0SJared McNeill [0] = { 187d69d5ab0SJared McNeill .name = "cluster0", 188d69d5ab0SJared McNeill .desc = "CPU cluster 0 temperature", 189d69d5ab0SJared McNeill }, 190d69d5ab0SJared McNeill [1] = { 191d69d5ab0SJared McNeill .name = "cluster1", 192d69d5ab0SJared McNeill .desc = "CPU cluster 1 temperature", 193d69d5ab0SJared McNeill }, 194d69d5ab0SJared McNeill [2] = { 195d69d5ab0SJared McNeill .name = "gpu", 196d69d5ab0SJared McNeill .desc = "GPU temperature", 197d69d5ab0SJared McNeill }, 198d69d5ab0SJared McNeill }, 199d69d5ab0SJared McNeill .clk_rate = A83T_CLK_RATE, 200d69d5ab0SJared McNeill .adc_acquire_time = A83T_ADC_ACQUIRE_TIME, 2013c2b90f1SJared McNeill .adc_cali_en = 1, 202d69d5ab0SJared McNeill .filter = A83T_FILTER, 203d19afc9aSEmmanuel Vadot .thermal_per = A83T_THERMAL_PER, 2043c2b90f1SJared McNeill .to_temp = a83t_to_temp, 2053c2b90f1SJared McNeill .calib0_mask = 0xffffffff, 206d19afc9aSEmmanuel Vadot .calib1_mask = 0xffff, 207d69d5ab0SJared McNeill }; 208d69d5ab0SJared McNeill 2093c2b90f1SJared McNeill static int 210d19afc9aSEmmanuel Vadot a64_to_temp(uint32_t val, int sensor) 2113c2b90f1SJared McNeill { 2123c2b90f1SJared McNeill return ((A64_TEMP_BASE - (val * A64_TEMP_MUL)) / A64_TEMP_DIV); 2133c2b90f1SJared McNeill } 2143c2b90f1SJared McNeill 215d69d5ab0SJared McNeill static const struct aw_thermal_config a64_config = { 216d69d5ab0SJared McNeill .nsensors = 3, 217d69d5ab0SJared McNeill .sensors = { 218d69d5ab0SJared McNeill [0] = { 219d69d5ab0SJared McNeill .name = "cpu", 220d69d5ab0SJared McNeill .desc = "CPU temperature", 221d69d5ab0SJared McNeill }, 222d69d5ab0SJared McNeill [1] = { 223d69d5ab0SJared McNeill .name = "gpu1", 224d69d5ab0SJared McNeill .desc = "GPU temperature 1", 225d69d5ab0SJared McNeill }, 226d69d5ab0SJared McNeill [2] = { 227d69d5ab0SJared McNeill .name = "gpu2", 228d69d5ab0SJared McNeill .desc = "GPU temperature 2", 229d69d5ab0SJared McNeill }, 230d69d5ab0SJared McNeill }, 231d69d5ab0SJared McNeill .clk_rate = A64_CLK_RATE, 232d69d5ab0SJared McNeill .adc_acquire_time = A64_ADC_ACQUIRE_TIME, 233d19afc9aSEmmanuel Vadot .adc_cali_en = 1, 234d69d5ab0SJared McNeill .filter = A64_FILTER, 235d19afc9aSEmmanuel Vadot .thermal_per = A64_THERMAL_PER, 2363c2b90f1SJared McNeill .to_temp = a64_to_temp, 237d19afc9aSEmmanuel Vadot .calib0_mask = 0xffffffff, 238d19afc9aSEmmanuel Vadot .calib1_mask = 0xffff, 239343044c4SJared McNeill }; 240343044c4SJared McNeill 2413c2b90f1SJared McNeill static int 242d19afc9aSEmmanuel Vadot h3_to_temp(uint32_t val, int sensor) 2433c2b90f1SJared McNeill { 2440a30b4b2SJared McNeill return (H3_TEMP_BASE - ((val * H3_TEMP_MUL) / H3_TEMP_DIV)); 2450a30b4b2SJared McNeill } 2460a30b4b2SJared McNeill 2470a30b4b2SJared McNeill static uint32_t 248d19afc9aSEmmanuel Vadot h3_to_reg(int val, int sensor) 2490a30b4b2SJared McNeill { 2500a30b4b2SJared McNeill return ((H3_TEMP_MINUS - (val * H3_TEMP_DIV)) / H3_TEMP_MUL); 2513c2b90f1SJared McNeill } 2523c2b90f1SJared McNeill 2534e7f43baSJared McNeill static const struct aw_thermal_config h3_config = { 2544e7f43baSJared McNeill .nsensors = 1, 2554e7f43baSJared McNeill .sensors = { 2564e7f43baSJared McNeill [0] = { 2574e7f43baSJared McNeill .name = "cpu", 2584e7f43baSJared McNeill .desc = "CPU temperature", 2590a30b4b2SJared McNeill .init_alarm = H3_INIT_ALARM, 2600a30b4b2SJared McNeill .init_shut = H3_INIT_SHUT, 2614e7f43baSJared McNeill }, 2624e7f43baSJared McNeill }, 2634e7f43baSJared McNeill .clk_rate = H3_CLK_RATE, 2644e7f43baSJared McNeill .adc_acquire_time = H3_ADC_ACQUIRE_TIME, 265d19afc9aSEmmanuel Vadot .adc_cali_en = 1, 2664e7f43baSJared McNeill .filter = H3_FILTER, 267d19afc9aSEmmanuel Vadot .thermal_per = H3_THERMAL_PER, 2683c2b90f1SJared McNeill .to_temp = h3_to_temp, 2690a30b4b2SJared McNeill .to_reg = h3_to_reg, 270d19afc9aSEmmanuel Vadot .calib0_mask = 0xffff, 271d19afc9aSEmmanuel Vadot }; 272d19afc9aSEmmanuel Vadot 273d19afc9aSEmmanuel Vadot static int 274d19afc9aSEmmanuel Vadot h5_to_temp(uint32_t val, int sensor) 275d19afc9aSEmmanuel Vadot { 276d19afc9aSEmmanuel Vadot int tmp; 277d19afc9aSEmmanuel Vadot 278d19afc9aSEmmanuel Vadot /* Temp is lower than 70 degrees */ 279d19afc9aSEmmanuel Vadot if (val > 0x500) { 280d19afc9aSEmmanuel Vadot tmp = H5_TEMP_BASE - (val * H5_TEMP_MUL); 281d19afc9aSEmmanuel Vadot tmp >>= H5_TEMP_DIV; 282d19afc9aSEmmanuel Vadot return (tmp); 283d19afc9aSEmmanuel Vadot } 284d19afc9aSEmmanuel Vadot 285d19afc9aSEmmanuel Vadot if (sensor == 0) 286d19afc9aSEmmanuel Vadot tmp = H5_TEMP_BASE_CPU - (val * H5_TEMP_MUL_CPU); 287d19afc9aSEmmanuel Vadot else if (sensor == 1) 288d19afc9aSEmmanuel Vadot tmp = H5_TEMP_BASE_GPU - (val * H5_TEMP_MUL_GPU); 289d19afc9aSEmmanuel Vadot else { 290d19afc9aSEmmanuel Vadot printf("Unknown sensor %d\n", sensor); 291d19afc9aSEmmanuel Vadot return (val); 292d19afc9aSEmmanuel Vadot } 293d19afc9aSEmmanuel Vadot 294d19afc9aSEmmanuel Vadot tmp >>= H5_TEMP_DIV; 295d19afc9aSEmmanuel Vadot return (tmp); 296d19afc9aSEmmanuel Vadot } 297d19afc9aSEmmanuel Vadot 298d19afc9aSEmmanuel Vadot static uint32_t 299d19afc9aSEmmanuel Vadot h5_to_reg(int val, int sensor) 300d19afc9aSEmmanuel Vadot { 301d19afc9aSEmmanuel Vadot int tmp; 302d19afc9aSEmmanuel Vadot 303d19afc9aSEmmanuel Vadot if (val < 70) { 304d19afc9aSEmmanuel Vadot tmp = H5_TEMP_BASE - (val << H5_TEMP_DIV); 305d19afc9aSEmmanuel Vadot tmp /= H5_TEMP_MUL; 306d19afc9aSEmmanuel Vadot } else { 307d19afc9aSEmmanuel Vadot if (sensor == 0) { 308d19afc9aSEmmanuel Vadot tmp = H5_TEMP_BASE_CPU - (val << H5_TEMP_DIV); 309d19afc9aSEmmanuel Vadot tmp /= H5_TEMP_MUL_CPU; 310d19afc9aSEmmanuel Vadot } else if (sensor == 1) { 311d19afc9aSEmmanuel Vadot tmp = H5_TEMP_BASE_GPU - (val << H5_TEMP_DIV); 312d19afc9aSEmmanuel Vadot tmp /= H5_TEMP_MUL_GPU; 313d19afc9aSEmmanuel Vadot } else { 314d19afc9aSEmmanuel Vadot printf("Unknown sensor %d\n", sensor); 315d19afc9aSEmmanuel Vadot return (val); 316d19afc9aSEmmanuel Vadot } 317d19afc9aSEmmanuel Vadot } 318d19afc9aSEmmanuel Vadot 319d19afc9aSEmmanuel Vadot return ((uint32_t)tmp); 320d19afc9aSEmmanuel Vadot } 321d19afc9aSEmmanuel Vadot 322d19afc9aSEmmanuel Vadot static const struct aw_thermal_config h5_config = { 323d19afc9aSEmmanuel Vadot .nsensors = 2, 324d19afc9aSEmmanuel Vadot .sensors = { 325d19afc9aSEmmanuel Vadot [0] = { 326d19afc9aSEmmanuel Vadot .name = "cpu", 327d19afc9aSEmmanuel Vadot .desc = "CPU temperature", 328d19afc9aSEmmanuel Vadot .init_alarm = H5_INIT_CPU_ALARM, 329d19afc9aSEmmanuel Vadot .init_shut = H5_INIT_CPU_SHUT, 330d19afc9aSEmmanuel Vadot }, 331d19afc9aSEmmanuel Vadot [1] = { 332d19afc9aSEmmanuel Vadot .name = "gpu", 333d19afc9aSEmmanuel Vadot .desc = "GPU temperature", 334d19afc9aSEmmanuel Vadot .init_alarm = H5_INIT_GPU_ALARM, 335d19afc9aSEmmanuel Vadot .init_shut = H5_INIT_GPU_SHUT, 336d19afc9aSEmmanuel Vadot }, 337d19afc9aSEmmanuel Vadot }, 338d19afc9aSEmmanuel Vadot .clk_rate = H5_CLK_RATE, 339d19afc9aSEmmanuel Vadot .adc_acquire_time = H5_ADC_ACQUIRE_TIME, 340d19afc9aSEmmanuel Vadot .filter = H5_FILTER, 341d19afc9aSEmmanuel Vadot .thermal_per = H5_THERMAL_PER, 342d19afc9aSEmmanuel Vadot .to_temp = h5_to_temp, 343d19afc9aSEmmanuel Vadot .to_reg = h5_to_reg, 344d19afc9aSEmmanuel Vadot .calib0_mask = 0xffffffff, 3454e7f43baSJared McNeill }; 3464e7f43baSJared McNeill 347343044c4SJared McNeill static struct ofw_compat_data compat_data[] = { 348d19afc9aSEmmanuel Vadot { "allwinner,sun8i-a83t-ths", (uintptr_t)&a83t_config }, 349d19afc9aSEmmanuel Vadot { "allwinner,sun8i-h3-ths", (uintptr_t)&h3_config }, 350d19afc9aSEmmanuel Vadot { "allwinner,sun50i-a64-ths", (uintptr_t)&a64_config }, 351d19afc9aSEmmanuel Vadot { "allwinner,sun50i-h5-ths", (uintptr_t)&h5_config }, 352343044c4SJared McNeill { NULL, (uintptr_t)NULL } 353343044c4SJared McNeill }; 354343044c4SJared McNeill 355343044c4SJared McNeill #define THS_CONF(d) \ 356343044c4SJared McNeill (void *)ofw_bus_search_compatible((d), compat_data)->ocd_data 357343044c4SJared McNeill 358343044c4SJared McNeill struct aw_thermal_softc { 3593c2b90f1SJared McNeill device_t dev; 360d69d5ab0SJared McNeill struct resource *res[2]; 361d69d5ab0SJared McNeill struct aw_thermal_config *conf; 3623c2b90f1SJared McNeill 3632e4f9347SJared McNeill struct task cf_task; 3643c2b90f1SJared McNeill int throttle; 3653c2b90f1SJared McNeill int min_freq; 3663c2b90f1SJared McNeill struct cf_level levels[MAX_CF_LEVELS]; 3673c2b90f1SJared McNeill eventhandler_tag cf_pre_tag; 368d19afc9aSEmmanuel Vadot 369d19afc9aSEmmanuel Vadot clk_t clk_apb; 370d19afc9aSEmmanuel Vadot clk_t clk_ths; 371343044c4SJared McNeill }; 372343044c4SJared McNeill 373343044c4SJared McNeill static struct resource_spec aw_thermal_spec[] = { 374343044c4SJared McNeill { SYS_RES_MEMORY, 0, RF_ACTIVE }, 375d69d5ab0SJared McNeill { SYS_RES_IRQ, 0, RF_ACTIVE }, 376343044c4SJared McNeill { -1, 0 } 377343044c4SJared McNeill }; 378343044c4SJared McNeill 379d69d5ab0SJared McNeill #define RD4(sc, reg) bus_read_4((sc)->res[0], (reg)) 380d69d5ab0SJared McNeill #define WR4(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val)) 381343044c4SJared McNeill 382343044c4SJared McNeill static int 383343044c4SJared McNeill aw_thermal_init(struct aw_thermal_softc *sc) 384343044c4SJared McNeill { 38597eb836fSEmmanuel Vadot phandle_t node; 38697eb836fSEmmanuel Vadot uint32_t calib[2]; 387343044c4SJared McNeill int error; 388343044c4SJared McNeill 38997eb836fSEmmanuel Vadot node = ofw_bus_get_node(sc->dev); 390d19afc9aSEmmanuel Vadot if (nvmem_get_cell_len(node, "ths-calib") > sizeof(calib)) { 391d19afc9aSEmmanuel Vadot device_printf(sc->dev, "ths-calib nvmem cell is too large\n"); 392d19afc9aSEmmanuel Vadot return (ENXIO); 393d19afc9aSEmmanuel Vadot } 394d19afc9aSEmmanuel Vadot error = nvmem_read_cell_by_name(node, "ths-calib", 395d19afc9aSEmmanuel Vadot (void *)&calib, nvmem_get_cell_len(node, "ths-calib")); 39697eb836fSEmmanuel Vadot /* Read calibration settings from EFUSE */ 39797eb836fSEmmanuel Vadot if (error != 0) { 39897eb836fSEmmanuel Vadot device_printf(sc->dev, "Cannot read THS efuse\n"); 399343044c4SJared McNeill return (error); 40097eb836fSEmmanuel Vadot } 401343044c4SJared McNeill 40297eb836fSEmmanuel Vadot calib[0] &= sc->conf->calib0_mask; 40397eb836fSEmmanuel Vadot calib[1] &= sc->conf->calib1_mask; 4043c2b90f1SJared McNeill 405343044c4SJared McNeill /* Write calibration settings to thermal controller */ 40697eb836fSEmmanuel Vadot if (calib[0] != 0) 40797eb836fSEmmanuel Vadot WR4(sc, THS_CALIB0, calib[0]); 40897eb836fSEmmanuel Vadot if (calib[1] != 0) 40997eb836fSEmmanuel Vadot WR4(sc, THS_CALIB1, calib[1]); 410343044c4SJared McNeill 411343044c4SJared McNeill /* Configure ADC acquire time (CLK_IN/(N+1)) and enable sensors */ 412d69d5ab0SJared McNeill WR4(sc, THS_CTRL1, ADC_CALI_EN); 413d69d5ab0SJared McNeill WR4(sc, THS_CTRL0, sc->conf->adc_acquire_time); 414d69d5ab0SJared McNeill WR4(sc, THS_CTRL2, sc->conf->adc_acquire_time << SENSOR_ACQ1_SHIFT); 415343044c4SJared McNeill 416d19afc9aSEmmanuel Vadot /* Set thermal period */ 417d19afc9aSEmmanuel Vadot WR4(sc, THS_INTC, sc->conf->thermal_per << THS_THERMAL_PER_SHIFT); 418d19afc9aSEmmanuel Vadot 419343044c4SJared McNeill /* Enable average filter */ 420d69d5ab0SJared McNeill WR4(sc, THS_FILTER, sc->conf->filter); 421d69d5ab0SJared McNeill 422d69d5ab0SJared McNeill /* Enable interrupts */ 423d69d5ab0SJared McNeill WR4(sc, THS_INTS, RD4(sc, THS_INTS)); 424d19afc9aSEmmanuel Vadot WR4(sc, THS_INTC, RD4(sc, THS_INTC) | SHUT_INT_ALL | ALARM_INT_ALL); 425d69d5ab0SJared McNeill 426d69d5ab0SJared McNeill /* Enable sensors */ 427d69d5ab0SJared McNeill WR4(sc, THS_CTRL2, RD4(sc, THS_CTRL2) | SENSOR_ENABLE_ALL); 428343044c4SJared McNeill 429343044c4SJared McNeill return (0); 430343044c4SJared McNeill } 431343044c4SJared McNeill 432343044c4SJared McNeill static int 433d69d5ab0SJared McNeill aw_thermal_gettemp(struct aw_thermal_softc *sc, int sensor) 434d69d5ab0SJared McNeill { 435d69d5ab0SJared McNeill uint32_t val; 436d69d5ab0SJared McNeill 437d69d5ab0SJared McNeill val = RD4(sc, THS_DATA0 + (sensor * 4)); 438d69d5ab0SJared McNeill 439d19afc9aSEmmanuel Vadot return (sc->conf->to_temp(val, sensor)); 4403c2b90f1SJared McNeill } 4413c2b90f1SJared McNeill 4423c2b90f1SJared McNeill static int 4433c2b90f1SJared McNeill aw_thermal_getshut(struct aw_thermal_softc *sc, int sensor) 4443c2b90f1SJared McNeill { 4453c2b90f1SJared McNeill uint32_t val; 4463c2b90f1SJared McNeill 4473c2b90f1SJared McNeill val = RD4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4)); 4483c2b90f1SJared McNeill val = (val >> SHUT_T_HOT_SHIFT) & SHUT_T_HOT_MASK; 4493c2b90f1SJared McNeill 450d19afc9aSEmmanuel Vadot return (sc->conf->to_temp(val, sensor)); 4510a30b4b2SJared McNeill } 4520a30b4b2SJared McNeill 4530a30b4b2SJared McNeill static void 4540a30b4b2SJared McNeill aw_thermal_setshut(struct aw_thermal_softc *sc, int sensor, int temp) 4550a30b4b2SJared McNeill { 4560a30b4b2SJared McNeill uint32_t val; 4570a30b4b2SJared McNeill 4580a30b4b2SJared McNeill val = RD4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4)); 4590a30b4b2SJared McNeill val &= ~(SHUT_T_HOT_MASK << SHUT_T_HOT_SHIFT); 460d19afc9aSEmmanuel Vadot val |= (sc->conf->to_reg(temp, sensor) << SHUT_T_HOT_SHIFT); 4610a30b4b2SJared McNeill WR4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4), val); 4623c2b90f1SJared McNeill } 4633c2b90f1SJared McNeill 4643c2b90f1SJared McNeill static int 4653c2b90f1SJared McNeill aw_thermal_gethyst(struct aw_thermal_softc *sc, int sensor) 4663c2b90f1SJared McNeill { 4673c2b90f1SJared McNeill uint32_t val; 4683c2b90f1SJared McNeill 4693c2b90f1SJared McNeill val = RD4(sc, THS_ALARM0_CTRL + (sensor * 4)); 4703c2b90f1SJared McNeill val = (val >> ALARM_T_HYST_SHIFT) & ALARM_T_HYST_MASK; 4713c2b90f1SJared McNeill 472d19afc9aSEmmanuel Vadot return (sc->conf->to_temp(val, sensor)); 4733c2b90f1SJared McNeill } 4743c2b90f1SJared McNeill 4753c2b90f1SJared McNeill static int 4763c2b90f1SJared McNeill aw_thermal_getalarm(struct aw_thermal_softc *sc, int sensor) 4773c2b90f1SJared McNeill { 4783c2b90f1SJared McNeill uint32_t val; 4793c2b90f1SJared McNeill 4803c2b90f1SJared McNeill val = RD4(sc, THS_ALARM0_CTRL + (sensor * 4)); 4813c2b90f1SJared McNeill val = (val >> ALARM_T_HOT_SHIFT) & ALARM_T_HOT_MASK; 4823c2b90f1SJared McNeill 483d19afc9aSEmmanuel Vadot return (sc->conf->to_temp(val, sensor)); 4840a30b4b2SJared McNeill } 4850a30b4b2SJared McNeill 4860a30b4b2SJared McNeill static void 4870a30b4b2SJared McNeill aw_thermal_setalarm(struct aw_thermal_softc *sc, int sensor, int temp) 4880a30b4b2SJared McNeill { 4890a30b4b2SJared McNeill uint32_t val; 4900a30b4b2SJared McNeill 4910a30b4b2SJared McNeill val = RD4(sc, THS_ALARM0_CTRL + (sensor * 4)); 4920a30b4b2SJared McNeill val &= ~(ALARM_T_HOT_MASK << ALARM_T_HOT_SHIFT); 493d19afc9aSEmmanuel Vadot val |= (sc->conf->to_reg(temp, sensor) << ALARM_T_HOT_SHIFT); 4940a30b4b2SJared McNeill WR4(sc, THS_ALARM0_CTRL + (sensor * 4), val); 495343044c4SJared McNeill } 496343044c4SJared McNeill 497343044c4SJared McNeill static int 498343044c4SJared McNeill aw_thermal_sysctl(SYSCTL_HANDLER_ARGS) 499343044c4SJared McNeill { 500343044c4SJared McNeill struct aw_thermal_softc *sc; 501d69d5ab0SJared McNeill int sensor, val; 502343044c4SJared McNeill 503343044c4SJared McNeill sc = arg1; 504343044c4SJared McNeill sensor = arg2; 505343044c4SJared McNeill 5060a30b4b2SJared McNeill val = aw_thermal_gettemp(sc, sensor) + TEMP_C_TO_K; 507343044c4SJared McNeill 508343044c4SJared McNeill return sysctl_handle_opaque(oidp, &val, sizeof(val), req); 509343044c4SJared McNeill } 510343044c4SJared McNeill 511d69d5ab0SJared McNeill static void 5123c2b90f1SJared McNeill aw_thermal_throttle(struct aw_thermal_softc *sc, int enable) 5133c2b90f1SJared McNeill { 5143c2b90f1SJared McNeill device_t cf_dev; 5153c2b90f1SJared McNeill int count, error; 5163c2b90f1SJared McNeill 5173c2b90f1SJared McNeill if (enable == sc->throttle) 5183c2b90f1SJared McNeill return; 5193c2b90f1SJared McNeill 5203c2b90f1SJared McNeill if (enable != 0) { 5213c2b90f1SJared McNeill /* Set the lowest available frequency */ 5223c2b90f1SJared McNeill cf_dev = devclass_get_device(devclass_find("cpufreq"), 0); 5233c2b90f1SJared McNeill if (cf_dev == NULL) 5243c2b90f1SJared McNeill return; 5253c2b90f1SJared McNeill count = MAX_CF_LEVELS; 5263c2b90f1SJared McNeill error = CPUFREQ_LEVELS(cf_dev, sc->levels, &count); 5273c2b90f1SJared McNeill if (error != 0 || count == 0) 5283c2b90f1SJared McNeill return; 5293c2b90f1SJared McNeill sc->min_freq = sc->levels[count - 1].total_set.freq; 5303c2b90f1SJared McNeill error = CPUFREQ_SET(cf_dev, &sc->levels[count - 1], 5313c2b90f1SJared McNeill CPUFREQ_PRIO_USER); 5323c2b90f1SJared McNeill if (error != 0) 5333c2b90f1SJared McNeill return; 5343c2b90f1SJared McNeill } 5353c2b90f1SJared McNeill 5363c2b90f1SJared McNeill sc->throttle = enable; 5373c2b90f1SJared McNeill } 5383c2b90f1SJared McNeill 5393c2b90f1SJared McNeill static void 5402e4f9347SJared McNeill aw_thermal_cf_task(void *arg, int pending) 5412e4f9347SJared McNeill { 5422e4f9347SJared McNeill struct aw_thermal_softc *sc; 5432e4f9347SJared McNeill 5442e4f9347SJared McNeill sc = arg; 5452e4f9347SJared McNeill 5462e4f9347SJared McNeill aw_thermal_throttle(sc, 1); 5472e4f9347SJared McNeill } 5482e4f9347SJared McNeill 5492e4f9347SJared McNeill static void 5503c2b90f1SJared McNeill aw_thermal_cf_pre_change(void *arg, const struct cf_level *level, int *status) 5513c2b90f1SJared McNeill { 5523c2b90f1SJared McNeill struct aw_thermal_softc *sc; 5533c2b90f1SJared McNeill int temp_cur, temp_alarm; 5543c2b90f1SJared McNeill 5553c2b90f1SJared McNeill sc = arg; 5563c2b90f1SJared McNeill 5573c2b90f1SJared McNeill if (aw_thermal_throttle_enable == 0 || sc->throttle == 0 || 5583c2b90f1SJared McNeill level->total_set.freq == sc->min_freq) 5593c2b90f1SJared McNeill return; 5603c2b90f1SJared McNeill 5613c2b90f1SJared McNeill temp_cur = aw_thermal_gettemp(sc, 0); 5623c2b90f1SJared McNeill temp_alarm = aw_thermal_getalarm(sc, 0); 5633c2b90f1SJared McNeill 5643c2b90f1SJared McNeill if (temp_cur < temp_alarm) 5653c2b90f1SJared McNeill aw_thermal_throttle(sc, 0); 5663c2b90f1SJared McNeill else 5673c2b90f1SJared McNeill *status = ENXIO; 5683c2b90f1SJared McNeill } 5693c2b90f1SJared McNeill 5703c2b90f1SJared McNeill static void 571d69d5ab0SJared McNeill aw_thermal_intr(void *arg) 572d69d5ab0SJared McNeill { 573d69d5ab0SJared McNeill struct aw_thermal_softc *sc; 574d69d5ab0SJared McNeill device_t dev; 575d69d5ab0SJared McNeill uint32_t ints; 576d69d5ab0SJared McNeill 577d69d5ab0SJared McNeill dev = arg; 578d69d5ab0SJared McNeill sc = device_get_softc(dev); 579d69d5ab0SJared McNeill 580d69d5ab0SJared McNeill ints = RD4(sc, THS_INTS); 581d69d5ab0SJared McNeill WR4(sc, THS_INTS, ints); 582d69d5ab0SJared McNeill 583d69d5ab0SJared McNeill if ((ints & SHUT_INT_ALL) != 0) { 584d69d5ab0SJared McNeill device_printf(dev, 585d69d5ab0SJared McNeill "WARNING - current temperature exceeds safe limits\n"); 586d69d5ab0SJared McNeill shutdown_nice(RB_POWEROFF); 587d69d5ab0SJared McNeill } 5883c2b90f1SJared McNeill 5893c2b90f1SJared McNeill if ((ints & ALARM_INT_ALL) != 0) 5902e4f9347SJared McNeill taskqueue_enqueue(taskqueue_thread, &sc->cf_task); 591d69d5ab0SJared McNeill } 592d69d5ab0SJared McNeill 593343044c4SJared McNeill static int 594343044c4SJared McNeill aw_thermal_probe(device_t dev) 595343044c4SJared McNeill { 596343044c4SJared McNeill if (!ofw_bus_status_okay(dev)) 597343044c4SJared McNeill return (ENXIO); 598343044c4SJared McNeill 599343044c4SJared McNeill if (THS_CONF(dev) == NULL) 600343044c4SJared McNeill return (ENXIO); 601343044c4SJared McNeill 602343044c4SJared McNeill device_set_desc(dev, "Allwinner Thermal Sensor Controller"); 603343044c4SJared McNeill return (BUS_PROBE_DEFAULT); 604343044c4SJared McNeill } 605343044c4SJared McNeill 606343044c4SJared McNeill static int 607343044c4SJared McNeill aw_thermal_attach(device_t dev) 608343044c4SJared McNeill { 609343044c4SJared McNeill struct aw_thermal_softc *sc; 610d69d5ab0SJared McNeill hwreset_t rst; 611d69d5ab0SJared McNeill int i, error; 612d69d5ab0SJared McNeill void *ih; 613343044c4SJared McNeill 614343044c4SJared McNeill sc = device_get_softc(dev); 615d19afc9aSEmmanuel Vadot sc->dev = dev; 616d69d5ab0SJared McNeill rst = NULL; 617d69d5ab0SJared McNeill ih = NULL; 618343044c4SJared McNeill 619343044c4SJared McNeill sc->conf = THS_CONF(dev); 6202e4f9347SJared McNeill TASK_INIT(&sc->cf_task, 0, aw_thermal_cf_task, sc); 621343044c4SJared McNeill 622d69d5ab0SJared McNeill if (bus_alloc_resources(dev, aw_thermal_spec, sc->res) != 0) { 623343044c4SJared McNeill device_printf(dev, "cannot allocate resources for device\n"); 624343044c4SJared McNeill return (ENXIO); 625343044c4SJared McNeill } 626343044c4SJared McNeill 627d19afc9aSEmmanuel Vadot if (clk_get_by_ofw_name(dev, 0, "apb", &sc->clk_apb) == 0) { 628d19afc9aSEmmanuel Vadot error = clk_enable(sc->clk_apb); 629d69d5ab0SJared McNeill if (error != 0) { 630d19afc9aSEmmanuel Vadot device_printf(dev, "cannot enable apb clock\n"); 631d69d5ab0SJared McNeill goto fail; 632d69d5ab0SJared McNeill } 633d69d5ab0SJared McNeill } 634d19afc9aSEmmanuel Vadot 635d19afc9aSEmmanuel Vadot if (clk_get_by_ofw_name(dev, 0, "ths", &sc->clk_ths) == 0) { 636d19afc9aSEmmanuel Vadot error = clk_set_freq(sc->clk_ths, sc->conf->clk_rate, 0); 637d69d5ab0SJared McNeill if (error != 0) { 638d69d5ab0SJared McNeill device_printf(dev, "cannot set ths clock rate\n"); 639d69d5ab0SJared McNeill goto fail; 640d69d5ab0SJared McNeill } 641d19afc9aSEmmanuel Vadot error = clk_enable(sc->clk_ths); 642d69d5ab0SJared McNeill if (error != 0) { 643d69d5ab0SJared McNeill device_printf(dev, "cannot enable ths clock\n"); 644d69d5ab0SJared McNeill goto fail; 645d69d5ab0SJared McNeill } 646d69d5ab0SJared McNeill } 647d19afc9aSEmmanuel Vadot 648d69d5ab0SJared McNeill if (hwreset_get_by_ofw_idx(dev, 0, 0, &rst) == 0) { 649d69d5ab0SJared McNeill error = hwreset_deassert(rst); 650d69d5ab0SJared McNeill if (error != 0) { 651d69d5ab0SJared McNeill device_printf(dev, "cannot de-assert reset\n"); 652d69d5ab0SJared McNeill goto fail; 653d69d5ab0SJared McNeill } 654d69d5ab0SJared McNeill } 655343044c4SJared McNeill 656d69d5ab0SJared McNeill error = bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE, 657d69d5ab0SJared McNeill NULL, aw_thermal_intr, dev, &ih); 658d69d5ab0SJared McNeill if (error != 0) { 659d69d5ab0SJared McNeill device_printf(dev, "cannot setup interrupt handler\n"); 660d69d5ab0SJared McNeill goto fail; 661d69d5ab0SJared McNeill } 662d69d5ab0SJared McNeill 6630a30b4b2SJared McNeill for (i = 0; i < sc->conf->nsensors; i++) { 6640a30b4b2SJared McNeill if (sc->conf->sensors[i].init_alarm > 0) 6650a30b4b2SJared McNeill aw_thermal_setalarm(sc, i, 6660a30b4b2SJared McNeill sc->conf->sensors[i].init_alarm); 6670a30b4b2SJared McNeill if (sc->conf->sensors[i].init_shut > 0) 6680a30b4b2SJared McNeill aw_thermal_setshut(sc, i, 6690a30b4b2SJared McNeill sc->conf->sensors[i].init_shut); 6700a30b4b2SJared McNeill } 6710a30b4b2SJared McNeill 672d69d5ab0SJared McNeill if (aw_thermal_init(sc) != 0) 673d69d5ab0SJared McNeill goto fail; 674d69d5ab0SJared McNeill 675d69d5ab0SJared McNeill for (i = 0; i < sc->conf->nsensors; i++) 676343044c4SJared McNeill SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 677343044c4SJared McNeill SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 678d69d5ab0SJared McNeill OID_AUTO, sc->conf->sensors[i].name, 679343044c4SJared McNeill CTLTYPE_INT | CTLFLAG_RD, 680d69d5ab0SJared McNeill sc, i, aw_thermal_sysctl, "IK0", 681d69d5ab0SJared McNeill sc->conf->sensors[i].desc); 682343044c4SJared McNeill 6833c2b90f1SJared McNeill if (bootverbose) 6843c2b90f1SJared McNeill for (i = 0; i < sc->conf->nsensors; i++) { 6853c2b90f1SJared McNeill device_printf(dev, 686d19afc9aSEmmanuel Vadot "%s: alarm %dC hyst %dC shut %dC\n", 687d19afc9aSEmmanuel Vadot sc->conf->sensors[i].name, 6880a30b4b2SJared McNeill aw_thermal_getalarm(sc, i), 6890a30b4b2SJared McNeill aw_thermal_gethyst(sc, i), 6900a30b4b2SJared McNeill aw_thermal_getshut(sc, i)); 6913c2b90f1SJared McNeill } 6923c2b90f1SJared McNeill 6933c2b90f1SJared McNeill sc->cf_pre_tag = EVENTHANDLER_REGISTER(cpufreq_pre_change, 6943c2b90f1SJared McNeill aw_thermal_cf_pre_change, sc, EVENTHANDLER_PRI_FIRST); 6953c2b90f1SJared McNeill 696343044c4SJared McNeill return (0); 697d69d5ab0SJared McNeill 698d69d5ab0SJared McNeill fail: 699d69d5ab0SJared McNeill if (ih != NULL) 700d69d5ab0SJared McNeill bus_teardown_intr(dev, sc->res[1], ih); 701d69d5ab0SJared McNeill if (rst != NULL) 702d69d5ab0SJared McNeill hwreset_release(rst); 703d19afc9aSEmmanuel Vadot if (sc->clk_apb != NULL) 704d19afc9aSEmmanuel Vadot clk_release(sc->clk_apb); 705d19afc9aSEmmanuel Vadot if (sc->clk_ths != NULL) 706d19afc9aSEmmanuel Vadot clk_release(sc->clk_ths); 707d69d5ab0SJared McNeill bus_release_resources(dev, aw_thermal_spec, sc->res); 708d69d5ab0SJared McNeill 709d69d5ab0SJared McNeill return (ENXIO); 710343044c4SJared McNeill } 711343044c4SJared McNeill 712343044c4SJared McNeill static device_method_t aw_thermal_methods[] = { 713343044c4SJared McNeill /* Device interface */ 714343044c4SJared McNeill DEVMETHOD(device_probe, aw_thermal_probe), 715343044c4SJared McNeill DEVMETHOD(device_attach, aw_thermal_attach), 716343044c4SJared McNeill 717343044c4SJared McNeill DEVMETHOD_END 718343044c4SJared McNeill }; 719343044c4SJared McNeill 720343044c4SJared McNeill static driver_t aw_thermal_driver = { 721343044c4SJared McNeill "aw_thermal", 722343044c4SJared McNeill aw_thermal_methods, 723343044c4SJared McNeill sizeof(struct aw_thermal_softc), 724343044c4SJared McNeill }; 725343044c4SJared McNeill 726343044c4SJared McNeill static devclass_t aw_thermal_devclass; 727343044c4SJared McNeill 728343044c4SJared McNeill DRIVER_MODULE(aw_thermal, simplebus, aw_thermal_driver, aw_thermal_devclass, 729343044c4SJared McNeill 0, 0); 730343044c4SJared McNeill MODULE_VERSION(aw_thermal, 1); 731f9b1c6a0SEmmanuel Vadot MODULE_DEPEND(aw_thermal, aw_sid, 1, 1, 1); 732f9b1c6a0SEmmanuel Vadot SIMPLEBUS_PNP_INFO(compat_data); 733