1 /*- 2 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org> 3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 /* 28 * X-Powers AXP803/813/818 PMU for Allwinner SoCs 29 */ 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/eventhandler.h> 34 #include <sys/bus.h> 35 #include <sys/rman.h> 36 #include <sys/kernel.h> 37 #include <sys/reboot.h> 38 #include <sys/gpio.h> 39 #include <sys/module.h> 40 #include <machine/bus.h> 41 42 #include <dev/iicbus/iicbus.h> 43 #include <dev/iicbus/iiconf.h> 44 45 #include <dev/gpio/gpiobusvar.h> 46 47 #include <dev/ofw/ofw_bus.h> 48 #include <dev/ofw/ofw_bus_subr.h> 49 50 #include <dev/extres/regulator/regulator.h> 51 52 #include "gpio_if.h" 53 #include "iicbus_if.h" 54 #include "regdev_if.h" 55 56 MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8xx power regulator"); 57 58 #define AXP_POWERSRC 0x00 59 #define AXP_POWERSRC_ACIN (1 << 7) 60 #define AXP_POWERSRC_VBUS (1 << 5) 61 #define AXP_POWERSRC_VBAT (1 << 3) 62 #define AXP_POWERSRC_CHARING (1 << 2) /* Charging Direction */ 63 #define AXP_POWERSRC_SHORTED (1 << 1) 64 #define AXP_POWERSRC_STARTUP (1 << 0) 65 #define AXP_POWERMODE 0x01 66 #define AXP_POWERMODE_BAT_CHARGING (1 << 6) 67 #define AXP_POWERMODE_BAT_PRESENT (1 << 5) 68 #define AXP_POWERMODE_BAT_VALID (1 << 4) 69 #define AXP_ICTYPE 0x03 70 #define AXP_POWERCTL1 0x10 71 #define AXP_POWERCTL1_DCDC7 (1 << 6) /* AXP813/818 only */ 72 #define AXP_POWERCTL1_DCDC6 (1 << 5) 73 #define AXP_POWERCTL1_DCDC5 (1 << 4) 74 #define AXP_POWERCTL1_DCDC4 (1 << 3) 75 #define AXP_POWERCTL1_DCDC3 (1 << 2) 76 #define AXP_POWERCTL1_DCDC2 (1 << 1) 77 #define AXP_POWERCTL1_DCDC1 (1 << 0) 78 #define AXP_POWERCTL2 0x12 79 #define AXP_POWERCTL2_DC1SW (1 << 7) /* AXP803 only */ 80 #define AXP_POWERCTL2_DLDO4 (1 << 6) 81 #define AXP_POWERCTL2_DLDO3 (1 << 5) 82 #define AXP_POWERCTL2_DLDO2 (1 << 4) 83 #define AXP_POWERCTL2_DLDO1 (1 << 3) 84 #define AXP_POWERCTL2_ELDO3 (1 << 2) 85 #define AXP_POWERCTL2_ELDO2 (1 << 1) 86 #define AXP_POWERCTL2_ELDO1 (1 << 0) 87 #define AXP_POWERCTL3 0x13 88 #define AXP_POWERCTL3_ALDO3 (1 << 7) 89 #define AXP_POWERCTL3_ALDO2 (1 << 6) 90 #define AXP_POWERCTL3_ALDO1 (1 << 5) 91 #define AXP_POWERCTL3_FLDO3 (1 << 4) /* AXP813/818 only */ 92 #define AXP_POWERCTL3_FLDO2 (1 << 3) 93 #define AXP_POWERCTL3_FLDO1 (1 << 2) 94 #define AXP_VOLTCTL_DLDO1 0x15 95 #define AXP_VOLTCTL_DLDO2 0x16 96 #define AXP_VOLTCTL_DLDO3 0x17 97 #define AXP_VOLTCTL_DLDO4 0x18 98 #define AXP_VOLTCTL_ELDO1 0x19 99 #define AXP_VOLTCTL_ELDO2 0x1A 100 #define AXP_VOLTCTL_ELDO3 0x1B 101 #define AXP_VOLTCTL_FLDO1 0x1C 102 #define AXP_VOLTCTL_FLDO2 0x1D 103 #define AXP_VOLTCTL_DCDC1 0x20 104 #define AXP_VOLTCTL_DCDC2 0x21 105 #define AXP_VOLTCTL_DCDC3 0x22 106 #define AXP_VOLTCTL_DCDC4 0x23 107 #define AXP_VOLTCTL_DCDC5 0x24 108 #define AXP_VOLTCTL_DCDC6 0x25 109 #define AXP_VOLTCTL_DCDC7 0x26 110 #define AXP_VOLTCTL_ALDO1 0x28 111 #define AXP_VOLTCTL_ALDO2 0x29 112 #define AXP_VOLTCTL_ALDO3 0x2A 113 #define AXP_VOLTCTL_STATUS (1 << 7) 114 #define AXP_VOLTCTL_MASK 0x7f 115 #define AXP_POWERBAT 0x32 116 #define AXP_POWERBAT_SHUTDOWN (1 << 7) 117 #define AXP_CHARGERCTL1 0x33 118 #define AXP_CHARGERCTL1_MIN 0 119 #define AXP_CHARGERCTL1_MAX 13 120 #define AXP_CHARGERCTL1_CMASK 0xf 121 #define AXP_IRQEN1 0x40 122 #define AXP_IRQEN1_ACIN_HI (1 << 6) 123 #define AXP_IRQEN1_ACIN_LO (1 << 5) 124 #define AXP_IRQEN1_VBUS_HI (1 << 3) 125 #define AXP_IRQEN1_VBUS_LO (1 << 2) 126 #define AXP_IRQEN2 0x41 127 #define AXP_IRQEN2_BAT_IN (1 << 7) 128 #define AXP_IRQEN2_BAT_NO (1 << 6) 129 #define AXP_IRQEN2_BATCHGC (1 << 3) 130 #define AXP_IRQEN2_BATCHGD (1 << 2) 131 #define AXP_IRQEN3 0x42 132 #define AXP_IRQEN4 0x43 133 #define AXP_IRQEN4_BATLVL_LO1 (1 << 1) 134 #define AXP_IRQEN4_BATLVL_LO0 (1 << 0) 135 #define AXP_IRQEN5 0x44 136 #define AXP_IRQEN5_POKSIRQ (1 << 4) 137 #define AXP_IRQEN5_POKLIRQ (1 << 3) 138 #define AXP_IRQEN6 0x45 139 #define AXP_IRQSTAT1 0x48 140 #define AXP_IRQSTAT1_ACIN_HI (1 << 6) 141 #define AXP_IRQSTAT1_ACIN_LO (1 << 5) 142 #define AXP_IRQSTAT1_VBUS_HI (1 << 3) 143 #define AXP_IRQSTAT1_VBUS_LO (1 << 2) 144 #define AXP_IRQSTAT2 0x49 145 #define AXP_IRQSTAT2_BAT_IN (1 << 7) 146 #define AXP_IRQSTAT2_BAT_NO (1 << 6) 147 #define AXP_IRQSTAT2_BATCHGC (1 << 3) 148 #define AXP_IRQSTAT2_BATCHGD (1 << 2) 149 #define AXP_IRQSTAT3 0x4a 150 #define AXP_IRQSTAT4 0x4b 151 #define AXP_IRQSTAT4_BATLVL_LO1 (1 << 1) 152 #define AXP_IRQSTAT4_BATLVL_LO0 (1 << 0) 153 #define AXP_IRQSTAT5 0x4c 154 #define AXP_IRQSTAT5_POKSIRQ (1 << 4) 155 #define AXP_IRQEN5_POKLIRQ (1 << 3) 156 #define AXP_IRQSTAT6 0x4d 157 #define AXP_BATSENSE_HI 0x78 158 #define AXP_BATSENSE_LO 0x79 159 #define AXP_BATCHG_HI 0x7a 160 #define AXP_BATCHG_LO 0x7b 161 #define AXP_BATDISCHG_HI 0x7c 162 #define AXP_BATDISCHG_LO 0x7d 163 #define AXP_GPIO0_CTRL 0x90 164 #define AXP_GPIO0LDO_CTRL 0x91 165 #define AXP_GPIO1_CTRL 0x92 166 #define AXP_GPIO1LDO_CTRL 0x93 167 #define AXP_GPIO_FUNC (0x7 << 0) 168 #define AXP_GPIO_FUNC_SHIFT 0 169 #define AXP_GPIO_FUNC_DRVLO 0 170 #define AXP_GPIO_FUNC_DRVHI 1 171 #define AXP_GPIO_FUNC_INPUT 2 172 #define AXP_GPIO_FUNC_LDO_ON 3 173 #define AXP_GPIO_FUNC_LDO_OFF 4 174 #define AXP_GPIO_SIGBIT 0x94 175 #define AXP_GPIO_PD 0x97 176 #define AXP_FUEL_GAUGECTL 0xb8 177 #define AXP_FUEL_GAUGECTL_EN (1 << 7) 178 179 #define AXP_BAT_CAP 0xb9 180 #define AXP_BAT_CAP_VALID (1 << 7) 181 #define AXP_BAT_CAP_PERCENT 0x7f 182 183 #define AXP_BAT_MAX_CAP_HI 0xe0 184 #define AXP_BAT_MAX_CAP_VALID (1 << 7) 185 #define AXP_BAT_MAX_CAP_LO 0xe1 186 187 #define AXP_BAT_COULOMB_HI 0xe2 188 #define AXP_BAT_COULOMB_VALID (1 << 7) 189 #define AXP_BAT_COULOMB_LO 0xe3 190 191 #define AXP_BAT_CAP_WARN 0xe6 192 #define AXP_BAT_CAP_WARN_LV1 0xf0 /* Bits 4, 5, 6, 7 */ 193 #define AXP_BAP_CAP_WARN_LV1BASE 5 /* 5-20%, 1% per step */ 194 #define AXP_BAT_CAP_WARN_LV2 0xf /* Bits 0, 1, 2, 3 */ 195 196 /* Sensor conversion macros */ 197 #define AXP_SENSOR_BAT_H(hi) ((hi) << 4) 198 #define AXP_SENSOR_BAT_L(lo) ((lo) & 0xf) 199 #define AXP_SENSOR_COULOMB(hi, lo) (((hi & ~(1 << 7)) << 8) | (lo)) 200 201 static const struct { 202 const char *name; 203 uint8_t ctrl_reg; 204 } axp8xx_pins[] = { 205 { "GPIO0", AXP_GPIO0_CTRL }, 206 { "GPIO1", AXP_GPIO1_CTRL }, 207 }; 208 209 enum AXP8XX_TYPE { 210 AXP803 = 1, 211 AXP813, 212 }; 213 214 static struct ofw_compat_data compat_data[] = { 215 { "x-powers,axp803", AXP803 }, 216 { "x-powers,axp813", AXP813 }, 217 { "x-powers,axp818", AXP813 }, 218 { NULL, 0 } 219 }; 220 221 static struct resource_spec axp8xx_spec[] = { 222 { SYS_RES_IRQ, 0, RF_ACTIVE }, 223 { -1, 0 } 224 }; 225 226 struct axp8xx_regdef { 227 intptr_t id; 228 char *name; 229 char *supply_name; 230 uint8_t enable_reg; 231 uint8_t enable_mask; 232 uint8_t enable_value; 233 uint8_t disable_value; 234 uint8_t voltage_reg; 235 int voltage_min; 236 int voltage_max; 237 int voltage_step1; 238 int voltage_nstep1; 239 int voltage_step2; 240 int voltage_nstep2; 241 }; 242 243 enum axp8xx_reg_id { 244 AXP8XX_REG_ID_DCDC1 = 100, 245 AXP8XX_REG_ID_DCDC2, 246 AXP8XX_REG_ID_DCDC3, 247 AXP8XX_REG_ID_DCDC4, 248 AXP8XX_REG_ID_DCDC5, 249 AXP8XX_REG_ID_DCDC6, 250 AXP813_REG_ID_DCDC7, 251 AXP803_REG_ID_DC1SW, 252 AXP8XX_REG_ID_DLDO1, 253 AXP8XX_REG_ID_DLDO2, 254 AXP8XX_REG_ID_DLDO3, 255 AXP8XX_REG_ID_DLDO4, 256 AXP8XX_REG_ID_ELDO1, 257 AXP8XX_REG_ID_ELDO2, 258 AXP8XX_REG_ID_ELDO3, 259 AXP8XX_REG_ID_ALDO1, 260 AXP8XX_REG_ID_ALDO2, 261 AXP8XX_REG_ID_ALDO3, 262 AXP8XX_REG_ID_FLDO1, 263 AXP8XX_REG_ID_FLDO2, 264 AXP813_REG_ID_FLDO3, 265 AXP8XX_REG_ID_GPIO0_LDO, 266 AXP8XX_REG_ID_GPIO1_LDO, 267 }; 268 269 static struct axp8xx_regdef axp803_regdefs[] = { 270 { 271 .id = AXP803_REG_ID_DC1SW, 272 .name = "dc1sw", 273 .enable_reg = AXP_POWERCTL2, 274 .enable_mask = (uint8_t) AXP_POWERCTL2_DC1SW, 275 .enable_value = AXP_POWERCTL2_DC1SW, 276 }, 277 }; 278 279 static struct axp8xx_regdef axp813_regdefs[] = { 280 { 281 .id = AXP813_REG_ID_DCDC7, 282 .name = "dcdc7", 283 .enable_reg = AXP_POWERCTL1, 284 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC7, 285 .enable_value = AXP_POWERCTL1_DCDC7, 286 .voltage_reg = AXP_VOLTCTL_DCDC7, 287 .voltage_min = 600, 288 .voltage_max = 1520, 289 .voltage_step1 = 10, 290 .voltage_nstep1 = 50, 291 .voltage_step2 = 20, 292 .voltage_nstep2 = 21, 293 }, 294 }; 295 296 static struct axp8xx_regdef axp8xx_common_regdefs[] = { 297 { 298 .id = AXP8XX_REG_ID_DCDC1, 299 .name = "dcdc1", 300 .enable_reg = AXP_POWERCTL1, 301 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC1, 302 .enable_value = AXP_POWERCTL1_DCDC1, 303 .voltage_reg = AXP_VOLTCTL_DCDC1, 304 .voltage_min = 1600, 305 .voltage_max = 3400, 306 .voltage_step1 = 100, 307 .voltage_nstep1 = 18, 308 }, 309 { 310 .id = AXP8XX_REG_ID_DCDC2, 311 .name = "dcdc2", 312 .enable_reg = AXP_POWERCTL1, 313 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC2, 314 .enable_value = AXP_POWERCTL1_DCDC2, 315 .voltage_reg = AXP_VOLTCTL_DCDC2, 316 .voltage_min = 500, 317 .voltage_max = 1300, 318 .voltage_step1 = 10, 319 .voltage_nstep1 = 70, 320 .voltage_step2 = 20, 321 .voltage_nstep2 = 5, 322 }, 323 { 324 .id = AXP8XX_REG_ID_DCDC3, 325 .name = "dcdc3", 326 .enable_reg = AXP_POWERCTL1, 327 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC3, 328 .enable_value = AXP_POWERCTL1_DCDC3, 329 .voltage_reg = AXP_VOLTCTL_DCDC3, 330 .voltage_min = 500, 331 .voltage_max = 1300, 332 .voltage_step1 = 10, 333 .voltage_nstep1 = 70, 334 .voltage_step2 = 20, 335 .voltage_nstep2 = 5, 336 }, 337 { 338 .id = AXP8XX_REG_ID_DCDC4, 339 .name = "dcdc4", 340 .enable_reg = AXP_POWERCTL1, 341 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC4, 342 .enable_value = AXP_POWERCTL1_DCDC4, 343 .voltage_reg = AXP_VOLTCTL_DCDC4, 344 .voltage_min = 500, 345 .voltage_max = 1300, 346 .voltage_step1 = 10, 347 .voltage_nstep1 = 70, 348 .voltage_step2 = 20, 349 .voltage_nstep2 = 5, 350 }, 351 { 352 .id = AXP8XX_REG_ID_DCDC5, 353 .name = "dcdc5", 354 .enable_reg = AXP_POWERCTL1, 355 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC5, 356 .enable_value = AXP_POWERCTL1_DCDC5, 357 .voltage_reg = AXP_VOLTCTL_DCDC5, 358 .voltage_min = 800, 359 .voltage_max = 1840, 360 .voltage_step1 = 10, 361 .voltage_nstep1 = 42, 362 .voltage_step2 = 20, 363 .voltage_nstep2 = 36, 364 }, 365 { 366 .id = AXP8XX_REG_ID_DCDC6, 367 .name = "dcdc6", 368 .enable_reg = AXP_POWERCTL1, 369 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC6, 370 .enable_value = AXP_POWERCTL1_DCDC6, 371 .voltage_reg = AXP_VOLTCTL_DCDC6, 372 .voltage_min = 600, 373 .voltage_max = 1520, 374 .voltage_step1 = 10, 375 .voltage_nstep1 = 50, 376 .voltage_step2 = 20, 377 .voltage_nstep2 = 21, 378 }, 379 { 380 .id = AXP8XX_REG_ID_DLDO1, 381 .name = "dldo1", 382 .enable_reg = AXP_POWERCTL2, 383 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO1, 384 .enable_value = AXP_POWERCTL2_DLDO1, 385 .voltage_reg = AXP_VOLTCTL_DLDO1, 386 .voltage_min = 700, 387 .voltage_max = 3300, 388 .voltage_step1 = 100, 389 .voltage_nstep1 = 26, 390 }, 391 { 392 .id = AXP8XX_REG_ID_DLDO2, 393 .name = "dldo2", 394 .enable_reg = AXP_POWERCTL2, 395 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO2, 396 .enable_value = AXP_POWERCTL2_DLDO2, 397 .voltage_reg = AXP_VOLTCTL_DLDO2, 398 .voltage_min = 700, 399 .voltage_max = 4200, 400 .voltage_step1 = 100, 401 .voltage_nstep1 = 27, 402 .voltage_step2 = 200, 403 .voltage_nstep2 = 4, 404 }, 405 { 406 .id = AXP8XX_REG_ID_DLDO3, 407 .name = "dldo3", 408 .enable_reg = AXP_POWERCTL2, 409 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO3, 410 .enable_value = AXP_POWERCTL2_DLDO3, 411 .voltage_reg = AXP_VOLTCTL_DLDO3, 412 .voltage_min = 700, 413 .voltage_max = 3300, 414 .voltage_step1 = 100, 415 .voltage_nstep1 = 26, 416 }, 417 { 418 .id = AXP8XX_REG_ID_DLDO4, 419 .name = "dldo4", 420 .enable_reg = AXP_POWERCTL2, 421 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO4, 422 .enable_value = AXP_POWERCTL2_DLDO4, 423 .voltage_reg = AXP_VOLTCTL_DLDO4, 424 .voltage_min = 700, 425 .voltage_max = 3300, 426 .voltage_step1 = 100, 427 .voltage_nstep1 = 26, 428 }, 429 { 430 .id = AXP8XX_REG_ID_ALDO1, 431 .name = "aldo1", 432 .enable_reg = AXP_POWERCTL3, 433 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO1, 434 .enable_value = AXP_POWERCTL3_ALDO1, 435 .voltage_reg = AXP_VOLTCTL_ALDO1, 436 .voltage_min = 700, 437 .voltage_max = 3300, 438 .voltage_step1 = 100, 439 .voltage_nstep1 = 26, 440 }, 441 { 442 .id = AXP8XX_REG_ID_ALDO2, 443 .name = "aldo2", 444 .enable_reg = AXP_POWERCTL3, 445 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO2, 446 .enable_value = AXP_POWERCTL3_ALDO2, 447 .voltage_reg = AXP_VOLTCTL_ALDO2, 448 .voltage_min = 700, 449 .voltage_max = 3300, 450 .voltage_step1 = 100, 451 .voltage_nstep1 = 26, 452 }, 453 { 454 .id = AXP8XX_REG_ID_ALDO3, 455 .name = "aldo3", 456 .enable_reg = AXP_POWERCTL3, 457 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO3, 458 .enable_value = AXP_POWERCTL3_ALDO3, 459 .voltage_reg = AXP_VOLTCTL_ALDO3, 460 .voltage_min = 700, 461 .voltage_max = 3300, 462 .voltage_step1 = 100, 463 .voltage_nstep1 = 26, 464 }, 465 { 466 .id = AXP8XX_REG_ID_ELDO1, 467 .name = "eldo1", 468 .enable_reg = AXP_POWERCTL2, 469 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO1, 470 .enable_value = AXP_POWERCTL2_ELDO1, 471 .voltage_reg = AXP_VOLTCTL_ELDO1, 472 .voltage_min = 700, 473 .voltage_max = 1900, 474 .voltage_step1 = 50, 475 .voltage_nstep1 = 24, 476 }, 477 { 478 .id = AXP8XX_REG_ID_ELDO2, 479 .name = "eldo2", 480 .enable_reg = AXP_POWERCTL2, 481 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO2, 482 .enable_value = AXP_POWERCTL2_ELDO2, 483 .voltage_reg = AXP_VOLTCTL_ELDO2, 484 .voltage_min = 700, 485 .voltage_max = 1900, 486 .voltage_step1 = 50, 487 .voltage_nstep1 = 24, 488 }, 489 { 490 .id = AXP8XX_REG_ID_ELDO3, 491 .name = "eldo3", 492 .enable_reg = AXP_POWERCTL2, 493 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO3, 494 .enable_value = AXP_POWERCTL2_ELDO3, 495 .voltage_reg = AXP_VOLTCTL_ELDO3, 496 .voltage_min = 700, 497 .voltage_max = 1900, 498 .voltage_step1 = 50, 499 .voltage_nstep1 = 24, 500 }, 501 { 502 .id = AXP8XX_REG_ID_FLDO1, 503 .name = "fldo1", 504 .enable_reg = AXP_POWERCTL3, 505 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO1, 506 .enable_value = AXP_POWERCTL3_FLDO1, 507 .voltage_reg = AXP_VOLTCTL_FLDO1, 508 .voltage_min = 700, 509 .voltage_max = 1450, 510 .voltage_step1 = 50, 511 .voltage_nstep1 = 15, 512 }, 513 { 514 .id = AXP8XX_REG_ID_FLDO2, 515 .name = "fldo2", 516 .enable_reg = AXP_POWERCTL3, 517 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO2, 518 .enable_value = AXP_POWERCTL3_FLDO2, 519 .voltage_reg = AXP_VOLTCTL_FLDO2, 520 .voltage_min = 700, 521 .voltage_max = 1450, 522 .voltage_step1 = 50, 523 .voltage_nstep1 = 15, 524 }, 525 { 526 .id = AXP8XX_REG_ID_GPIO0_LDO, 527 .name = "ldo-io0", 528 .enable_reg = AXP_GPIO0_CTRL, 529 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 530 .enable_value = AXP_GPIO_FUNC_LDO_ON, 531 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 532 .voltage_reg = AXP_GPIO0LDO_CTRL, 533 .voltage_min = 700, 534 .voltage_max = 3300, 535 .voltage_step1 = 100, 536 .voltage_nstep1 = 26, 537 }, 538 { 539 .id = AXP8XX_REG_ID_GPIO1_LDO, 540 .name = "ldo-io1", 541 .enable_reg = AXP_GPIO1_CTRL, 542 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 543 .enable_value = AXP_GPIO_FUNC_LDO_ON, 544 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 545 .voltage_reg = AXP_GPIO1LDO_CTRL, 546 .voltage_min = 700, 547 .voltage_max = 3300, 548 .voltage_step1 = 100, 549 .voltage_nstep1 = 26, 550 }, 551 }; 552 553 enum axp8xx_sensor { 554 AXP_SENSOR_ACIN_PRESENT, 555 AXP_SENSOR_VBUS_PRESENT, 556 AXP_SENSOR_BATT_PRESENT, 557 AXP_SENSOR_BATT_CHARGING, 558 AXP_SENSOR_BATT_CHARGE_STATE, 559 AXP_SENSOR_BATT_VOLTAGE, 560 AXP_SENSOR_BATT_CHARGE_CURRENT, 561 AXP_SENSOR_BATT_DISCHARGE_CURRENT, 562 AXP_SENSOR_BATT_CAPACITY_PERCENT, 563 AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 564 AXP_SENSOR_BATT_CURRENT_CAPACITY, 565 }; 566 567 enum battery_capacity_state { 568 BATT_CAPACITY_NORMAL = 1, /* normal cap in battery */ 569 BATT_CAPACITY_WARNING, /* warning cap in battery */ 570 BATT_CAPACITY_CRITICAL, /* critical cap in battery */ 571 BATT_CAPACITY_HIGH, /* high cap in battery */ 572 BATT_CAPACITY_MAX, /* maximum cap in battery */ 573 BATT_CAPACITY_LOW /* low cap in battery */ 574 }; 575 576 struct axp8xx_sensors { 577 int id; 578 const char *name; 579 const char *desc; 580 const char *format; 581 }; 582 583 static const struct axp8xx_sensors axp8xx_common_sensors[] = { 584 { 585 .id = AXP_SENSOR_ACIN_PRESENT, 586 .name = "acin", 587 .format = "I", 588 .desc = "ACIN Present", 589 }, 590 { 591 .id = AXP_SENSOR_VBUS_PRESENT, 592 .name = "vbus", 593 .format = "I", 594 .desc = "VBUS Present", 595 }, 596 { 597 .id = AXP_SENSOR_BATT_PRESENT, 598 .name = "bat", 599 .format = "I", 600 .desc = "Battery Present", 601 }, 602 { 603 .id = AXP_SENSOR_BATT_CHARGING, 604 .name = "batcharging", 605 .format = "I", 606 .desc = "Battery Charging", 607 }, 608 { 609 .id = AXP_SENSOR_BATT_CHARGE_STATE, 610 .name = "batchargestate", 611 .format = "I", 612 .desc = "Battery Charge State", 613 }, 614 { 615 .id = AXP_SENSOR_BATT_VOLTAGE, 616 .name = "batvolt", 617 .format = "I", 618 .desc = "Battery Voltage", 619 }, 620 { 621 .id = AXP_SENSOR_BATT_CHARGE_CURRENT, 622 .name = "batchargecurrent", 623 .format = "I", 624 .desc = "Average Battery Charging Current", 625 }, 626 { 627 .id = AXP_SENSOR_BATT_DISCHARGE_CURRENT, 628 .name = "batdischargecurrent", 629 .format = "I", 630 .desc = "Average Battery Discharging Current", 631 }, 632 { 633 .id = AXP_SENSOR_BATT_CAPACITY_PERCENT, 634 .name = "batcapacitypercent", 635 .format = "I", 636 .desc = "Battery Capacity Percentage", 637 }, 638 { 639 .id = AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 640 .name = "batmaxcapacity", 641 .format = "I", 642 .desc = "Battery Maximum Capacity", 643 }, 644 { 645 .id = AXP_SENSOR_BATT_CURRENT_CAPACITY, 646 .name = "batcurrentcapacity", 647 .format = "I", 648 .desc = "Battery Current Capacity", 649 }, 650 }; 651 652 struct axp8xx_config { 653 const char *name; 654 int batsense_step; /* uV */ 655 int charge_step; /* uA */ 656 int discharge_step; /* uA */ 657 int maxcap_step; /* uAh */ 658 int coulomb_step; /* uAh */ 659 }; 660 661 static struct axp8xx_config axp803_config = { 662 .name = "AXP803", 663 .batsense_step = 1100, 664 .charge_step = 1000, 665 .discharge_step = 1000, 666 .maxcap_step = 1456, 667 .coulomb_step = 1456, 668 }; 669 670 struct axp8xx_softc; 671 672 struct axp8xx_reg_sc { 673 struct regnode *regnode; 674 device_t base_dev; 675 struct axp8xx_regdef *def; 676 phandle_t xref; 677 struct regnode_std_param *param; 678 }; 679 680 struct axp8xx_softc { 681 struct resource *res; 682 uint16_t addr; 683 void *ih; 684 device_t gpiodev; 685 struct mtx mtx; 686 int busy; 687 688 int type; 689 690 /* Configs */ 691 const struct axp8xx_config *config; 692 693 /* Sensors */ 694 const struct axp8xx_sensors *sensors; 695 int nsensors; 696 697 /* Regulators */ 698 struct axp8xx_reg_sc **regs; 699 int nregs; 700 701 /* Warning, shutdown thresholds */ 702 int warn_thres; 703 int shut_thres; 704 }; 705 706 #define AXP_LOCK(sc) mtx_lock(&(sc)->mtx) 707 #define AXP_UNLOCK(sc) mtx_unlock(&(sc)->mtx) 708 static int axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt, 709 int max_uvolt, int *udelay); 710 711 static int 712 axp8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size) 713 { 714 struct axp8xx_softc *sc; 715 struct iic_msg msg[2]; 716 717 sc = device_get_softc(dev); 718 719 msg[0].slave = sc->addr; 720 msg[0].flags = IIC_M_WR; 721 msg[0].len = 1; 722 msg[0].buf = ® 723 724 msg[1].slave = sc->addr; 725 msg[1].flags = IIC_M_RD; 726 msg[1].len = size; 727 msg[1].buf = data; 728 729 return (iicbus_transfer(dev, msg, 2)); 730 } 731 732 static int 733 axp8xx_write(device_t dev, uint8_t reg, uint8_t val) 734 { 735 struct axp8xx_softc *sc; 736 struct iic_msg msg[2]; 737 738 sc = device_get_softc(dev); 739 740 msg[0].slave = sc->addr; 741 msg[0].flags = IIC_M_WR; 742 msg[0].len = 1; 743 msg[0].buf = ® 744 745 msg[1].slave = sc->addr; 746 msg[1].flags = IIC_M_WR; 747 msg[1].len = 1; 748 msg[1].buf = &val; 749 750 return (iicbus_transfer(dev, msg, 2)); 751 } 752 753 static int 754 axp8xx_regnode_init(struct regnode *regnode) 755 { 756 struct regnode_std_param *param; 757 int rv, udelay; 758 759 param = regnode_get_stdparam(regnode); 760 if (param->min_uvolt == 0) 761 return (0); 762 763 /* 764 * Set the regulator at the correct voltage 765 * Do not enable it, this is will be done either by a 766 * consumer or by regnode_set_constraint if boot_on is true 767 */ 768 rv = axp8xx_regnode_set_voltage(regnode, param->min_uvolt, 769 param->max_uvolt, &udelay); 770 if (rv != 0) 771 DELAY(udelay); 772 773 return (rv); 774 } 775 776 static int 777 axp8xx_regnode_enable(struct regnode *regnode, bool enable, int *udelay) 778 { 779 struct axp8xx_reg_sc *sc; 780 uint8_t val; 781 782 sc = regnode_get_softc(regnode); 783 784 if (bootverbose) 785 device_printf(sc->base_dev, "%sable %s (%s)\n", 786 enable ? "En" : "Dis", 787 regnode_get_name(regnode), 788 sc->def->name); 789 790 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1); 791 val &= ~sc->def->enable_mask; 792 if (enable) 793 val |= sc->def->enable_value; 794 else { 795 if (sc->def->disable_value) 796 val |= sc->def->disable_value; 797 else 798 val &= ~sc->def->enable_value; 799 } 800 axp8xx_write(sc->base_dev, sc->def->enable_reg, val); 801 802 *udelay = 0; 803 804 return (0); 805 } 806 807 static void 808 axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc *sc, uint8_t val, int *uv) 809 { 810 if (val < sc->def->voltage_nstep1) 811 *uv = sc->def->voltage_min + val * sc->def->voltage_step1; 812 else 813 *uv = sc->def->voltage_min + 814 (sc->def->voltage_nstep1 * sc->def->voltage_step1) + 815 ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2); 816 *uv *= 1000; 817 } 818 819 static int 820 axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc *sc, int min_uvolt, 821 int max_uvolt, uint8_t *val) 822 { 823 uint8_t nval; 824 int nstep, uvolt; 825 826 nval = 0; 827 uvolt = sc->def->voltage_min * 1000; 828 829 for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt; 830 nstep++) { 831 ++nval; 832 uvolt += (sc->def->voltage_step1 * 1000); 833 } 834 for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt; 835 nstep++) { 836 ++nval; 837 uvolt += (sc->def->voltage_step2 * 1000); 838 } 839 if (uvolt > max_uvolt) 840 return (EINVAL); 841 842 *val = nval; 843 return (0); 844 } 845 846 static int 847 axp8xx_regnode_status(struct regnode *regnode, int *status) 848 { 849 struct axp8xx_reg_sc *sc; 850 uint8_t val; 851 852 sc = regnode_get_softc(regnode); 853 854 *status = 0; 855 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1); 856 if (val & sc->def->enable_mask) 857 *status = REGULATOR_STATUS_ENABLED; 858 859 return (0); 860 } 861 862 static int 863 axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt, 864 int max_uvolt, int *udelay) 865 { 866 struct axp8xx_reg_sc *sc; 867 uint8_t val; 868 869 sc = regnode_get_softc(regnode); 870 871 if (bootverbose) 872 device_printf(sc->base_dev, "Setting %s (%s) to %d<->%d\n", 873 regnode_get_name(regnode), 874 sc->def->name, 875 min_uvolt, max_uvolt); 876 877 if (sc->def->voltage_step1 == 0) 878 return (ENXIO); 879 880 if (axp8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0) 881 return (ERANGE); 882 883 axp8xx_write(sc->base_dev, sc->def->voltage_reg, val); 884 885 *udelay = 0; 886 887 return (0); 888 } 889 890 static int 891 axp8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt) 892 { 893 struct axp8xx_reg_sc *sc; 894 uint8_t val; 895 896 sc = regnode_get_softc(regnode); 897 898 if (!sc->def->voltage_step1 || !sc->def->voltage_step2) 899 return (ENXIO); 900 901 axp8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1); 902 axp8xx_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt); 903 904 return (0); 905 } 906 907 static regnode_method_t axp8xx_regnode_methods[] = { 908 /* Regulator interface */ 909 REGNODEMETHOD(regnode_init, axp8xx_regnode_init), 910 REGNODEMETHOD(regnode_enable, axp8xx_regnode_enable), 911 REGNODEMETHOD(regnode_status, axp8xx_regnode_status), 912 REGNODEMETHOD(regnode_set_voltage, axp8xx_regnode_set_voltage), 913 REGNODEMETHOD(regnode_get_voltage, axp8xx_regnode_get_voltage), 914 REGNODEMETHOD(regnode_check_voltage, regnode_method_check_voltage), 915 REGNODEMETHOD_END 916 }; 917 DEFINE_CLASS_1(axp8xx_regnode, axp8xx_regnode_class, axp8xx_regnode_methods, 918 sizeof(struct axp8xx_reg_sc), regnode_class); 919 920 static void 921 axp8xx_shutdown(void *devp, int howto) 922 { 923 device_t dev; 924 925 if ((howto & RB_POWEROFF) == 0) 926 return; 927 928 dev = devp; 929 930 if (bootverbose) 931 device_printf(dev, "Shutdown Axp8xx\n"); 932 933 axp8xx_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN); 934 } 935 936 static int 937 axp8xx_sysctl_chargecurrent(SYSCTL_HANDLER_ARGS) 938 { 939 device_t dev = arg1; 940 uint8_t data; 941 int val, error; 942 943 error = axp8xx_read(dev, AXP_CHARGERCTL1, &data, 1); 944 if (error != 0) 945 return (error); 946 947 if (bootverbose) 948 device_printf(dev, "Raw CHARGECTL1 val: 0x%0x\n", data); 949 val = (data & AXP_CHARGERCTL1_CMASK); 950 error = sysctl_handle_int(oidp, &val, 0, req); 951 if (error || !req->newptr) /* error || read request */ 952 return (error); 953 954 if ((val < AXP_CHARGERCTL1_MIN) || (val > AXP_CHARGERCTL1_MAX)) 955 return (EINVAL); 956 957 val |= (data & (AXP_CHARGERCTL1_CMASK << 4)); 958 axp8xx_write(dev, AXP_CHARGERCTL1, val); 959 960 return (0); 961 } 962 963 static int 964 axp8xx_sysctl(SYSCTL_HANDLER_ARGS) 965 { 966 struct axp8xx_softc *sc; 967 device_t dev = arg1; 968 enum axp8xx_sensor sensor = arg2; 969 const struct axp8xx_config *c; 970 uint8_t data; 971 int val, i, found, batt_val; 972 uint8_t lo, hi; 973 974 sc = device_get_softc(dev); 975 c = sc->config; 976 977 for (found = 0, i = 0; i < sc->nsensors; i++) { 978 if (sc->sensors[i].id == sensor) { 979 found = 1; 980 break; 981 } 982 } 983 984 if (found == 0) 985 return (ENOENT); 986 987 switch (sensor) { 988 case AXP_SENSOR_ACIN_PRESENT: 989 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 990 val = !!(data & AXP_POWERSRC_ACIN); 991 break; 992 case AXP_SENSOR_VBUS_PRESENT: 993 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 994 val = !!(data & AXP_POWERSRC_VBUS); 995 break; 996 case AXP_SENSOR_BATT_PRESENT: 997 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) { 998 if (data & AXP_POWERMODE_BAT_VALID) 999 val = !!(data & AXP_POWERMODE_BAT_PRESENT); 1000 } 1001 break; 1002 case AXP_SENSOR_BATT_CHARGING: 1003 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) 1004 val = !!(data & AXP_POWERMODE_BAT_CHARGING); 1005 break; 1006 case AXP_SENSOR_BATT_CHARGE_STATE: 1007 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 1008 (data & AXP_BAT_CAP_VALID) != 0) { 1009 batt_val = (data & AXP_BAT_CAP_PERCENT); 1010 if (batt_val <= sc->shut_thres) 1011 val = BATT_CAPACITY_CRITICAL; 1012 else if (batt_val <= sc->warn_thres) 1013 val = BATT_CAPACITY_WARNING; 1014 else 1015 val = BATT_CAPACITY_NORMAL; 1016 } 1017 break; 1018 case AXP_SENSOR_BATT_CAPACITY_PERCENT: 1019 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 1020 (data & AXP_BAT_CAP_VALID) != 0) 1021 val = (data & AXP_BAT_CAP_PERCENT); 1022 break; 1023 case AXP_SENSOR_BATT_VOLTAGE: 1024 if (axp8xx_read(dev, AXP_BATSENSE_HI, &hi, 1) == 0 && 1025 axp8xx_read(dev, AXP_BATSENSE_LO, &lo, 1) == 0) { 1026 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 1027 val *= c->batsense_step; 1028 } 1029 break; 1030 case AXP_SENSOR_BATT_CHARGE_CURRENT: 1031 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 1032 (data & AXP_POWERSRC_CHARING) != 0 && 1033 axp8xx_read(dev, AXP_BATCHG_HI, &hi, 1) == 0 && 1034 axp8xx_read(dev, AXP_BATCHG_LO, &lo, 1) == 0) { 1035 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 1036 val *= c->charge_step; 1037 } 1038 break; 1039 case AXP_SENSOR_BATT_DISCHARGE_CURRENT: 1040 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 1041 (data & AXP_POWERSRC_CHARING) == 0 && 1042 axp8xx_read(dev, AXP_BATDISCHG_HI, &hi, 1) == 0 && 1043 axp8xx_read(dev, AXP_BATDISCHG_LO, &lo, 1) == 0) { 1044 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 1045 val *= c->discharge_step; 1046 } 1047 break; 1048 case AXP_SENSOR_BATT_MAXIMUM_CAPACITY: 1049 if (axp8xx_read(dev, AXP_BAT_MAX_CAP_HI, &hi, 1) == 0 && 1050 axp8xx_read(dev, AXP_BAT_MAX_CAP_LO, &lo, 1) == 0) { 1051 val = AXP_SENSOR_COULOMB(hi, lo); 1052 val *= c->maxcap_step; 1053 } 1054 break; 1055 case AXP_SENSOR_BATT_CURRENT_CAPACITY: 1056 if (axp8xx_read(dev, AXP_BAT_COULOMB_HI, &hi, 1) == 0 && 1057 axp8xx_read(dev, AXP_BAT_COULOMB_LO, &lo, 1) == 0) { 1058 val = AXP_SENSOR_COULOMB(hi, lo); 1059 val *= c->coulomb_step; 1060 } 1061 break; 1062 } 1063 1064 return sysctl_handle_opaque(oidp, &val, sizeof(val), req); 1065 } 1066 1067 static void 1068 axp8xx_intr(void *arg) 1069 { 1070 device_t dev; 1071 uint8_t val; 1072 int error; 1073 1074 dev = arg; 1075 1076 error = axp8xx_read(dev, AXP_IRQSTAT1, &val, 1); 1077 if (error != 0) 1078 return; 1079 1080 if (val) { 1081 if (bootverbose) 1082 device_printf(dev, "AXP_IRQSTAT1 val: %x\n", val); 1083 if (val & AXP_IRQSTAT1_ACIN_HI) 1084 devctl_notify("PMU", "AC", "plugged", NULL); 1085 if (val & AXP_IRQSTAT1_ACIN_LO) 1086 devctl_notify("PMU", "AC", "unplugged", NULL); 1087 if (val & AXP_IRQSTAT1_VBUS_HI) 1088 devctl_notify("PMU", "USB", "plugged", NULL); 1089 if (val & AXP_IRQSTAT1_VBUS_LO) 1090 devctl_notify("PMU", "USB", "unplugged", NULL); 1091 /* Acknowledge */ 1092 axp8xx_write(dev, AXP_IRQSTAT1, val); 1093 } 1094 1095 error = axp8xx_read(dev, AXP_IRQSTAT2, &val, 1); 1096 if (error != 0) 1097 return; 1098 1099 if (val) { 1100 if (bootverbose) 1101 device_printf(dev, "AXP_IRQSTAT2 val: %x\n", val); 1102 if (val & AXP_IRQSTAT2_BATCHGD) 1103 devctl_notify("PMU", "Battery", "charged", NULL); 1104 if (val & AXP_IRQSTAT2_BATCHGC) 1105 devctl_notify("PMU", "Battery", "charging", NULL); 1106 if (val & AXP_IRQSTAT2_BAT_NO) 1107 devctl_notify("PMU", "Battery", "absent", NULL); 1108 if (val & AXP_IRQSTAT2_BAT_IN) 1109 devctl_notify("PMU", "Battery", "plugged", NULL); 1110 /* Acknowledge */ 1111 axp8xx_write(dev, AXP_IRQSTAT2, val); 1112 } 1113 1114 error = axp8xx_read(dev, AXP_IRQSTAT3, &val, 1); 1115 if (error != 0) 1116 return; 1117 1118 if (val) { 1119 /* Acknowledge */ 1120 axp8xx_write(dev, AXP_IRQSTAT3, val); 1121 } 1122 1123 error = axp8xx_read(dev, AXP_IRQSTAT4, &val, 1); 1124 if (error != 0) 1125 return; 1126 1127 if (val) { 1128 if (bootverbose) 1129 device_printf(dev, "AXP_IRQSTAT4 val: %x\n", val); 1130 if (val & AXP_IRQSTAT4_BATLVL_LO0) 1131 devctl_notify("PMU", "Battery", "shutdown-threshold", NULL); 1132 if (val & AXP_IRQSTAT4_BATLVL_LO1) 1133 devctl_notify("PMU", "Battery", "warning-threshold", NULL); 1134 /* Acknowledge */ 1135 axp8xx_write(dev, AXP_IRQSTAT4, val); 1136 } 1137 1138 error = axp8xx_read(dev, AXP_IRQSTAT5, &val, 1); 1139 if (error != 0) 1140 return; 1141 1142 if (val != 0) { 1143 if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) { 1144 if (bootverbose) 1145 device_printf(dev, "Power button pressed\n"); 1146 shutdown_nice(RB_POWEROFF); 1147 } 1148 /* Acknowledge */ 1149 axp8xx_write(dev, AXP_IRQSTAT5, val); 1150 } 1151 1152 error = axp8xx_read(dev, AXP_IRQSTAT6, &val, 1); 1153 if (error != 0) 1154 return; 1155 1156 if (val) { 1157 /* Acknowledge */ 1158 axp8xx_write(dev, AXP_IRQSTAT6, val); 1159 } 1160 } 1161 1162 static device_t 1163 axp8xx_gpio_get_bus(device_t dev) 1164 { 1165 struct axp8xx_softc *sc; 1166 1167 sc = device_get_softc(dev); 1168 1169 return (sc->gpiodev); 1170 } 1171 1172 static int 1173 axp8xx_gpio_pin_max(device_t dev, int *maxpin) 1174 { 1175 *maxpin = nitems(axp8xx_pins) - 1; 1176 1177 return (0); 1178 } 1179 1180 static int 1181 axp8xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name) 1182 { 1183 if (pin >= nitems(axp8xx_pins)) 1184 return (EINVAL); 1185 1186 snprintf(name, GPIOMAXNAME, "%s", axp8xx_pins[pin].name); 1187 1188 return (0); 1189 } 1190 1191 static int 1192 axp8xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) 1193 { 1194 if (pin >= nitems(axp8xx_pins)) 1195 return (EINVAL); 1196 1197 *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT; 1198 1199 return (0); 1200 } 1201 1202 static int 1203 axp8xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) 1204 { 1205 struct axp8xx_softc *sc; 1206 uint8_t data, func; 1207 int error; 1208 1209 if (pin >= nitems(axp8xx_pins)) 1210 return (EINVAL); 1211 1212 sc = device_get_softc(dev); 1213 1214 AXP_LOCK(sc); 1215 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1216 if (error == 0) { 1217 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1218 if (func == AXP_GPIO_FUNC_INPUT) 1219 *flags = GPIO_PIN_INPUT; 1220 else if (func == AXP_GPIO_FUNC_DRVLO || 1221 func == AXP_GPIO_FUNC_DRVHI) 1222 *flags = GPIO_PIN_OUTPUT; 1223 else 1224 *flags = 0; 1225 } 1226 AXP_UNLOCK(sc); 1227 1228 return (error); 1229 } 1230 1231 static int 1232 axp8xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) 1233 { 1234 struct axp8xx_softc *sc; 1235 uint8_t data; 1236 int error; 1237 1238 if (pin >= nitems(axp8xx_pins)) 1239 return (EINVAL); 1240 1241 sc = device_get_softc(dev); 1242 1243 AXP_LOCK(sc); 1244 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1245 if (error == 0) { 1246 data &= ~AXP_GPIO_FUNC; 1247 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != 0) { 1248 if ((flags & GPIO_PIN_OUTPUT) == 0) 1249 data |= AXP_GPIO_FUNC_INPUT; 1250 } 1251 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1252 } 1253 AXP_UNLOCK(sc); 1254 1255 return (error); 1256 } 1257 1258 static int 1259 axp8xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) 1260 { 1261 struct axp8xx_softc *sc; 1262 uint8_t data, func; 1263 int error; 1264 1265 if (pin >= nitems(axp8xx_pins)) 1266 return (EINVAL); 1267 1268 sc = device_get_softc(dev); 1269 1270 AXP_LOCK(sc); 1271 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1272 if (error == 0) { 1273 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1274 switch (func) { 1275 case AXP_GPIO_FUNC_DRVLO: 1276 *val = 0; 1277 break; 1278 case AXP_GPIO_FUNC_DRVHI: 1279 *val = 1; 1280 break; 1281 case AXP_GPIO_FUNC_INPUT: 1282 error = axp8xx_read(dev, AXP_GPIO_SIGBIT, &data, 1); 1283 if (error == 0) 1284 *val = (data & (1 << pin)) ? 1 : 0; 1285 break; 1286 default: 1287 error = EIO; 1288 break; 1289 } 1290 } 1291 AXP_UNLOCK(sc); 1292 1293 return (error); 1294 } 1295 1296 static int 1297 axp8xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val) 1298 { 1299 struct axp8xx_softc *sc; 1300 uint8_t data, func; 1301 int error; 1302 1303 if (pin >= nitems(axp8xx_pins)) 1304 return (EINVAL); 1305 1306 sc = device_get_softc(dev); 1307 1308 AXP_LOCK(sc); 1309 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1310 if (error == 0) { 1311 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1312 switch (func) { 1313 case AXP_GPIO_FUNC_DRVLO: 1314 case AXP_GPIO_FUNC_DRVHI: 1315 data &= ~AXP_GPIO_FUNC; 1316 data |= (val << AXP_GPIO_FUNC_SHIFT); 1317 break; 1318 default: 1319 error = EIO; 1320 break; 1321 } 1322 } 1323 if (error == 0) 1324 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1325 AXP_UNLOCK(sc); 1326 1327 return (error); 1328 } 1329 1330 static int 1331 axp8xx_gpio_pin_toggle(device_t dev, uint32_t pin) 1332 { 1333 struct axp8xx_softc *sc; 1334 uint8_t data, func; 1335 int error; 1336 1337 if (pin >= nitems(axp8xx_pins)) 1338 return (EINVAL); 1339 1340 sc = device_get_softc(dev); 1341 1342 AXP_LOCK(sc); 1343 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1344 if (error == 0) { 1345 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1346 switch (func) { 1347 case AXP_GPIO_FUNC_DRVLO: 1348 data &= ~AXP_GPIO_FUNC; 1349 data |= (AXP_GPIO_FUNC_DRVHI << AXP_GPIO_FUNC_SHIFT); 1350 break; 1351 case AXP_GPIO_FUNC_DRVHI: 1352 data &= ~AXP_GPIO_FUNC; 1353 data |= (AXP_GPIO_FUNC_DRVLO << AXP_GPIO_FUNC_SHIFT); 1354 break; 1355 default: 1356 error = EIO; 1357 break; 1358 } 1359 } 1360 if (error == 0) 1361 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1362 AXP_UNLOCK(sc); 1363 1364 return (error); 1365 } 1366 1367 static int 1368 axp8xx_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, 1369 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags) 1370 { 1371 if (gpios[0] >= nitems(axp8xx_pins)) 1372 return (EINVAL); 1373 1374 *pin = gpios[0]; 1375 *flags = gpios[1]; 1376 1377 return (0); 1378 } 1379 1380 static phandle_t 1381 axp8xx_get_node(device_t dev, device_t bus) 1382 { 1383 return (ofw_bus_get_node(dev)); 1384 } 1385 1386 static struct axp8xx_reg_sc * 1387 axp8xx_reg_attach(device_t dev, phandle_t node, 1388 struct axp8xx_regdef *def) 1389 { 1390 struct axp8xx_reg_sc *reg_sc; 1391 struct regnode_init_def initdef; 1392 struct regnode *regnode; 1393 1394 memset(&initdef, 0, sizeof(initdef)); 1395 if (regulator_parse_ofw_stdparam(dev, node, &initdef) != 0) 1396 return (NULL); 1397 if (initdef.std_param.min_uvolt == 0) 1398 initdef.std_param.min_uvolt = def->voltage_min * 1000; 1399 if (initdef.std_param.max_uvolt == 0) 1400 initdef.std_param.max_uvolt = def->voltage_max * 1000; 1401 initdef.id = def->id; 1402 initdef.ofw_node = node; 1403 regnode = regnode_create(dev, &axp8xx_regnode_class, &initdef); 1404 if (regnode == NULL) { 1405 device_printf(dev, "cannot create regulator\n"); 1406 return (NULL); 1407 } 1408 1409 reg_sc = regnode_get_softc(regnode); 1410 reg_sc->regnode = regnode; 1411 reg_sc->base_dev = dev; 1412 reg_sc->def = def; 1413 reg_sc->xref = OF_xref_from_node(node); 1414 reg_sc->param = regnode_get_stdparam(regnode); 1415 1416 regnode_register(regnode); 1417 1418 return (reg_sc); 1419 } 1420 1421 static int 1422 axp8xx_regdev_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells, 1423 intptr_t *num) 1424 { 1425 struct axp8xx_softc *sc; 1426 int i; 1427 1428 sc = device_get_softc(dev); 1429 for (i = 0; i < sc->nregs; i++) { 1430 if (sc->regs[i] == NULL) 1431 continue; 1432 if (sc->regs[i]->xref == xref) { 1433 *num = sc->regs[i]->def->id; 1434 return (0); 1435 } 1436 } 1437 1438 return (ENXIO); 1439 } 1440 1441 static int 1442 axp8xx_probe(device_t dev) 1443 { 1444 if (!ofw_bus_status_okay(dev)) 1445 return (ENXIO); 1446 1447 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) 1448 { 1449 case AXP803: 1450 device_set_desc(dev, "X-Powers AXP803 Power Management Unit"); 1451 break; 1452 case AXP813: 1453 device_set_desc(dev, "X-Powers AXP813 Power Management Unit"); 1454 break; 1455 default: 1456 return (ENXIO); 1457 } 1458 1459 return (BUS_PROBE_DEFAULT); 1460 } 1461 1462 static int 1463 axp8xx_attach(device_t dev) 1464 { 1465 struct axp8xx_softc *sc; 1466 struct axp8xx_reg_sc *reg; 1467 uint8_t chip_id, val; 1468 phandle_t rnode, child; 1469 int error, i; 1470 1471 sc = device_get_softc(dev); 1472 1473 sc->addr = iicbus_get_addr(dev); 1474 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF); 1475 1476 error = bus_alloc_resources(dev, axp8xx_spec, &sc->res); 1477 if (error != 0) { 1478 device_printf(dev, "cannot allocate resources for device\n"); 1479 return (error); 1480 } 1481 1482 if (bootverbose) { 1483 axp8xx_read(dev, AXP_ICTYPE, &chip_id, 1); 1484 device_printf(dev, "chip ID 0x%02x\n", chip_id); 1485 } 1486 1487 sc->nregs = nitems(axp8xx_common_regdefs); 1488 sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; 1489 switch (sc->type) { 1490 case AXP803: 1491 sc->nregs += nitems(axp803_regdefs); 1492 break; 1493 case AXP813: 1494 sc->nregs += nitems(axp813_regdefs); 1495 break; 1496 } 1497 sc->config = &axp803_config; 1498 sc->sensors = axp8xx_common_sensors; 1499 sc->nsensors = nitems(axp8xx_common_sensors); 1500 1501 sc->regs = malloc(sizeof(struct axp8xx_reg_sc *) * sc->nregs, 1502 M_AXP8XX_REG, M_WAITOK | M_ZERO); 1503 1504 /* Attach known regulators that exist in the DT */ 1505 rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators"); 1506 if (rnode > 0) { 1507 for (i = 0; i < sc->nregs; i++) { 1508 char *regname; 1509 struct axp8xx_regdef *regdef; 1510 1511 if (i <= nitems(axp8xx_common_regdefs)) { 1512 regname = axp8xx_common_regdefs[i].name; 1513 regdef = &axp8xx_common_regdefs[i]; 1514 } else { 1515 int off; 1516 1517 off = i - nitems(axp8xx_common_regdefs); 1518 switch (sc->type) { 1519 case AXP803: 1520 regname = axp803_regdefs[off].name; 1521 regdef = &axp803_regdefs[off]; 1522 break; 1523 case AXP813: 1524 regname = axp813_regdefs[off].name; 1525 regdef = &axp813_regdefs[off]; 1526 break; 1527 } 1528 } 1529 child = ofw_bus_find_child(rnode, 1530 regname); 1531 if (child == 0) 1532 continue; 1533 reg = axp8xx_reg_attach(dev, child, 1534 regdef); 1535 if (reg == NULL) { 1536 device_printf(dev, 1537 "cannot attach regulator %s\n", 1538 regname); 1539 continue; 1540 } 1541 sc->regs[i] = reg; 1542 } 1543 } 1544 1545 /* Add sensors */ 1546 for (i = 0; i < sc->nsensors; i++) { 1547 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1548 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1549 OID_AUTO, sc->sensors[i].name, 1550 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, 1551 dev, sc->sensors[i].id, axp8xx_sysctl, 1552 sc->sensors[i].format, 1553 sc->sensors[i].desc); 1554 } 1555 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1556 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1557 OID_AUTO, "batchargecurrentstep", 1558 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 1559 dev, 0, axp8xx_sysctl_chargecurrent, 1560 "I", "Battery Charging Current Step, " 1561 "0: 200mA, 1: 400mA, 2: 600mA, 3: 800mA, " 1562 "4: 1000mA, 5: 1200mA, 6: 1400mA, 7: 1600mA, " 1563 "8: 1800mA, 9: 2000mA, 10: 2200mA, 11: 2400mA, " 1564 "12: 2600mA, 13: 2800mA"); 1565 1566 /* Get thresholds */ 1567 if (axp8xx_read(dev, AXP_BAT_CAP_WARN, &val, 1) == 0) { 1568 sc->warn_thres = (val & AXP_BAT_CAP_WARN_LV1) >> 4; 1569 sc->warn_thres += AXP_BAP_CAP_WARN_LV1BASE; 1570 sc->shut_thres = (val & AXP_BAT_CAP_WARN_LV2); 1571 if (bootverbose) { 1572 device_printf(dev, 1573 "Raw reg val: 0x%02x\n", val); 1574 device_printf(dev, 1575 "Warning threshold: 0x%02x\n", sc->warn_thres); 1576 device_printf(dev, 1577 "Shutdown threshold: 0x%02x\n", sc->shut_thres); 1578 } 1579 } 1580 1581 /* Enable interrupts */ 1582 axp8xx_write(dev, AXP_IRQEN1, 1583 AXP_IRQEN1_VBUS_LO | 1584 AXP_IRQEN1_VBUS_HI | 1585 AXP_IRQEN1_ACIN_LO | 1586 AXP_IRQEN1_ACIN_HI); 1587 axp8xx_write(dev, AXP_IRQEN2, 1588 AXP_IRQEN2_BATCHGD | 1589 AXP_IRQEN2_BATCHGC | 1590 AXP_IRQEN2_BAT_NO | 1591 AXP_IRQEN2_BAT_IN); 1592 axp8xx_write(dev, AXP_IRQEN3, 0); 1593 axp8xx_write(dev, AXP_IRQEN4, 1594 AXP_IRQEN4_BATLVL_LO0 | 1595 AXP_IRQEN4_BATLVL_LO1); 1596 axp8xx_write(dev, AXP_IRQEN5, 1597 AXP_IRQEN5_POKSIRQ | 1598 AXP_IRQEN5_POKLIRQ); 1599 axp8xx_write(dev, AXP_IRQEN6, 0); 1600 1601 /* Install interrupt handler */ 1602 error = bus_setup_intr(dev, sc->res, INTR_TYPE_MISC | INTR_MPSAFE, 1603 NULL, axp8xx_intr, dev, &sc->ih); 1604 if (error != 0) { 1605 device_printf(dev, "cannot setup interrupt handler\n"); 1606 return (error); 1607 } 1608 1609 EVENTHANDLER_REGISTER(shutdown_final, axp8xx_shutdown, dev, 1610 SHUTDOWN_PRI_LAST); 1611 1612 sc->gpiodev = gpiobus_attach_bus(dev); 1613 1614 return (0); 1615 } 1616 1617 static device_method_t axp8xx_methods[] = { 1618 /* Device interface */ 1619 DEVMETHOD(device_probe, axp8xx_probe), 1620 DEVMETHOD(device_attach, axp8xx_attach), 1621 1622 /* GPIO interface */ 1623 DEVMETHOD(gpio_get_bus, axp8xx_gpio_get_bus), 1624 DEVMETHOD(gpio_pin_max, axp8xx_gpio_pin_max), 1625 DEVMETHOD(gpio_pin_getname, axp8xx_gpio_pin_getname), 1626 DEVMETHOD(gpio_pin_getcaps, axp8xx_gpio_pin_getcaps), 1627 DEVMETHOD(gpio_pin_getflags, axp8xx_gpio_pin_getflags), 1628 DEVMETHOD(gpio_pin_setflags, axp8xx_gpio_pin_setflags), 1629 DEVMETHOD(gpio_pin_get, axp8xx_gpio_pin_get), 1630 DEVMETHOD(gpio_pin_set, axp8xx_gpio_pin_set), 1631 DEVMETHOD(gpio_pin_toggle, axp8xx_gpio_pin_toggle), 1632 DEVMETHOD(gpio_map_gpios, axp8xx_gpio_map_gpios), 1633 1634 /* Regdev interface */ 1635 DEVMETHOD(regdev_map, axp8xx_regdev_map), 1636 1637 /* OFW bus interface */ 1638 DEVMETHOD(ofw_bus_get_node, axp8xx_get_node), 1639 1640 DEVMETHOD_END 1641 }; 1642 1643 static driver_t axp8xx_driver = { 1644 "axp8xx_pmu", 1645 axp8xx_methods, 1646 sizeof(struct axp8xx_softc), 1647 }; 1648 1649 extern driver_t ofw_gpiobus_driver, gpioc_driver; 1650 1651 EARLY_DRIVER_MODULE(axp8xx, iicbus, axp8xx_driver, 0, 0, 1652 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1653 EARLY_DRIVER_MODULE(ofw_gpiobus, axp8xx_pmu, ofw_gpiobus_driver, 0, 0, 1654 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1655 DRIVER_MODULE(gpioc, axp8xx_pmu, gpioc_driver, 0, 0); 1656 MODULE_VERSION(axp8xx, 1); 1657 MODULE_DEPEND(axp8xx, iicbus, 1, 1, 1); 1658 SIMPLEBUS_PNP_INFO(compat_data); 1659