xref: /freebsd/sys/arm/arm/gic_common.h (revision d6b92ffa)
1 /*-
2  * Copyright (c) 2016 The FreeBSD Foundation
3  * All rights reserved.
4  *
5  * This software was developed by Andrew Turner under
6  * the sponsorship of the FreeBSD Foundation.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  *
29  * $FreeBSD$
30  */
31 
32 #ifndef _GIC_COMMON_H_
33 #define _GIC_COMMON_H_
34 
35 #define	GIC_IVAR_HW_REV		500
36 #define	GIC_IVAR_BUS		501
37 
38 /* GIC_IVAR_BUS values */
39 #define	GIC_BUS_UNKNOWN		0
40 #define	GIC_BUS_FDT		1
41 #define	GIC_BUS_ACPI		2
42 #define	GIC_BUS_MAX		2
43 
44 __BUS_ACCESSOR(gic, hw_rev, GIC, HW_REV, u_int);
45 __BUS_ACCESSOR(gic, bus, GIC, BUS, u_int);
46 
47 /* Common register values */
48 #define	GICD_CTLR		0x0000				/* v1 ICDDCR */
49 #define	GICD_TYPER		0x0004				/* v1 ICDICTR */
50 #define	 GICD_TYPER_I_NUM(n)	((((n) & 0x1F) + 1) * 32)
51 #define	GICD_IIDR		0x0008				/* v1 ICDIIDR */
52 #define	 GICD_IIDR_PROD_SHIFT	24
53 #define	 GICD_IIDR_PROD_MASK	0xff000000
54 #define	 GICD_IIDR_PROD(x)					\
55     (((x) & GICD_IIDR_PROD_MASK) >> GICD_IIDR_PROD_SHIFT)
56 #define	 GICD_IIDR_VAR_SHIFT	16
57 #define	 GICD_IIDR_VAR_MASK	0x000f0000
58 #define	 GICD_IIDR_VAR(x)					\
59     (((x) & GICD_IIDR_VAR_MASK) >> GICD_IIDR_VAR_SHIFT)
60 #define	 GICD_IIDR_REV_SHIFT	12
61 #define	 GICD_IIDR_REV_MASK	0x0000f000
62 #define	 GICD_IIDR_REV(x)					\
63     (((x) & GICD_IIDR_REV_MASK) >> GICD_IIDR_REV_SHIFT)
64 #define	 GICD_IIDR_IMPL_SHIFT	0
65 #define	 GICD_IIDR_IMPL_MASK	0x00000fff
66 #define	 GICD_IIDR_IMPL(x)					\
67     (((x) & GICD_IIDR_IMPL_MASK) >> GICD_IIDR_IMPL_SHIFT)
68 #define	GICD_IGROUPR(n)		(0x0080 + (((n) >> 5) * 4))	/* v1 ICDISER */
69 #define	 GICD_I_PER_IGROUPRn	32
70 #define	GICD_ISENABLER(n)	(0x0100 + (((n) >> 5) * 4))	/* v1 ICDISER */
71 #define	 GICD_I_MASK(n)		(1ul << ((n) & 0x1f))
72 #define	 GICD_I_PER_ISENABLERn	32
73 #define	GICD_ICENABLER(n)	(0x0180 + (((n) >> 5) * 4))	/* v1 ICDICER */
74 #define	GICD_ISPENDR(n)		(0x0200 + (((n) >> 5) * 4))	/* v1 ICDISPR */
75 #define	GICD_ICPENDR(n)		(0x0280 + (((n) >> 5) * 4))	/* v1 ICDICPR */
76 #define	GICD_ICACTIVER(n)	(0x0380 + (((n) >> 5) * 4))	/* v1 ICDABR */
77 #define	GICD_IPRIORITYR(n)	(0x0400 + (((n) >> 2) * 4))	/* v1 ICDIPR */
78 #define	 GICD_I_PER_IPRIORITYn	4
79 #define	GICD_ITARGETSR(n)	(0x0800 + (((n) >> 2) * 4))	/* v1 ICDIPTR */
80 #define	GICD_ICFGR(n)		(0x0C00 + (((n) >> 4) * 4))	/* v1 ICDICFR */
81 #define	 GICD_I_PER_ICFGRn	16
82 /* First bit is a polarity bit (0 - low, 1 - high) */
83 #define	 GICD_ICFGR_POL_LOW	(0 << 0)
84 #define	 GICD_ICFGR_POL_HIGH	(1 << 0)
85 #define	 GICD_ICFGR_POL_MASK	0x1
86 /* Second bit is a trigger bit (0 - level, 1 - edge) */
87 #define	 GICD_ICFGR_TRIG_LVL	(0 << 1)
88 #define	 GICD_ICFGR_TRIG_EDGE	(1 << 1)
89 #define	 GICD_ICFGR_TRIG_MASK	0x2
90 #define GICD_SGIR		0x0F00				/* v1 ICDSGIR */
91 #define	 GICD_SGI_TARGET_SHIFT	16
92 
93 #endif /* _GIC_COMMON_H_ */
94