1 /*- 2 * Copyright (c) 2011,2016 The FreeBSD Foundation 3 * All rights reserved. 4 * 5 * This software was developed by Andrew Turner under 6 * sponsorship from the FreeBSD Foundation. 7 * 8 * Developed by Damjan Marion <damjan.marion@gmail.com> 9 * 10 * Based on OMAP4 GIC code by Ben Gray 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. The name of the company nor the name of the author may be used to 21 * endorse or promote products derived from this software without specific 22 * prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 */ 36 37 #include "opt_platform.h" 38 39 #include <sys/cdefs.h> 40 __FBSDID("$FreeBSD$"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/bus.h> 45 #include <sys/kernel.h> 46 #include <sys/module.h> 47 48 #include <machine/intr.h> 49 50 #include <dev/ofw/openfirm.h> 51 #include <dev/ofw/ofw_bus.h> 52 #include <dev/ofw/ofw_bus_subr.h> 53 54 #include <arm/arm/gic.h> 55 #include <arm/arm/gic_common.h> 56 57 struct arm_gic_devinfo { 58 struct ofw_bus_devinfo obdinfo; 59 struct resource_list rl; 60 }; 61 62 struct arm_gic_fdt_softc { 63 struct arm_gic_softc base; 64 pcell_t addr_cells; 65 pcell_t size_cells; 66 }; 67 68 static device_probe_t gic_fdt_probe; 69 static device_attach_t gic_fdt_attach; 70 static ofw_bus_get_devinfo_t gic_ofw_get_devinfo; 71 static bus_get_resource_list_t gic_fdt_get_resource_list; 72 static bool arm_gic_add_children(device_t); 73 74 static struct ofw_compat_data compat_data[] = { 75 {"arm,gic", true}, /* Non-standard, used in FreeBSD dts. */ 76 {"arm,gic-400", true}, 77 {"arm,cortex-a15-gic", true}, 78 {"arm,cortex-a9-gic", true}, 79 {"arm,cortex-a7-gic", true}, 80 {"arm,arm11mp-gic", true}, 81 {"brcm,brahma-b15-gic", true}, 82 {"qcom,msm-qgic2", true}, 83 {NULL, false} 84 }; 85 86 static device_method_t gic_fdt_methods[] = { 87 /* Device interface */ 88 DEVMETHOD(device_probe, gic_fdt_probe), 89 DEVMETHOD(device_attach, gic_fdt_attach), 90 91 /* Bus interface */ 92 DEVMETHOD(bus_get_resource_list,gic_fdt_get_resource_list), 93 DEVMETHOD(bus_get_device_path, ofw_bus_gen_get_device_path), 94 95 /* ofw_bus interface */ 96 DEVMETHOD(ofw_bus_get_devinfo, gic_ofw_get_devinfo), 97 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 98 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 99 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 100 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 101 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 102 103 DEVMETHOD_END, 104 }; 105 106 DEFINE_CLASS_1(gic, gic_fdt_driver, gic_fdt_methods, 107 sizeof(struct arm_gic_fdt_softc), arm_gic_driver); 108 109 EARLY_DRIVER_MODULE(gic, simplebus, gic_fdt_driver, 0, 0, 110 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); 111 EARLY_DRIVER_MODULE(gic, ofwbus, gic_fdt_driver, 0, 0, 112 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); 113 114 static int 115 gic_fdt_probe(device_t dev) 116 { 117 118 if (!ofw_bus_status_okay(dev)) 119 return (ENXIO); 120 121 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) 122 return (ENXIO); 123 device_set_desc(dev, "ARM Generic Interrupt Controller"); 124 return (BUS_PROBE_DEFAULT); 125 } 126 127 static int 128 gic_fdt_attach(device_t dev) 129 { 130 struct arm_gic_fdt_softc *sc = device_get_softc(dev); 131 phandle_t pxref; 132 intptr_t xref; 133 int err; 134 135 sc->base.gic_bus = GIC_BUS_FDT; 136 137 err = arm_gic_attach(dev); 138 if (err != 0) 139 return (err); 140 141 xref = OF_xref_from_node(ofw_bus_get_node(dev)); 142 143 /* 144 * Now, when everything is initialized, it's right time to 145 * register interrupt controller to interrupt framefork. 146 */ 147 if (intr_pic_register(dev, xref) == NULL) { 148 device_printf(dev, "could not register PIC\n"); 149 goto cleanup; 150 } 151 152 /* 153 * Controller is root if: 154 * - doesn't have interrupt parent 155 * - his interrupt parent is this controller 156 */ 157 pxref = ofw_bus_find_iparent(ofw_bus_get_node(dev)); 158 if (pxref == 0 || xref == pxref) { 159 if (intr_pic_claim_root(dev, xref, arm_gic_intr, sc, 160 GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) { 161 device_printf(dev, "could not set PIC as a root\n"); 162 intr_pic_deregister(dev, xref); 163 goto cleanup; 164 } 165 } else { 166 if (sc->base.gic_res[2] == NULL) { 167 device_printf(dev, 168 "not root PIC must have defined interrupt\n"); 169 intr_pic_deregister(dev, xref); 170 goto cleanup; 171 } 172 if (bus_setup_intr(dev, sc->base.gic_res[2], INTR_TYPE_CLK, 173 arm_gic_intr, NULL, sc, &sc->base.gic_intrhand)) { 174 device_printf(dev, "could not setup irq handler\n"); 175 intr_pic_deregister(dev, xref); 176 goto cleanup; 177 } 178 } 179 180 OF_device_register_xref(xref, dev); 181 182 /* If we have children probe and attach them */ 183 if (arm_gic_add_children(dev)) { 184 bus_generic_probe(dev); 185 return (bus_generic_attach(dev)); 186 } 187 188 return (0); 189 190 cleanup: 191 arm_gic_detach(dev); 192 return(ENXIO); 193 } 194 195 static struct resource_list * 196 gic_fdt_get_resource_list(device_t bus, device_t child) 197 { 198 struct arm_gic_devinfo *di; 199 200 di = device_get_ivars(child); 201 KASSERT(di != NULL, ("gic_fdt_get_resource_list: No devinfo")); 202 203 return (&di->rl); 204 } 205 206 static int 207 arm_gic_fill_ranges(phandle_t node, struct arm_gic_fdt_softc *sc) 208 { 209 pcell_t host_cells; 210 cell_t *base_ranges; 211 ssize_t nbase_ranges; 212 int i, j, k; 213 214 host_cells = 1; 215 OF_getencprop(OF_parent(node), "#address-cells", &host_cells, 216 sizeof(host_cells)); 217 sc->addr_cells = 2; 218 OF_getencprop(node, "#address-cells", &sc->addr_cells, 219 sizeof(sc->addr_cells)); 220 sc->size_cells = 2; 221 OF_getencprop(node, "#size-cells", &sc->size_cells, 222 sizeof(sc->size_cells)); 223 224 nbase_ranges = OF_getproplen(node, "ranges"); 225 if (nbase_ranges < 0) 226 return (-1); 227 sc->base.nranges = nbase_ranges / sizeof(cell_t) / 228 (sc->addr_cells + host_cells + sc->size_cells); 229 if (sc->base.nranges == 0) 230 return (0); 231 232 sc->base.ranges = malloc(sc->base.nranges * sizeof(sc->base.ranges[0]), 233 M_DEVBUF, M_WAITOK); 234 base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK); 235 OF_getencprop(node, "ranges", base_ranges, nbase_ranges); 236 237 for (i = 0, j = 0; i < sc->base.nranges; i++) { 238 sc->base.ranges[i].bus = 0; 239 for (k = 0; k < sc->addr_cells; k++) { 240 sc->base.ranges[i].bus <<= 32; 241 sc->base.ranges[i].bus |= base_ranges[j++]; 242 } 243 sc->base.ranges[i].host = 0; 244 for (k = 0; k < host_cells; k++) { 245 sc->base.ranges[i].host <<= 32; 246 sc->base.ranges[i].host |= base_ranges[j++]; 247 } 248 sc->base.ranges[i].size = 0; 249 for (k = 0; k < sc->size_cells; k++) { 250 sc->base.ranges[i].size <<= 32; 251 sc->base.ranges[i].size |= base_ranges[j++]; 252 } 253 } 254 255 free(base_ranges, M_DEVBUF); 256 return (sc->base.nranges); 257 } 258 259 static bool 260 arm_gic_add_children(device_t dev) 261 { 262 struct arm_gic_fdt_softc *sc; 263 struct arm_gic_devinfo *dinfo; 264 phandle_t child, node; 265 device_t cdev; 266 267 sc = device_get_softc(dev); 268 node = ofw_bus_get_node(dev); 269 270 /* If we have no children don't probe for them */ 271 child = OF_child(node); 272 if (child == 0) 273 return (false); 274 275 if (arm_gic_fill_ranges(node, sc) < 0) { 276 device_printf(dev, "Have a child, but no ranges\n"); 277 return (false); 278 } 279 280 for (; child != 0; child = OF_peer(child)) { 281 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); 282 283 if (ofw_bus_gen_setup_devinfo(&dinfo->obdinfo, child) != 0) { 284 free(dinfo, M_DEVBUF); 285 continue; 286 } 287 288 resource_list_init(&dinfo->rl); 289 ofw_bus_reg_to_rl(dev, child, sc->addr_cells, 290 sc->size_cells, &dinfo->rl); 291 292 cdev = device_add_child(dev, NULL, -1); 293 if (cdev == NULL) { 294 device_printf(dev, "<%s>: device_add_child failed\n", 295 dinfo->obdinfo.obd_name); 296 resource_list_free(&dinfo->rl); 297 ofw_bus_gen_destroy_devinfo(&dinfo->obdinfo); 298 free(dinfo, M_DEVBUF); 299 continue; 300 } 301 device_set_ivars(cdev, dinfo); 302 } 303 304 return (true); 305 } 306 307 static const struct ofw_bus_devinfo * 308 gic_ofw_get_devinfo(device_t bus __unused, device_t child) 309 { 310 struct arm_gic_devinfo *di; 311 312 di = device_get_ivars(child); 313 314 return (&di->obdinfo); 315 } 316 317 static struct ofw_compat_data gicv2m_compat_data[] = { 318 {"arm,gic-v2m-frame", true}, 319 {NULL, false} 320 }; 321 322 static int 323 arm_gicv2m_fdt_probe(device_t dev) 324 { 325 326 if (!ofw_bus_status_okay(dev)) 327 return (ENXIO); 328 329 if (!ofw_bus_search_compatible(dev, gicv2m_compat_data)->ocd_data) 330 return (ENXIO); 331 332 device_set_desc(dev, "ARM Generic Interrupt Controller MSI/MSIX"); 333 return (BUS_PROBE_DEFAULT); 334 } 335 336 static int 337 arm_gicv2m_fdt_attach(device_t dev) 338 { 339 struct arm_gicv2m_softc *sc; 340 341 sc = device_get_softc(dev); 342 sc->sc_xref = OF_xref_from_node(ofw_bus_get_node(dev)); 343 344 return (arm_gicv2m_attach(dev)); 345 } 346 347 static device_method_t arm_gicv2m_fdt_methods[] = { 348 /* Device interface */ 349 DEVMETHOD(device_probe, arm_gicv2m_fdt_probe), 350 DEVMETHOD(device_attach, arm_gicv2m_fdt_attach), 351 352 /* End */ 353 DEVMETHOD_END 354 }; 355 356 DEFINE_CLASS_1(gicv2m, arm_gicv2m_fdt_driver, arm_gicv2m_fdt_methods, 357 sizeof(struct arm_gicv2m_softc), arm_gicv2m_driver); 358 359 EARLY_DRIVER_MODULE(gicv2m, gic, arm_gicv2m_fdt_driver, 0, 0, 360 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); 361