1 /*- 2 * Copyright (c) 2011,2016 The FreeBSD Foundation 3 * All rights reserved. 4 * 5 * This software was developed by Andrew Turner under 6 * sponsorship from the FreeBSD Foundation. 7 * 8 * Developed by Damjan Marion <damjan.marion@gmail.com> 9 * 10 * Based on OMAP4 GIC code by Ben Gray 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. The name of the company nor the name of the author may be used to 21 * endorse or promote products derived from this software without specific 22 * prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 */ 36 37 #include "opt_platform.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/bus.h> 42 #include <sys/kernel.h> 43 #include <sys/module.h> 44 45 #include <machine/intr.h> 46 47 #include <dev/ofw/openfirm.h> 48 #include <dev/ofw/ofw_bus.h> 49 #include <dev/ofw/ofw_bus_subr.h> 50 51 #include <arm/arm/gic.h> 52 #include <arm/arm/gic_common.h> 53 54 struct arm_gic_devinfo { 55 struct ofw_bus_devinfo obdinfo; 56 struct resource_list rl; 57 }; 58 59 struct arm_gic_fdt_softc { 60 struct arm_gic_softc base; 61 pcell_t addr_cells; 62 pcell_t size_cells; 63 }; 64 65 static device_probe_t gic_fdt_probe; 66 static device_attach_t gic_fdt_attach; 67 static ofw_bus_get_devinfo_t gic_ofw_get_devinfo; 68 static bus_get_resource_list_t gic_fdt_get_resource_list; 69 static bool arm_gic_add_children(device_t); 70 71 static struct ofw_compat_data compat_data[] = { 72 {"arm,gic", true}, /* Non-standard, used in FreeBSD dts. */ 73 {"arm,gic-400", true}, 74 {"arm,cortex-a15-gic", true}, 75 {"arm,cortex-a9-gic", true}, 76 {"arm,cortex-a7-gic", true}, 77 {"arm,arm11mp-gic", true}, 78 {"brcm,brahma-b15-gic", true}, 79 {"qcom,msm-qgic2", true}, 80 {NULL, false} 81 }; 82 83 static device_method_t gic_fdt_methods[] = { 84 /* Device interface */ 85 DEVMETHOD(device_probe, gic_fdt_probe), 86 DEVMETHOD(device_attach, gic_fdt_attach), 87 88 /* Bus interface */ 89 DEVMETHOD(bus_get_resource_list,gic_fdt_get_resource_list), 90 DEVMETHOD(bus_get_device_path, ofw_bus_gen_get_device_path), 91 92 /* ofw_bus interface */ 93 DEVMETHOD(ofw_bus_get_devinfo, gic_ofw_get_devinfo), 94 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 95 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 96 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 97 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 98 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 99 100 DEVMETHOD_END, 101 }; 102 103 DEFINE_CLASS_1(gic, gic_fdt_driver, gic_fdt_methods, 104 sizeof(struct arm_gic_fdt_softc), arm_gic_driver); 105 106 EARLY_DRIVER_MODULE(gic, simplebus, gic_fdt_driver, 0, 0, 107 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); 108 EARLY_DRIVER_MODULE(gic, ofwbus, gic_fdt_driver, 0, 0, 109 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); 110 111 static int 112 gic_fdt_probe(device_t dev) 113 { 114 115 if (!ofw_bus_status_okay(dev)) 116 return (ENXIO); 117 118 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) 119 return (ENXIO); 120 device_set_desc(dev, "ARM Generic Interrupt Controller"); 121 return (BUS_PROBE_DEFAULT); 122 } 123 124 static int 125 gic_fdt_attach(device_t dev) 126 { 127 struct arm_gic_fdt_softc *sc = device_get_softc(dev); 128 phandle_t pxref; 129 intptr_t xref; 130 int err; 131 132 sc->base.gic_bus = GIC_BUS_FDT; 133 134 err = arm_gic_attach(dev); 135 if (err != 0) 136 return (err); 137 138 xref = OF_xref_from_node(ofw_bus_get_node(dev)); 139 140 /* 141 * Now, when everything is initialized, it's right time to 142 * register interrupt controller to interrupt framefork. 143 */ 144 if (intr_pic_register(dev, xref) == NULL) { 145 device_printf(dev, "could not register PIC\n"); 146 goto cleanup; 147 } 148 149 /* 150 * Controller is root if: 151 * - doesn't have interrupt parent 152 * - his interrupt parent is this controller 153 */ 154 pxref = ofw_bus_find_iparent(ofw_bus_get_node(dev)); 155 if (pxref == 0 || xref == pxref) { 156 if (intr_pic_claim_root(dev, xref, arm_gic_intr, sc) != 0) { 157 device_printf(dev, "could not set PIC as a root\n"); 158 intr_pic_deregister(dev, xref); 159 goto cleanup; 160 } 161 162 #ifdef SMP 163 if (intr_ipi_pic_register(dev, 0) != 0) { 164 device_printf(dev, "could not register for IPIs\n"); 165 goto cleanup; 166 } 167 #endif 168 } else { 169 if (sc->base.gic_res[2] == NULL) { 170 device_printf(dev, 171 "not root PIC must have defined interrupt\n"); 172 intr_pic_deregister(dev, xref); 173 goto cleanup; 174 } 175 if (bus_setup_intr(dev, sc->base.gic_res[2], INTR_TYPE_CLK, 176 arm_gic_intr, NULL, sc, &sc->base.gic_intrhand)) { 177 device_printf(dev, "could not setup irq handler\n"); 178 intr_pic_deregister(dev, xref); 179 goto cleanup; 180 } 181 } 182 183 OF_device_register_xref(xref, dev); 184 185 /* If we have children probe and attach them */ 186 if (arm_gic_add_children(dev)) { 187 bus_generic_probe(dev); 188 return (bus_generic_attach(dev)); 189 } 190 191 return (0); 192 193 cleanup: 194 arm_gic_detach(dev); 195 return(ENXIO); 196 } 197 198 static struct resource_list * 199 gic_fdt_get_resource_list(device_t bus, device_t child) 200 { 201 struct arm_gic_devinfo *di; 202 203 di = device_get_ivars(child); 204 KASSERT(di != NULL, ("gic_fdt_get_resource_list: No devinfo")); 205 206 return (&di->rl); 207 } 208 209 static int 210 arm_gic_fill_ranges(phandle_t node, struct arm_gic_fdt_softc *sc) 211 { 212 pcell_t host_cells; 213 cell_t *base_ranges; 214 ssize_t nbase_ranges; 215 int i, j, k; 216 217 host_cells = 1; 218 OF_getencprop(OF_parent(node), "#address-cells", &host_cells, 219 sizeof(host_cells)); 220 sc->addr_cells = 2; 221 OF_getencprop(node, "#address-cells", &sc->addr_cells, 222 sizeof(sc->addr_cells)); 223 sc->size_cells = 2; 224 OF_getencprop(node, "#size-cells", &sc->size_cells, 225 sizeof(sc->size_cells)); 226 227 nbase_ranges = OF_getproplen(node, "ranges"); 228 if (nbase_ranges < 0) 229 return (-1); 230 sc->base.nranges = nbase_ranges / sizeof(cell_t) / 231 (sc->addr_cells + host_cells + sc->size_cells); 232 if (sc->base.nranges == 0) 233 return (0); 234 235 sc->base.ranges = malloc(sc->base.nranges * sizeof(sc->base.ranges[0]), 236 M_DEVBUF, M_WAITOK); 237 base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK); 238 OF_getencprop(node, "ranges", base_ranges, nbase_ranges); 239 240 for (i = 0, j = 0; i < sc->base.nranges; i++) { 241 sc->base.ranges[i].bus = 0; 242 for (k = 0; k < sc->addr_cells; k++) { 243 sc->base.ranges[i].bus <<= 32; 244 sc->base.ranges[i].bus |= base_ranges[j++]; 245 } 246 sc->base.ranges[i].host = 0; 247 for (k = 0; k < host_cells; k++) { 248 sc->base.ranges[i].host <<= 32; 249 sc->base.ranges[i].host |= base_ranges[j++]; 250 } 251 sc->base.ranges[i].size = 0; 252 for (k = 0; k < sc->size_cells; k++) { 253 sc->base.ranges[i].size <<= 32; 254 sc->base.ranges[i].size |= base_ranges[j++]; 255 } 256 } 257 258 free(base_ranges, M_DEVBUF); 259 return (sc->base.nranges); 260 } 261 262 static bool 263 arm_gic_add_children(device_t dev) 264 { 265 struct arm_gic_fdt_softc *sc; 266 struct arm_gic_devinfo *dinfo; 267 phandle_t child, node; 268 device_t cdev; 269 270 sc = device_get_softc(dev); 271 node = ofw_bus_get_node(dev); 272 273 /* If we have no children don't probe for them */ 274 child = OF_child(node); 275 if (child == 0) 276 return (false); 277 278 if (arm_gic_fill_ranges(node, sc) < 0) { 279 device_printf(dev, "Have a child, but no ranges\n"); 280 return (false); 281 } 282 283 for (; child != 0; child = OF_peer(child)) { 284 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); 285 286 if (ofw_bus_gen_setup_devinfo(&dinfo->obdinfo, child) != 0) { 287 free(dinfo, M_DEVBUF); 288 continue; 289 } 290 291 resource_list_init(&dinfo->rl); 292 ofw_bus_reg_to_rl(dev, child, sc->addr_cells, 293 sc->size_cells, &dinfo->rl); 294 295 cdev = device_add_child(dev, NULL, -1); 296 if (cdev == NULL) { 297 device_printf(dev, "<%s>: device_add_child failed\n", 298 dinfo->obdinfo.obd_name); 299 resource_list_free(&dinfo->rl); 300 ofw_bus_gen_destroy_devinfo(&dinfo->obdinfo); 301 free(dinfo, M_DEVBUF); 302 continue; 303 } 304 device_set_ivars(cdev, dinfo); 305 } 306 307 return (true); 308 } 309 310 static const struct ofw_bus_devinfo * 311 gic_ofw_get_devinfo(device_t bus __unused, device_t child) 312 { 313 struct arm_gic_devinfo *di; 314 315 di = device_get_ivars(child); 316 317 return (&di->obdinfo); 318 } 319 320 static struct ofw_compat_data gicv2m_compat_data[] = { 321 {"arm,gic-v2m-frame", true}, 322 {NULL, false} 323 }; 324 325 static int 326 arm_gicv2m_fdt_probe(device_t dev) 327 { 328 329 if (!ofw_bus_status_okay(dev)) 330 return (ENXIO); 331 332 if (!ofw_bus_search_compatible(dev, gicv2m_compat_data)->ocd_data) 333 return (ENXIO); 334 335 device_set_desc(dev, "ARM Generic Interrupt Controller MSI/MSIX"); 336 return (BUS_PROBE_DEFAULT); 337 } 338 339 static int 340 arm_gicv2m_fdt_attach(device_t dev) 341 { 342 struct arm_gicv2m_softc *sc; 343 344 sc = device_get_softc(dev); 345 sc->sc_xref = OF_xref_from_node(ofw_bus_get_node(dev)); 346 347 return (arm_gicv2m_attach(dev)); 348 } 349 350 static device_method_t arm_gicv2m_fdt_methods[] = { 351 /* Device interface */ 352 DEVMETHOD(device_probe, arm_gicv2m_fdt_probe), 353 DEVMETHOD(device_attach, arm_gicv2m_fdt_attach), 354 355 /* End */ 356 DEVMETHOD_END 357 }; 358 359 DEFINE_CLASS_1(gicv2m, arm_gicv2m_fdt_driver, arm_gicv2m_fdt_methods, 360 sizeof(struct arm_gicv2m_softc), arm_gicv2m_driver); 361 362 EARLY_DRIVER_MODULE(gicv2m, gic, arm_gicv2m_fdt_driver, 0, 0, 363 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); 364