1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */ 2 3 /*- 4 * SPDX-License-Identifier: BSD-4-Clause 5 * 6 * Copyright (c) 2004 Olivier Houchard 7 * Copyright (c) 1994-1998 Mark Brinicombe. 8 * Copyright (c) 1994 Brini. 9 * All rights reserved. 10 * 11 * This code is derived from software written for Brini by Mark Brinicombe 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by Mark Brinicombe 24 * for the NetBSD Project. 25 * 4. The name of the company nor the name of the author may be used to 26 * endorse or promote products derived from this software without specific 27 * prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 31 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 32 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * Machine dependent functions for kernel setup 42 * 43 * Created : 17/09/94 44 * Updated : 18/04/01 updated for new wscons 45 */ 46 47 #include "opt_ddb.h" 48 #include "opt_kstack_pages.h" 49 #include "opt_platform.h" 50 #include "opt_sched.h" 51 #include "opt_timer.h" 52 53 #include <sys/cdefs.h> 54 __FBSDID("$FreeBSD$"); 55 56 #include <sys/param.h> 57 #include <sys/buf.h> 58 #include <sys/bus.h> 59 #include <sys/cons.h> 60 #include <sys/cpu.h> 61 #include <sys/devmap.h> 62 #include <sys/efi.h> 63 #include <sys/imgact.h> 64 #include <sys/kdb.h> 65 #include <sys/kernel.h> 66 #include <sys/ktr.h> 67 #include <sys/linker.h> 68 #include <sys/msgbuf.h> 69 #include <sys/reboot.h> 70 #include <sys/rwlock.h> 71 #include <sys/sched.h> 72 #include <sys/syscallsubr.h> 73 #include <sys/sysent.h> 74 #include <sys/sysproto.h> 75 #include <sys/vmmeter.h> 76 77 #include <vm/vm_object.h> 78 #include <vm/vm_page.h> 79 #include <vm/vm_pager.h> 80 81 #include <machine/asm.h> 82 #include <machine/debug_monitor.h> 83 #include <machine/machdep.h> 84 #include <machine/metadata.h> 85 #include <machine/pcb.h> 86 #include <machine/physmem.h> 87 #include <machine/platform.h> 88 #include <machine/sysarch.h> 89 #include <machine/undefined.h> 90 #include <machine/vfp.h> 91 #include <machine/vmparam.h> 92 93 #ifdef FDT 94 #include <dev/fdt/fdt_common.h> 95 #include <machine/ofw_machdep.h> 96 #endif 97 98 #ifdef DEBUG 99 #define debugf(fmt, args...) printf(fmt, ##args) 100 #else 101 #define debugf(fmt, args...) 102 #endif 103 104 #if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \ 105 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \ 106 defined(COMPAT_FREEBSD9) 107 #error FreeBSD/arm doesn't provide compatibility with releases prior to 10 108 #endif 109 110 #if __ARM_ARCH >= 6 && !defined(INTRNG) 111 #error armv6 requires INTRNG 112 #endif 113 114 #ifndef _ARM_ARCH_5E 115 #error FreeBSD requires ARMv5 or later 116 #endif 117 118 struct pcpu __pcpu[MAXCPU]; 119 struct pcpu *pcpup = &__pcpu[0]; 120 121 static struct trapframe proc0_tf; 122 uint32_t cpu_reset_address = 0; 123 int cold = 1; 124 vm_offset_t vector_page; 125 126 int (*_arm_memcpy)(void *, void *, int, int) = NULL; 127 int (*_arm_bzero)(void *, int, int) = NULL; 128 int _min_memcpy_size = 0; 129 int _min_bzero_size = 0; 130 131 extern int *end; 132 133 #ifdef FDT 134 vm_paddr_t pmap_pa; 135 #if __ARM_ARCH >= 6 136 vm_offset_t systempage; 137 vm_offset_t irqstack; 138 vm_offset_t undstack; 139 vm_offset_t abtstack; 140 #else 141 /* 142 * This is the number of L2 page tables required for covering max 143 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 144 * stacks etc.), uprounded to be divisible by 4. 145 */ 146 #define KERNEL_PT_MAX 78 147 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 148 struct pv_addr systempage; 149 static struct pv_addr msgbufpv; 150 struct pv_addr irqstack; 151 struct pv_addr undstack; 152 struct pv_addr abtstack; 153 static struct pv_addr kernelstack; 154 #endif /* __ARM_ARCH >= 6 */ 155 #endif /* FDT */ 156 157 #ifdef PLATFORM 158 static delay_func *delay_impl; 159 static void *delay_arg; 160 #endif 161 162 struct kva_md_info kmi; 163 164 /* 165 * arm32_vector_init: 166 * 167 * Initialize the vector page, and select whether or not to 168 * relocate the vectors. 169 * 170 * NOTE: We expect the vector page to be mapped at its expected 171 * destination. 172 */ 173 174 extern unsigned int page0[], page0_data[]; 175 void 176 arm_vector_init(vm_offset_t va, int which) 177 { 178 unsigned int *vectors = (int *) va; 179 unsigned int *vectors_data = vectors + (page0_data - page0); 180 int vec; 181 182 /* 183 * Loop through the vectors we're taking over, and copy the 184 * vector's insn and data word. 185 */ 186 for (vec = 0; vec < ARM_NVEC; vec++) { 187 if ((which & (1 << vec)) == 0) { 188 /* Don't want to take over this vector. */ 189 continue; 190 } 191 vectors[vec] = page0[vec]; 192 vectors_data[vec] = page0_data[vec]; 193 } 194 195 /* Now sync the vectors. */ 196 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int)); 197 198 vector_page = va; 199 #if __ARM_ARCH < 6 200 if (va == ARM_VECTORS_HIGH) { 201 /* 202 * Enable high vectors in the system control reg (SCTLR). 203 * 204 * Assume the MD caller knows what it's doing here, and really 205 * does want the vector page relocated. 206 * 207 * Note: This has to be done here (and not just in 208 * cpu_setup()) because the vector page needs to be 209 * accessible *before* cpu_startup() is called. 210 * Think ddb(9) ... 211 */ 212 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 213 } 214 #endif 215 } 216 217 static void 218 cpu_startup(void *dummy) 219 { 220 struct pcb *pcb = thread0.td_pcb; 221 const unsigned int mbyte = 1024 * 1024; 222 #if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE) 223 vm_page_t m; 224 #endif 225 226 identify_arm_cpu(); 227 228 vm_ksubmap_init(&kmi); 229 230 /* 231 * Display the RAM layout. 232 */ 233 printf("real memory = %ju (%ju MB)\n", 234 (uintmax_t)arm32_ptob(realmem), 235 (uintmax_t)arm32_ptob(realmem) / mbyte); 236 printf("avail memory = %ju (%ju MB)\n", 237 (uintmax_t)arm32_ptob(vm_free_count()), 238 (uintmax_t)arm32_ptob(vm_free_count()) / mbyte); 239 if (bootverbose) { 240 arm_physmem_print_tables(); 241 devmap_print_table(); 242 } 243 244 bufinit(); 245 vm_pager_bufferinit(); 246 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack + 247 USPACE_SVC_STACK_TOP; 248 pmap_set_pcb_pagedir(kernel_pmap, pcb); 249 #if __ARM_ARCH < 6 250 vector_page_setprot(VM_PROT_READ); 251 pmap_postinit(); 252 #ifdef ARM_CACHE_LOCK_ENABLE 253 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS); 254 arm_lock_cache_line(ARM_TP_ADDRESS); 255 #else 256 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO); 257 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m)); 258 #endif 259 *(uint32_t *)ARM_RAS_START = 0; 260 *(uint32_t *)ARM_RAS_END = 0xffffffff; 261 #endif 262 } 263 264 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 265 266 /* 267 * Flush the D-cache for non-DMA I/O so that the I-cache can 268 * be made coherent later. 269 */ 270 void 271 cpu_flush_dcache(void *ptr, size_t len) 272 { 273 274 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len); 275 } 276 277 /* Get current clock frequency for the given cpu id. */ 278 int 279 cpu_est_clockrate(int cpu_id, uint64_t *rate) 280 { 281 #if __ARM_ARCH >= 6 282 struct pcpu *pc; 283 284 pc = pcpu_find(cpu_id); 285 if (pc == NULL || rate == NULL) 286 return (EINVAL); 287 288 if (pc->pc_clock == 0) 289 return (EOPNOTSUPP); 290 291 *rate = pc->pc_clock; 292 293 return (0); 294 #else 295 return (ENXIO); 296 #endif 297 } 298 299 void 300 cpu_idle(int busy) 301 { 302 303 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu); 304 spinlock_enter(); 305 #ifndef NO_EVENTTIMERS 306 if (!busy) 307 cpu_idleclock(); 308 #endif 309 if (!sched_runnable()) 310 cpu_sleep(0); 311 #ifndef NO_EVENTTIMERS 312 if (!busy) 313 cpu_activeclock(); 314 #endif 315 spinlock_exit(); 316 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu); 317 } 318 319 int 320 cpu_idle_wakeup(int cpu) 321 { 322 323 return (0); 324 } 325 326 #ifdef NO_EVENTTIMERS 327 /* 328 * Most ARM platforms don't need to do anything special to init their clocks 329 * (they get intialized during normal device attachment), and by not defining a 330 * cpu_initclocks() function they get this generic one. Any platform that needs 331 * to do something special can just provide their own implementation, which will 332 * override this one due to the weak linkage. 333 */ 334 void 335 arm_generic_initclocks(void) 336 { 337 } 338 __weak_reference(arm_generic_initclocks, cpu_initclocks); 339 340 #else 341 void 342 cpu_initclocks(void) 343 { 344 345 #ifdef SMP 346 if (PCPU_GET(cpuid) == 0) 347 cpu_initclocks_bsp(); 348 else 349 cpu_initclocks_ap(); 350 #else 351 cpu_initclocks_bsp(); 352 #endif 353 } 354 #endif 355 356 #ifdef PLATFORM 357 void 358 arm_set_delay(delay_func *impl, void *arg) 359 { 360 361 KASSERT(impl != NULL, ("No DELAY implementation")); 362 delay_impl = impl; 363 delay_arg = arg; 364 } 365 366 void 367 DELAY(int usec) 368 { 369 370 TSENTER(); 371 delay_impl(usec, delay_arg); 372 TSEXIT(); 373 } 374 #endif 375 376 void 377 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 378 { 379 } 380 381 void 382 spinlock_enter(void) 383 { 384 struct thread *td; 385 register_t cspr; 386 387 td = curthread; 388 if (td->td_md.md_spinlock_count == 0) { 389 cspr = disable_interrupts(PSR_I | PSR_F); 390 td->td_md.md_spinlock_count = 1; 391 td->td_md.md_saved_cspr = cspr; 392 } else 393 td->td_md.md_spinlock_count++; 394 critical_enter(); 395 } 396 397 void 398 spinlock_exit(void) 399 { 400 struct thread *td; 401 register_t cspr; 402 403 td = curthread; 404 critical_exit(); 405 cspr = td->td_md.md_saved_cspr; 406 td->td_md.md_spinlock_count--; 407 if (td->td_md.md_spinlock_count == 0) 408 restore_interrupts(cspr); 409 } 410 411 /* 412 * Clear registers on exec 413 */ 414 void 415 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 416 { 417 struct trapframe *tf = td->td_frame; 418 419 memset(tf, 0, sizeof(*tf)); 420 tf->tf_usr_sp = stack; 421 tf->tf_usr_lr = imgp->entry_addr; 422 tf->tf_svc_lr = 0x77777777; 423 tf->tf_pc = imgp->entry_addr; 424 tf->tf_spsr = PSR_USR32_MODE; 425 } 426 427 428 #ifdef VFP 429 /* 430 * Get machine VFP context. 431 */ 432 void 433 get_vfpcontext(struct thread *td, mcontext_vfp_t *vfp) 434 { 435 struct pcb *pcb; 436 437 pcb = td->td_pcb; 438 if (td == curthread) { 439 critical_enter(); 440 vfp_store(&pcb->pcb_vfpstate, false); 441 critical_exit(); 442 } else 443 MPASS(TD_IS_SUSPENDED(td)); 444 memcpy(vfp->mcv_reg, pcb->pcb_vfpstate.reg, 445 sizeof(vfp->mcv_reg)); 446 vfp->mcv_fpscr = pcb->pcb_vfpstate.fpscr; 447 } 448 449 /* 450 * Set machine VFP context. 451 */ 452 void 453 set_vfpcontext(struct thread *td, mcontext_vfp_t *vfp) 454 { 455 struct pcb *pcb; 456 457 pcb = td->td_pcb; 458 if (td == curthread) { 459 critical_enter(); 460 vfp_discard(td); 461 critical_exit(); 462 } else 463 MPASS(TD_IS_SUSPENDED(td)); 464 memcpy(pcb->pcb_vfpstate.reg, vfp->mcv_reg, 465 sizeof(pcb->pcb_vfpstate.reg)); 466 pcb->pcb_vfpstate.fpscr = vfp->mcv_fpscr; 467 } 468 #endif 469 470 int 471 arm_get_vfpstate(struct thread *td, void *args) 472 { 473 int rv; 474 struct arm_get_vfpstate_args ua; 475 mcontext_vfp_t mcontext_vfp; 476 477 rv = copyin(args, &ua, sizeof(ua)); 478 if (rv != 0) 479 return (rv); 480 if (ua.mc_vfp_size != sizeof(mcontext_vfp_t)) 481 return (EINVAL); 482 #ifdef VFP 483 get_vfpcontext(td, &mcontext_vfp); 484 #else 485 bzero(&mcontext_vfp, sizeof(mcontext_vfp)); 486 #endif 487 488 rv = copyout(&mcontext_vfp, ua.mc_vfp, sizeof(mcontext_vfp)); 489 if (rv != 0) 490 return (rv); 491 return (0); 492 } 493 494 /* 495 * Get machine context. 496 */ 497 int 498 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 499 { 500 struct trapframe *tf = td->td_frame; 501 __greg_t *gr = mcp->__gregs; 502 503 if (clear_ret & GET_MC_CLEAR_RET) { 504 gr[_REG_R0] = 0; 505 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C; 506 } else { 507 gr[_REG_R0] = tf->tf_r0; 508 gr[_REG_CPSR] = tf->tf_spsr; 509 } 510 gr[_REG_R1] = tf->tf_r1; 511 gr[_REG_R2] = tf->tf_r2; 512 gr[_REG_R3] = tf->tf_r3; 513 gr[_REG_R4] = tf->tf_r4; 514 gr[_REG_R5] = tf->tf_r5; 515 gr[_REG_R6] = tf->tf_r6; 516 gr[_REG_R7] = tf->tf_r7; 517 gr[_REG_R8] = tf->tf_r8; 518 gr[_REG_R9] = tf->tf_r9; 519 gr[_REG_R10] = tf->tf_r10; 520 gr[_REG_R11] = tf->tf_r11; 521 gr[_REG_R12] = tf->tf_r12; 522 gr[_REG_SP] = tf->tf_usr_sp; 523 gr[_REG_LR] = tf->tf_usr_lr; 524 gr[_REG_PC] = tf->tf_pc; 525 526 mcp->mc_vfp_size = 0; 527 mcp->mc_vfp_ptr = NULL; 528 memset(&mcp->mc_spare, 0, sizeof(mcp->mc_spare)); 529 530 return (0); 531 } 532 533 /* 534 * Set machine context. 535 * 536 * However, we don't set any but the user modifiable flags, and we won't 537 * touch the cs selector. 538 */ 539 int 540 set_mcontext(struct thread *td, mcontext_t *mcp) 541 { 542 mcontext_vfp_t mc_vfp, *vfp; 543 struct trapframe *tf = td->td_frame; 544 const __greg_t *gr = mcp->__gregs; 545 int spsr; 546 547 /* 548 * Make sure the processor mode has not been tampered with and 549 * interrupts have not been disabled. 550 */ 551 spsr = gr[_REG_CPSR]; 552 if ((spsr & PSR_MODE) != PSR_USR32_MODE || 553 (spsr & (PSR_I | PSR_F)) != 0) 554 return (EINVAL); 555 556 #ifdef WITNESS 557 if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(mc_vfp)) { 558 printf("%s: %s: Malformed mc_vfp_size: %d (0x%08X)\n", 559 td->td_proc->p_comm, __func__, 560 mcp->mc_vfp_size, mcp->mc_vfp_size); 561 } else if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr == NULL) { 562 printf("%s: %s: c_vfp_size != 0 but mc_vfp_ptr == NULL\n", 563 td->td_proc->p_comm, __func__); 564 } 565 #endif 566 567 if (mcp->mc_vfp_size == sizeof(mc_vfp) && mcp->mc_vfp_ptr != NULL) { 568 if (copyin(mcp->mc_vfp_ptr, &mc_vfp, sizeof(mc_vfp)) != 0) 569 return (EFAULT); 570 vfp = &mc_vfp; 571 } else { 572 vfp = NULL; 573 } 574 575 tf->tf_r0 = gr[_REG_R0]; 576 tf->tf_r1 = gr[_REG_R1]; 577 tf->tf_r2 = gr[_REG_R2]; 578 tf->tf_r3 = gr[_REG_R3]; 579 tf->tf_r4 = gr[_REG_R4]; 580 tf->tf_r5 = gr[_REG_R5]; 581 tf->tf_r6 = gr[_REG_R6]; 582 tf->tf_r7 = gr[_REG_R7]; 583 tf->tf_r8 = gr[_REG_R8]; 584 tf->tf_r9 = gr[_REG_R9]; 585 tf->tf_r10 = gr[_REG_R10]; 586 tf->tf_r11 = gr[_REG_R11]; 587 tf->tf_r12 = gr[_REG_R12]; 588 tf->tf_usr_sp = gr[_REG_SP]; 589 tf->tf_usr_lr = gr[_REG_LR]; 590 tf->tf_pc = gr[_REG_PC]; 591 tf->tf_spsr = gr[_REG_CPSR]; 592 #ifdef VFP 593 if (vfp != NULL) 594 set_vfpcontext(td, vfp); 595 #endif 596 return (0); 597 } 598 599 void 600 sendsig(catcher, ksi, mask) 601 sig_t catcher; 602 ksiginfo_t *ksi; 603 sigset_t *mask; 604 { 605 struct thread *td; 606 struct proc *p; 607 struct trapframe *tf; 608 struct sigframe *fp, frame; 609 struct sigacts *psp; 610 struct sysentvec *sysent; 611 int onstack; 612 int sig; 613 int code; 614 615 td = curthread; 616 p = td->td_proc; 617 PROC_LOCK_ASSERT(p, MA_OWNED); 618 sig = ksi->ksi_signo; 619 code = ksi->ksi_code; 620 psp = p->p_sigacts; 621 mtx_assert(&psp->ps_mtx, MA_OWNED); 622 tf = td->td_frame; 623 onstack = sigonstack(tf->tf_usr_sp); 624 625 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 626 catcher, sig); 627 628 /* Allocate and validate space for the signal handler context. */ 629 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) && 630 SIGISMEMBER(psp->ps_sigonstack, sig)) { 631 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp + 632 td->td_sigstk.ss_size); 633 #if defined(COMPAT_43) 634 td->td_sigstk.ss_flags |= SS_ONSTACK; 635 #endif 636 } else 637 fp = (struct sigframe *)td->td_frame->tf_usr_sp; 638 639 /* make room on the stack */ 640 fp--; 641 642 /* make the stack aligned */ 643 fp = (struct sigframe *)STACKALIGN(fp); 644 /* Populate the siginfo frame. */ 645 bzero(&frame, sizeof(frame)); 646 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0); 647 #ifdef VFP 648 get_vfpcontext(td, &frame.sf_vfp); 649 frame.sf_uc.uc_mcontext.mc_vfp_size = sizeof(fp->sf_vfp); 650 frame.sf_uc.uc_mcontext.mc_vfp_ptr = &fp->sf_vfp; 651 #else 652 frame.sf_uc.uc_mcontext.mc_vfp_size = 0; 653 frame.sf_uc.uc_mcontext.mc_vfp_ptr = NULL; 654 #endif 655 frame.sf_si = ksi->ksi_info; 656 frame.sf_uc.uc_sigmask = *mask; 657 frame.sf_uc.uc_stack = td->td_sigstk; 658 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) != 0 ? 659 (onstack ? SS_ONSTACK : 0) : SS_DISABLE; 660 mtx_unlock(&psp->ps_mtx); 661 PROC_UNLOCK(td->td_proc); 662 663 /* Copy the sigframe out to the user's stack. */ 664 if (copyout(&frame, fp, sizeof(*fp)) != 0) { 665 /* Process has trashed its stack. Kill it. */ 666 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp); 667 PROC_LOCK(p); 668 sigexit(td, SIGILL); 669 } 670 671 /* 672 * Build context to run handler in. We invoke the handler 673 * directly, only returning via the trampoline. Note the 674 * trampoline version numbers are coordinated with machine- 675 * dependent code in libc. 676 */ 677 678 tf->tf_r0 = sig; 679 tf->tf_r1 = (register_t)&fp->sf_si; 680 tf->tf_r2 = (register_t)&fp->sf_uc; 681 682 /* the trampoline uses r5 as the uc address */ 683 tf->tf_r5 = (register_t)&fp->sf_uc; 684 tf->tf_pc = (register_t)catcher; 685 tf->tf_usr_sp = (register_t)fp; 686 sysent = p->p_sysent; 687 if (sysent->sv_sigcode_base != 0) 688 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base; 689 else 690 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings - 691 *(sysent->sv_szsigcode)); 692 /* Set the mode to enter in the signal handler */ 693 #if __ARM_ARCH >= 7 694 if ((register_t)catcher & 1) 695 tf->tf_spsr |= PSR_T; 696 else 697 tf->tf_spsr &= ~PSR_T; 698 #endif 699 700 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr, 701 tf->tf_usr_sp); 702 703 PROC_LOCK(p); 704 mtx_lock(&psp->ps_mtx); 705 } 706 707 int 708 sys_sigreturn(td, uap) 709 struct thread *td; 710 struct sigreturn_args /* { 711 const struct __ucontext *sigcntxp; 712 } */ *uap; 713 { 714 ucontext_t uc; 715 int error; 716 717 if (uap == NULL) 718 return (EFAULT); 719 if (copyin(uap->sigcntxp, &uc, sizeof(uc))) 720 return (EFAULT); 721 /* Restore register context. */ 722 error = set_mcontext(td, &uc.uc_mcontext); 723 if (error != 0) 724 return (error); 725 726 /* Restore signal mask. */ 727 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 728 729 return (EJUSTRETURN); 730 } 731 732 /* 733 * Construct a PCB from a trapframe. This is called from kdb_trap() where 734 * we want to start a backtrace from the function that caused us to enter 735 * the debugger. We have the context in the trapframe, but base the trace 736 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 737 * enough for a backtrace. 738 */ 739 void 740 makectx(struct trapframe *tf, struct pcb *pcb) 741 { 742 pcb->pcb_regs.sf_r4 = tf->tf_r4; 743 pcb->pcb_regs.sf_r5 = tf->tf_r5; 744 pcb->pcb_regs.sf_r6 = tf->tf_r6; 745 pcb->pcb_regs.sf_r7 = tf->tf_r7; 746 pcb->pcb_regs.sf_r8 = tf->tf_r8; 747 pcb->pcb_regs.sf_r9 = tf->tf_r9; 748 pcb->pcb_regs.sf_r10 = tf->tf_r10; 749 pcb->pcb_regs.sf_r11 = tf->tf_r11; 750 pcb->pcb_regs.sf_r12 = tf->tf_r12; 751 pcb->pcb_regs.sf_pc = tf->tf_pc; 752 pcb->pcb_regs.sf_lr = tf->tf_usr_lr; 753 pcb->pcb_regs.sf_sp = tf->tf_usr_sp; 754 } 755 756 void 757 pcpu0_init(void) 758 { 759 #if __ARM_ARCH >= 6 760 set_curthread(&thread0); 761 #endif 762 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 763 PCPU_SET(curthread, &thread0); 764 } 765 766 /* 767 * Initialize proc0 768 */ 769 void 770 init_proc0(vm_offset_t kstack) 771 { 772 proc_linkup0(&proc0, &thread0); 773 thread0.td_kstack = kstack; 774 thread0.td_pcb = (struct pcb *) 775 (thread0.td_kstack + kstack_pages * PAGE_SIZE) - 1; 776 thread0.td_pcb->pcb_flags = 0; 777 thread0.td_pcb->pcb_vfpcpu = -1; 778 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN; 779 thread0.td_frame = &proc0_tf; 780 pcpup->pc_curpcb = thread0.td_pcb; 781 } 782 783 #if __ARM_ARCH >= 6 784 void 785 set_stackptrs(int cpu) 786 { 787 788 set_stackptr(PSR_IRQ32_MODE, 789 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 790 set_stackptr(PSR_ABT32_MODE, 791 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 792 set_stackptr(PSR_UND32_MODE, 793 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 794 } 795 #else 796 void 797 set_stackptrs(int cpu) 798 { 799 800 set_stackptr(PSR_IRQ32_MODE, 801 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 802 set_stackptr(PSR_ABT32_MODE, 803 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 804 set_stackptr(PSR_UND32_MODE, 805 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 806 } 807 #endif 808 809 static void 810 arm_kdb_init(void) 811 { 812 813 kdb_init(); 814 #ifdef KDB 815 if (boothowto & RB_KDB) 816 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); 817 #endif 818 } 819 820 #ifdef FDT 821 #if __ARM_ARCH < 6 822 void * 823 initarm(struct arm_boot_params *abp) 824 { 825 struct mem_region mem_regions[FDT_MEM_REGIONS]; 826 struct pv_addr kernel_l1pt; 827 struct pv_addr dpcpu; 828 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 829 uint64_t memsize; 830 uint32_t l2size; 831 char *env; 832 void *kmdp; 833 u_int l1pagetable; 834 int i, j, err_devmap, mem_regions_sz; 835 836 lastaddr = parse_boot_param(abp); 837 arm_physmem_kernaddr = abp->abp_physaddr; 838 839 memsize = 0; 840 841 cpuinfo_init(); 842 set_cpufuncs(); 843 844 /* 845 * Find the dtb passed in by the boot loader. 846 */ 847 kmdp = preload_search_by_type("elf kernel"); 848 if (kmdp != NULL) 849 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 850 else 851 dtbp = (vm_offset_t)NULL; 852 853 #if defined(FDT_DTB_STATIC) 854 /* 855 * In case the device tree blob was not retrieved (from metadata) try 856 * to use the statically embedded one. 857 */ 858 if (dtbp == (vm_offset_t)NULL) 859 dtbp = (vm_offset_t)&fdt_static_dtb; 860 #endif 861 862 if (OF_install(OFW_FDT, 0) == FALSE) 863 panic("Cannot install FDT"); 864 865 if (OF_init((void *)dtbp) != 0) 866 panic("OF_init failed with the found device tree"); 867 868 /* Grab physical memory regions information from device tree. */ 869 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0) 870 panic("Cannot get physical memory regions"); 871 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 872 873 /* Grab reserved memory regions information from device tree. */ 874 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 875 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 876 EXFLAG_NODUMP | EXFLAG_NOALLOC); 877 878 /* Platform-specific initialisation */ 879 platform_probe_and_attach(); 880 881 pcpu0_init(); 882 883 /* Do basic tuning, hz etc */ 884 init_param1(); 885 886 /* Calculate number of L2 tables needed for mapping vm_page_array */ 887 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 888 l2size = (l2size >> L1_S_SHIFT) + 1; 889 890 /* 891 * Add one table for end of kernel map, one for stacks, msgbuf and 892 * L1 and L2 tables map, one for vectors map and two for 893 * l2 structures from pmap_bootstrap. 894 */ 895 l2size += 5; 896 897 /* Make it divisible by 4 */ 898 l2size = (l2size + 3) & ~3; 899 900 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 901 902 /* Define a macro to simplify memory allocation */ 903 #define valloc_pages(var, np) \ 904 alloc_pages((var).pv_va, (np)); \ 905 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR); 906 907 #define alloc_pages(var, np) \ 908 (var) = freemempos; \ 909 freemempos += (np * PAGE_SIZE); \ 910 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 911 912 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 913 freemempos += PAGE_SIZE; 914 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 915 916 for (i = 0, j = 0; i < l2size; ++i) { 917 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 918 valloc_pages(kernel_pt_table[i], 919 L2_TABLE_SIZE / PAGE_SIZE); 920 j = i; 921 } else { 922 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 923 L2_TABLE_SIZE_REAL * (i - j); 924 kernel_pt_table[i].pv_pa = 925 kernel_pt_table[i].pv_va - KERNVIRTADDR + 926 abp->abp_physaddr; 927 928 } 929 } 930 /* 931 * Allocate a page for the system page mapped to 0x00000000 932 * or 0xffff0000. This page will just contain the system vectors 933 * and can be shared by all processes. 934 */ 935 valloc_pages(systempage, 1); 936 937 /* Allocate dynamic per-cpu area. */ 938 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 939 dpcpu_init((void *)dpcpu.pv_va, 0); 940 941 /* Allocate stacks for all modes */ 942 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU); 943 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU); 944 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU); 945 valloc_pages(kernelstack, kstack_pages * MAXCPU); 946 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 947 948 /* 949 * Now we start construction of the L1 page table 950 * We start by mapping the L2 page tables into the L1. 951 * This means that we can replace L1 mappings later on if necessary 952 */ 953 l1pagetable = kernel_l1pt.pv_va; 954 955 /* 956 * Try to map as much as possible of kernel text and data using 957 * 1MB section mapping and for the rest of initial kernel address 958 * space use L2 coarse tables. 959 * 960 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 961 * and kernel structures 962 */ 963 l2_start = lastaddr & ~(L1_S_OFFSET); 964 for (i = 0 ; i < l2size - 1; i++) 965 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 966 &kernel_pt_table[i]); 967 968 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 969 970 /* Map kernel code and data */ 971 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr, 972 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 973 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 974 975 /* Map L1 directory and allocated L2 page tables */ 976 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 977 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 978 979 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 980 kernel_pt_table[0].pv_pa, 981 L2_TABLE_SIZE_REAL * l2size, 982 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 983 984 /* Map allocated DPCPU, stacks and msgbuf */ 985 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 986 freemempos - dpcpu.pv_va, 987 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 988 989 /* Link and map the vector page */ 990 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 991 &kernel_pt_table[l2size - 1]); 992 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 993 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE); 994 995 /* Establish static device mappings. */ 996 err_devmap = platform_devmap_init(); 997 devmap_bootstrap(l1pagetable, NULL); 998 vm_max_kernel_address = platform_lastaddr(); 999 1000 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT); 1001 pmap_pa = kernel_l1pt.pv_pa; 1002 cpu_setttb(kernel_l1pt.pv_pa); 1003 cpu_tlb_flushID(); 1004 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 1005 1006 /* 1007 * Now that proper page tables are installed, call cpu_setup() to enable 1008 * instruction and data caches and other chip-specific features. 1009 */ 1010 cpu_setup(); 1011 1012 /* 1013 * Only after the SOC registers block is mapped we can perform device 1014 * tree fixups, as they may attempt to read parameters from hardware. 1015 */ 1016 OF_interpret("perform-fixup", 0); 1017 1018 platform_gpio_init(); 1019 1020 cninit(); 1021 1022 debugf("initarm: console initialized\n"); 1023 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1024 debugf(" boothowto = 0x%08x\n", boothowto); 1025 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1026 arm_print_kenv(); 1027 1028 env = kern_getenv("kernelname"); 1029 if (env != NULL) { 1030 strlcpy(kernelname, env, sizeof(kernelname)); 1031 freeenv(env); 1032 } 1033 1034 if (err_devmap != 0) 1035 printf("WARNING: could not fully configure devmap, error=%d\n", 1036 err_devmap); 1037 1038 platform_late_init(); 1039 1040 /* 1041 * Pages were allocated during the secondary bootstrap for the 1042 * stacks for different CPU modes. 1043 * We must now set the r13 registers in the different CPU modes to 1044 * point to these stacks. 1045 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1046 * of the stack memory. 1047 */ 1048 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 1049 1050 set_stackptrs(0); 1051 1052 /* 1053 * We must now clean the cache again.... 1054 * Cleaning may be done by reading new data to displace any 1055 * dirty data in the cache. This will have happened in cpu_setttb() 1056 * but since we are boot strapping the addresses used for the read 1057 * may have just been remapped and thus the cache could be out 1058 * of sync. A re-clean after the switch will cure this. 1059 * After booting there are no gross relocations of the kernel thus 1060 * this problem will not occur after initarm(). 1061 */ 1062 cpu_idcache_wbinv_all(); 1063 1064 undefined_init(); 1065 1066 init_proc0(kernelstack.pv_va); 1067 1068 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1069 pmap_bootstrap(freemempos, &kernel_l1pt); 1070 msgbufp = (void *)msgbufpv.pv_va; 1071 msgbufinit(msgbufp, msgbufsize); 1072 mutex_init(); 1073 1074 /* 1075 * Exclude the kernel (and all the things we allocated which immediately 1076 * follow the kernel) from the VM allocation pool but not from crash 1077 * dumps. virtual_avail is a global variable which tracks the kva we've 1078 * "allocated" while setting up pmaps. 1079 * 1080 * Prepare the list of physical memory available to the vm subsystem. 1081 */ 1082 arm_physmem_exclude_region(abp->abp_physaddr, 1083 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC); 1084 arm_physmem_init_kernel_globals(); 1085 1086 init_param2(physmem); 1087 dbg_monitor_init(); 1088 arm_kdb_init(); 1089 1090 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 1091 sizeof(struct pcb))); 1092 } 1093 #else /* __ARM_ARCH < 6 */ 1094 void * 1095 initarm(struct arm_boot_params *abp) 1096 { 1097 struct mem_region mem_regions[FDT_MEM_REGIONS]; 1098 vm_paddr_t lastaddr; 1099 vm_offset_t dtbp, kernelstack, dpcpu; 1100 char *env; 1101 void *kmdp; 1102 int err_devmap, mem_regions_sz; 1103 #ifdef EFI 1104 struct efi_map_header *efihdr; 1105 #endif 1106 1107 /* get last allocated physical address */ 1108 arm_physmem_kernaddr = abp->abp_physaddr; 1109 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr; 1110 1111 set_cpufuncs(); 1112 cpuinfo_init(); 1113 1114 /* 1115 * Find the dtb passed in by the boot loader. 1116 */ 1117 kmdp = preload_search_by_type("elf kernel"); 1118 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 1119 #if defined(FDT_DTB_STATIC) 1120 /* 1121 * In case the device tree blob was not retrieved (from metadata) try 1122 * to use the statically embedded one. 1123 */ 1124 if (dtbp == (vm_offset_t)NULL) 1125 dtbp = (vm_offset_t)&fdt_static_dtb; 1126 #endif 1127 1128 if (OF_install(OFW_FDT, 0) == FALSE) 1129 panic("Cannot install FDT"); 1130 1131 if (OF_init((void *)dtbp) != 0) 1132 panic("OF_init failed with the found device tree"); 1133 1134 #if defined(LINUX_BOOT_ABI) 1135 arm_parse_fdt_bootargs(); 1136 #endif 1137 1138 #ifdef EFI 1139 efihdr = (struct efi_map_header *)preload_search_info(kmdp, 1140 MODINFO_METADATA | MODINFOMD_EFI_MAP); 1141 if (efihdr != NULL) { 1142 arm_add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz); 1143 } else 1144 #endif 1145 { 1146 /* Grab physical memory regions information from device tree. */ 1147 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0) 1148 panic("Cannot get physical memory regions"); 1149 } 1150 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 1151 1152 /* Grab reserved memory regions information from device tree. */ 1153 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 1154 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 1155 EXFLAG_NODUMP | EXFLAG_NOALLOC); 1156 1157 /* 1158 * Set TEX remapping registers. 1159 * Setup kernel page tables and switch to kernel L1 page table. 1160 */ 1161 pmap_set_tex(); 1162 pmap_bootstrap_prepare(lastaddr); 1163 1164 /* 1165 * If EARLY_PRINTF support is enabled, we need to re-establish the 1166 * mapping after pmap_bootstrap_prepare() switches to new page tables. 1167 * Note that we can only do the remapping if the VA is outside the 1168 * kernel, now that we have real virtual (not VA=PA) mappings in effect. 1169 * Early printf does not work between the time pmap_set_tex() does 1170 * cp15_prrr_set() and this code remaps the VA. 1171 */ 1172 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE 1173 pmap_preboot_map_attr(SOCDEV_PA, SOCDEV_VA, 1024 * 1024, 1174 VM_PROT_READ | VM_PROT_WRITE, VM_MEMATTR_DEVICE); 1175 #endif 1176 1177 /* 1178 * Now that proper page tables are installed, call cpu_setup() to enable 1179 * instruction and data caches and other chip-specific features. 1180 */ 1181 cpu_setup(); 1182 1183 /* Platform-specific initialisation */ 1184 platform_probe_and_attach(); 1185 pcpu0_init(); 1186 1187 /* Do basic tuning, hz etc */ 1188 init_param1(); 1189 1190 /* 1191 * Allocate a page for the system page mapped to 0xffff0000 1192 * This page will just contain the system vectors and can be 1193 * shared by all processes. 1194 */ 1195 systempage = pmap_preboot_get_pages(1); 1196 1197 /* Map the vector page. */ 1198 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1); 1199 if (virtual_end >= ARM_VECTORS_HIGH) 1200 virtual_end = ARM_VECTORS_HIGH - 1; 1201 1202 /* Allocate dynamic per-cpu area. */ 1203 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE); 1204 dpcpu_init((void *)dpcpu, 0); 1205 1206 /* Allocate stacks for all modes */ 1207 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU); 1208 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU); 1209 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU ); 1210 kernelstack = pmap_preboot_get_vpages(kstack_pages * MAXCPU); 1211 1212 /* Allocate message buffer. */ 1213 msgbufp = (void *)pmap_preboot_get_vpages( 1214 round_page(msgbufsize) / PAGE_SIZE); 1215 1216 /* 1217 * Pages were allocated during the secondary bootstrap for the 1218 * stacks for different CPU modes. 1219 * We must now set the r13 registers in the different CPU modes to 1220 * point to these stacks. 1221 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1222 * of the stack memory. 1223 */ 1224 set_stackptrs(0); 1225 mutex_init(); 1226 1227 /* Establish static device mappings. */ 1228 err_devmap = platform_devmap_init(); 1229 devmap_bootstrap(0, NULL); 1230 vm_max_kernel_address = platform_lastaddr(); 1231 1232 /* 1233 * Only after the SOC registers block is mapped we can perform device 1234 * tree fixups, as they may attempt to read parameters from hardware. 1235 */ 1236 OF_interpret("perform-fixup", 0); 1237 platform_gpio_init(); 1238 cninit(); 1239 1240 /* 1241 * If we made a mapping for EARLY_PRINTF after pmap_bootstrap_prepare(), 1242 * undo it now that the normal console printf works. 1243 */ 1244 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE 1245 pmap_kremove(SOCDEV_VA); 1246 #endif 1247 1248 debugf("initarm: console initialized\n"); 1249 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1250 debugf(" boothowto = 0x%08x\n", boothowto); 1251 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1252 debugf(" lastaddr1: 0x%08x\n", lastaddr); 1253 arm_print_kenv(); 1254 1255 env = kern_getenv("kernelname"); 1256 if (env != NULL) 1257 strlcpy(kernelname, env, sizeof(kernelname)); 1258 1259 if (err_devmap != 0) 1260 printf("WARNING: could not fully configure devmap, error=%d\n", 1261 err_devmap); 1262 1263 platform_late_init(); 1264 1265 /* 1266 * We must now clean the cache again.... 1267 * Cleaning may be done by reading new data to displace any 1268 * dirty data in the cache. This will have happened in cpu_setttb() 1269 * but since we are boot strapping the addresses used for the read 1270 * may have just been remapped and thus the cache could be out 1271 * of sync. A re-clean after the switch will cure this. 1272 * After booting there are no gross relocations of the kernel thus 1273 * this problem will not occur after initarm(). 1274 */ 1275 /* Set stack for exception handlers */ 1276 undefined_init(); 1277 init_proc0(kernelstack); 1278 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1279 enable_interrupts(PSR_A); 1280 pmap_bootstrap(0); 1281 1282 /* Exclude the kernel (and all the things we allocated which immediately 1283 * follow the kernel) from the VM allocation pool but not from crash 1284 * dumps. virtual_avail is a global variable which tracks the kva we've 1285 * "allocated" while setting up pmaps. 1286 * 1287 * Prepare the list of physical memory available to the vm subsystem. 1288 */ 1289 arm_physmem_exclude_region(abp->abp_physaddr, 1290 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC); 1291 arm_physmem_init_kernel_globals(); 1292 1293 init_param2(physmem); 1294 /* Init message buffer. */ 1295 msgbufinit(msgbufp, msgbufsize); 1296 dbg_monitor_init(); 1297 arm_kdb_init(); 1298 /* Apply possible BP hardening. */ 1299 cpuinfo_init_bp_hardening(); 1300 return ((void *)STACKALIGN(thread0.td_pcb)); 1301 1302 } 1303 1304 #endif /* __ARM_ARCH < 6 */ 1305 #endif /* FDT */ 1306