1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */ 2 3 /*- 4 * SPDX-License-Identifier: BSD-4-Clause 5 * 6 * Copyright (c) 2004 Olivier Houchard 7 * Copyright (c) 1994-1998 Mark Brinicombe. 8 * Copyright (c) 1994 Brini. 9 * All rights reserved. 10 * 11 * This code is derived from software written for Brini by Mark Brinicombe 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by Mark Brinicombe 24 * for the NetBSD Project. 25 * 4. The name of the company nor the name of the author may be used to 26 * endorse or promote products derived from this software without specific 27 * prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 31 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 32 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * Machine dependent functions for kernel setup 42 * 43 * Created : 17/09/94 44 * Updated : 18/04/01 updated for new wscons 45 */ 46 47 #include "opt_ddb.h" 48 #include "opt_kstack_pages.h" 49 #include "opt_platform.h" 50 #include "opt_sched.h" 51 #include "opt_timer.h" 52 53 #include <sys/cdefs.h> 54 __FBSDID("$FreeBSD$"); 55 56 #include <sys/param.h> 57 #include <sys/buf.h> 58 #include <sys/bus.h> 59 #include <sys/cons.h> 60 #include <sys/cpu.h> 61 #include <sys/devmap.h> 62 #include <sys/efi.h> 63 #include <sys/imgact.h> 64 #include <sys/kdb.h> 65 #include <sys/kernel.h> 66 #include <sys/linker.h> 67 #include <sys/msgbuf.h> 68 #include <sys/reboot.h> 69 #include <sys/rwlock.h> 70 #include <sys/sched.h> 71 #include <sys/syscallsubr.h> 72 #include <sys/sysent.h> 73 #include <sys/sysproto.h> 74 #include <sys/vmmeter.h> 75 76 #include <vm/vm_object.h> 77 #include <vm/vm_page.h> 78 #include <vm/vm_pager.h> 79 80 #include <machine/debug_monitor.h> 81 #include <machine/machdep.h> 82 #include <machine/metadata.h> 83 #include <machine/pcb.h> 84 #include <machine/physmem.h> 85 #include <machine/platform.h> 86 #include <machine/sysarch.h> 87 #include <machine/undefined.h> 88 #include <machine/vfp.h> 89 #include <machine/vmparam.h> 90 91 #ifdef FDT 92 #include <dev/fdt/fdt_common.h> 93 #include <machine/ofw_machdep.h> 94 #endif 95 96 #ifdef DEBUG 97 #define debugf(fmt, args...) printf(fmt, ##args) 98 #else 99 #define debugf(fmt, args...) 100 #endif 101 102 #if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \ 103 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \ 104 defined(COMPAT_FREEBSD9) 105 #error FreeBSD/arm doesn't provide compatibility with releases prior to 10 106 #endif 107 108 #if __ARM_ARCH >= 6 && !defined(INTRNG) 109 #error armv6 requires INTRNG 110 #endif 111 112 struct pcpu __pcpu[MAXCPU]; 113 struct pcpu *pcpup = &__pcpu[0]; 114 115 static struct trapframe proc0_tf; 116 uint32_t cpu_reset_address = 0; 117 int cold = 1; 118 vm_offset_t vector_page; 119 120 int (*_arm_memcpy)(void *, void *, int, int) = NULL; 121 int (*_arm_bzero)(void *, int, int) = NULL; 122 int _min_memcpy_size = 0; 123 int _min_bzero_size = 0; 124 125 extern int *end; 126 127 #ifdef FDT 128 vm_paddr_t pmap_pa; 129 #if __ARM_ARCH >= 6 130 vm_offset_t systempage; 131 vm_offset_t irqstack; 132 vm_offset_t undstack; 133 vm_offset_t abtstack; 134 #else 135 /* 136 * This is the number of L2 page tables required for covering max 137 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 138 * stacks etc.), uprounded to be divisible by 4. 139 */ 140 #define KERNEL_PT_MAX 78 141 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 142 struct pv_addr systempage; 143 static struct pv_addr msgbufpv; 144 struct pv_addr irqstack; 145 struct pv_addr undstack; 146 struct pv_addr abtstack; 147 static struct pv_addr kernelstack; 148 #endif /* __ARM_ARCH >= 6 */ 149 #endif /* FDT */ 150 151 #ifdef PLATFORM 152 static delay_func *delay_impl; 153 static void *delay_arg; 154 #endif 155 156 struct kva_md_info kmi; 157 158 /* 159 * arm32_vector_init: 160 * 161 * Initialize the vector page, and select whether or not to 162 * relocate the vectors. 163 * 164 * NOTE: We expect the vector page to be mapped at its expected 165 * destination. 166 */ 167 168 extern unsigned int page0[], page0_data[]; 169 void 170 arm_vector_init(vm_offset_t va, int which) 171 { 172 unsigned int *vectors = (int *) va; 173 unsigned int *vectors_data = vectors + (page0_data - page0); 174 int vec; 175 176 /* 177 * Loop through the vectors we're taking over, and copy the 178 * vector's insn and data word. 179 */ 180 for (vec = 0; vec < ARM_NVEC; vec++) { 181 if ((which & (1 << vec)) == 0) { 182 /* Don't want to take over this vector. */ 183 continue; 184 } 185 vectors[vec] = page0[vec]; 186 vectors_data[vec] = page0_data[vec]; 187 } 188 189 /* Now sync the vectors. */ 190 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int)); 191 192 vector_page = va; 193 #if __ARM_ARCH < 6 194 if (va == ARM_VECTORS_HIGH) { 195 /* 196 * Enable high vectors in the system control reg (SCTLR). 197 * 198 * Assume the MD caller knows what it's doing here, and really 199 * does want the vector page relocated. 200 * 201 * Note: This has to be done here (and not just in 202 * cpu_setup()) because the vector page needs to be 203 * accessible *before* cpu_startup() is called. 204 * Think ddb(9) ... 205 */ 206 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 207 } 208 #endif 209 } 210 211 static void 212 cpu_startup(void *dummy) 213 { 214 struct pcb *pcb = thread0.td_pcb; 215 const unsigned int mbyte = 1024 * 1024; 216 #if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE) 217 vm_page_t m; 218 #endif 219 220 identify_arm_cpu(); 221 222 vm_ksubmap_init(&kmi); 223 224 /* 225 * Display the RAM layout. 226 */ 227 printf("real memory = %ju (%ju MB)\n", 228 (uintmax_t)arm32_ptob(realmem), 229 (uintmax_t)arm32_ptob(realmem) / mbyte); 230 printf("avail memory = %ju (%ju MB)\n", 231 (uintmax_t)arm32_ptob(vm_free_count()), 232 (uintmax_t)arm32_ptob(vm_free_count()) / mbyte); 233 if (bootverbose) { 234 arm_physmem_print_tables(); 235 devmap_print_table(); 236 } 237 238 bufinit(); 239 vm_pager_bufferinit(); 240 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack + 241 USPACE_SVC_STACK_TOP; 242 pmap_set_pcb_pagedir(kernel_pmap, pcb); 243 #if __ARM_ARCH < 6 244 vector_page_setprot(VM_PROT_READ); 245 pmap_postinit(); 246 #ifdef ARM_CACHE_LOCK_ENABLE 247 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS); 248 arm_lock_cache_line(ARM_TP_ADDRESS); 249 #else 250 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO); 251 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m)); 252 #endif 253 *(uint32_t *)ARM_RAS_START = 0; 254 *(uint32_t *)ARM_RAS_END = 0xffffffff; 255 #endif 256 } 257 258 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 259 260 /* 261 * Flush the D-cache for non-DMA I/O so that the I-cache can 262 * be made coherent later. 263 */ 264 void 265 cpu_flush_dcache(void *ptr, size_t len) 266 { 267 268 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len); 269 } 270 271 /* Get current clock frequency for the given cpu id. */ 272 int 273 cpu_est_clockrate(int cpu_id, uint64_t *rate) 274 { 275 276 return (ENXIO); 277 } 278 279 void 280 cpu_idle(int busy) 281 { 282 283 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu); 284 spinlock_enter(); 285 #ifndef NO_EVENTTIMERS 286 if (!busy) 287 cpu_idleclock(); 288 #endif 289 if (!sched_runnable()) 290 cpu_sleep(0); 291 #ifndef NO_EVENTTIMERS 292 if (!busy) 293 cpu_activeclock(); 294 #endif 295 spinlock_exit(); 296 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu); 297 } 298 299 int 300 cpu_idle_wakeup(int cpu) 301 { 302 303 return (0); 304 } 305 306 #ifdef NO_EVENTTIMERS 307 /* 308 * Most ARM platforms don't need to do anything special to init their clocks 309 * (they get intialized during normal device attachment), and by not defining a 310 * cpu_initclocks() function they get this generic one. Any platform that needs 311 * to do something special can just provide their own implementation, which will 312 * override this one due to the weak linkage. 313 */ 314 void 315 arm_generic_initclocks(void) 316 { 317 } 318 __weak_reference(arm_generic_initclocks, cpu_initclocks); 319 320 #else 321 void 322 cpu_initclocks(void) 323 { 324 325 #ifdef SMP 326 if (PCPU_GET(cpuid) == 0) 327 cpu_initclocks_bsp(); 328 else 329 cpu_initclocks_ap(); 330 #else 331 cpu_initclocks_bsp(); 332 #endif 333 } 334 #endif 335 336 #ifdef PLATFORM 337 void 338 arm_set_delay(delay_func *impl, void *arg) 339 { 340 341 KASSERT(impl != NULL, ("No DELAY implementation")); 342 delay_impl = impl; 343 delay_arg = arg; 344 } 345 346 void 347 DELAY(int usec) 348 { 349 350 TSENTER(); 351 delay_impl(usec, delay_arg); 352 TSEXIT(); 353 } 354 #endif 355 356 void 357 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 358 { 359 } 360 361 void 362 spinlock_enter(void) 363 { 364 struct thread *td; 365 register_t cspr; 366 367 td = curthread; 368 if (td->td_md.md_spinlock_count == 0) { 369 cspr = disable_interrupts(PSR_I | PSR_F); 370 td->td_md.md_spinlock_count = 1; 371 td->td_md.md_saved_cspr = cspr; 372 } else 373 td->td_md.md_spinlock_count++; 374 critical_enter(); 375 } 376 377 void 378 spinlock_exit(void) 379 { 380 struct thread *td; 381 register_t cspr; 382 383 td = curthread; 384 critical_exit(); 385 cspr = td->td_md.md_saved_cspr; 386 td->td_md.md_spinlock_count--; 387 if (td->td_md.md_spinlock_count == 0) 388 restore_interrupts(cspr); 389 } 390 391 /* 392 * Clear registers on exec 393 */ 394 void 395 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 396 { 397 struct trapframe *tf = td->td_frame; 398 399 memset(tf, 0, sizeof(*tf)); 400 tf->tf_usr_sp = stack; 401 tf->tf_usr_lr = imgp->entry_addr; 402 tf->tf_svc_lr = 0x77777777; 403 tf->tf_pc = imgp->entry_addr; 404 tf->tf_spsr = PSR_USR32_MODE; 405 } 406 407 408 #ifdef VFP 409 /* 410 * Get machine VFP context. 411 */ 412 void 413 get_vfpcontext(struct thread *td, mcontext_vfp_t *vfp) 414 { 415 struct pcb *pcb; 416 417 pcb = td->td_pcb; 418 if (td == curthread) { 419 critical_enter(); 420 vfp_store(&pcb->pcb_vfpstate, false); 421 critical_exit(); 422 } else 423 MPASS(TD_IS_SUSPENDED(td)); 424 memcpy(vfp->mcv_reg, pcb->pcb_vfpstate.reg, 425 sizeof(vfp->mcv_reg)); 426 vfp->mcv_fpscr = pcb->pcb_vfpstate.fpscr; 427 } 428 429 /* 430 * Set machine VFP context. 431 */ 432 void 433 set_vfpcontext(struct thread *td, mcontext_vfp_t *vfp) 434 { 435 struct pcb *pcb; 436 437 pcb = td->td_pcb; 438 if (td == curthread) { 439 critical_enter(); 440 vfp_discard(td); 441 critical_exit(); 442 } else 443 MPASS(TD_IS_SUSPENDED(td)); 444 memcpy(pcb->pcb_vfpstate.reg, vfp->mcv_reg, 445 sizeof(pcb->pcb_vfpstate.reg)); 446 pcb->pcb_vfpstate.fpscr = vfp->mcv_fpscr; 447 } 448 #endif 449 450 int 451 arm_get_vfpstate(struct thread *td, void *args) 452 { 453 int rv; 454 struct arm_get_vfpstate_args ua; 455 mcontext_vfp_t mcontext_vfp; 456 457 rv = copyin(args, &ua, sizeof(ua)); 458 if (rv != 0) 459 return (rv); 460 if (ua.mc_vfp_size != sizeof(mcontext_vfp_t)) 461 return (EINVAL); 462 #ifdef VFP 463 get_vfpcontext(td, &mcontext_vfp); 464 #else 465 bzero(&mcontext_vfp, sizeof(mcontext_vfp)); 466 #endif 467 468 rv = copyout(&mcontext_vfp, ua.mc_vfp, sizeof(mcontext_vfp)); 469 if (rv != 0) 470 return (rv); 471 return (0); 472 } 473 474 /* 475 * Get machine context. 476 */ 477 int 478 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 479 { 480 struct trapframe *tf = td->td_frame; 481 __greg_t *gr = mcp->__gregs; 482 483 if (clear_ret & GET_MC_CLEAR_RET) { 484 gr[_REG_R0] = 0; 485 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C; 486 } else { 487 gr[_REG_R0] = tf->tf_r0; 488 gr[_REG_CPSR] = tf->tf_spsr; 489 } 490 gr[_REG_R1] = tf->tf_r1; 491 gr[_REG_R2] = tf->tf_r2; 492 gr[_REG_R3] = tf->tf_r3; 493 gr[_REG_R4] = tf->tf_r4; 494 gr[_REG_R5] = tf->tf_r5; 495 gr[_REG_R6] = tf->tf_r6; 496 gr[_REG_R7] = tf->tf_r7; 497 gr[_REG_R8] = tf->tf_r8; 498 gr[_REG_R9] = tf->tf_r9; 499 gr[_REG_R10] = tf->tf_r10; 500 gr[_REG_R11] = tf->tf_r11; 501 gr[_REG_R12] = tf->tf_r12; 502 gr[_REG_SP] = tf->tf_usr_sp; 503 gr[_REG_LR] = tf->tf_usr_lr; 504 gr[_REG_PC] = tf->tf_pc; 505 506 mcp->mc_vfp_size = 0; 507 mcp->mc_vfp_ptr = NULL; 508 memset(&mcp->mc_spare, 0, sizeof(mcp->mc_spare)); 509 510 return (0); 511 } 512 513 /* 514 * Set machine context. 515 * 516 * However, we don't set any but the user modifiable flags, and we won't 517 * touch the cs selector. 518 */ 519 int 520 set_mcontext(struct thread *td, mcontext_t *mcp) 521 { 522 mcontext_vfp_t mc_vfp, *vfp; 523 struct trapframe *tf = td->td_frame; 524 const __greg_t *gr = mcp->__gregs; 525 int spsr; 526 527 /* 528 * Make sure the processor mode has not been tampered with and 529 * interrupts have not been disabled. 530 */ 531 spsr = gr[_REG_CPSR]; 532 if ((spsr & PSR_MODE) != PSR_USR32_MODE || 533 (spsr & (PSR_I | PSR_F)) != 0) 534 return (EINVAL); 535 536 #ifdef WITNESS 537 if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(mc_vfp)) { 538 printf("%s: %s: Malformed mc_vfp_size: %d (0x%08X)\n", 539 td->td_proc->p_comm, __func__, 540 mcp->mc_vfp_size, mcp->mc_vfp_size); 541 } else if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr == NULL) { 542 printf("%s: %s: c_vfp_size != 0 but mc_vfp_ptr == NULL\n", 543 td->td_proc->p_comm, __func__); 544 } 545 #endif 546 547 if (mcp->mc_vfp_size == sizeof(mc_vfp) && mcp->mc_vfp_ptr != NULL) { 548 if (copyin(mcp->mc_vfp_ptr, &mc_vfp, sizeof(mc_vfp)) != 0) 549 return (EFAULT); 550 vfp = &mc_vfp; 551 } else { 552 vfp = NULL; 553 } 554 555 tf->tf_r0 = gr[_REG_R0]; 556 tf->tf_r1 = gr[_REG_R1]; 557 tf->tf_r2 = gr[_REG_R2]; 558 tf->tf_r3 = gr[_REG_R3]; 559 tf->tf_r4 = gr[_REG_R4]; 560 tf->tf_r5 = gr[_REG_R5]; 561 tf->tf_r6 = gr[_REG_R6]; 562 tf->tf_r7 = gr[_REG_R7]; 563 tf->tf_r8 = gr[_REG_R8]; 564 tf->tf_r9 = gr[_REG_R9]; 565 tf->tf_r10 = gr[_REG_R10]; 566 tf->tf_r11 = gr[_REG_R11]; 567 tf->tf_r12 = gr[_REG_R12]; 568 tf->tf_usr_sp = gr[_REG_SP]; 569 tf->tf_usr_lr = gr[_REG_LR]; 570 tf->tf_pc = gr[_REG_PC]; 571 tf->tf_spsr = gr[_REG_CPSR]; 572 #ifdef VFP 573 if (vfp != NULL) 574 set_vfpcontext(td, vfp); 575 #endif 576 return (0); 577 } 578 579 void 580 sendsig(catcher, ksi, mask) 581 sig_t catcher; 582 ksiginfo_t *ksi; 583 sigset_t *mask; 584 { 585 struct thread *td; 586 struct proc *p; 587 struct trapframe *tf; 588 struct sigframe *fp, frame; 589 struct sigacts *psp; 590 struct sysentvec *sysent; 591 int onstack; 592 int sig; 593 int code; 594 595 td = curthread; 596 p = td->td_proc; 597 PROC_LOCK_ASSERT(p, MA_OWNED); 598 sig = ksi->ksi_signo; 599 code = ksi->ksi_code; 600 psp = p->p_sigacts; 601 mtx_assert(&psp->ps_mtx, MA_OWNED); 602 tf = td->td_frame; 603 onstack = sigonstack(tf->tf_usr_sp); 604 605 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 606 catcher, sig); 607 608 /* Allocate and validate space for the signal handler context. */ 609 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) && 610 SIGISMEMBER(psp->ps_sigonstack, sig)) { 611 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp + 612 td->td_sigstk.ss_size); 613 #if defined(COMPAT_43) 614 td->td_sigstk.ss_flags |= SS_ONSTACK; 615 #endif 616 } else 617 fp = (struct sigframe *)td->td_frame->tf_usr_sp; 618 619 /* make room on the stack */ 620 fp--; 621 622 /* make the stack aligned */ 623 fp = (struct sigframe *)STACKALIGN(fp); 624 /* Populate the siginfo frame. */ 625 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0); 626 #ifdef VFP 627 get_vfpcontext(td, &frame.sf_vfp); 628 frame.sf_uc.uc_mcontext.mc_vfp_size = sizeof(fp->sf_vfp); 629 frame.sf_uc.uc_mcontext.mc_vfp_ptr = &fp->sf_vfp; 630 #else 631 frame.sf_uc.uc_mcontext.mc_vfp_size = 0; 632 frame.sf_uc.uc_mcontext.mc_vfp_ptr = NULL; 633 #endif 634 frame.sf_si = ksi->ksi_info; 635 frame.sf_uc.uc_sigmask = *mask; 636 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK ) 637 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE; 638 frame.sf_uc.uc_stack = td->td_sigstk; 639 mtx_unlock(&psp->ps_mtx); 640 PROC_UNLOCK(td->td_proc); 641 642 /* Copy the sigframe out to the user's stack. */ 643 if (copyout(&frame, fp, sizeof(*fp)) != 0) { 644 /* Process has trashed its stack. Kill it. */ 645 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp); 646 PROC_LOCK(p); 647 sigexit(td, SIGILL); 648 } 649 650 /* 651 * Build context to run handler in. We invoke the handler 652 * directly, only returning via the trampoline. Note the 653 * trampoline version numbers are coordinated with machine- 654 * dependent code in libc. 655 */ 656 657 tf->tf_r0 = sig; 658 tf->tf_r1 = (register_t)&fp->sf_si; 659 tf->tf_r2 = (register_t)&fp->sf_uc; 660 661 /* the trampoline uses r5 as the uc address */ 662 tf->tf_r5 = (register_t)&fp->sf_uc; 663 tf->tf_pc = (register_t)catcher; 664 tf->tf_usr_sp = (register_t)fp; 665 sysent = p->p_sysent; 666 if (sysent->sv_sigcode_base != 0) 667 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base; 668 else 669 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings - 670 *(sysent->sv_szsigcode)); 671 /* Set the mode to enter in the signal handler */ 672 #if __ARM_ARCH >= 7 673 if ((register_t)catcher & 1) 674 tf->tf_spsr |= PSR_T; 675 else 676 tf->tf_spsr &= ~PSR_T; 677 #endif 678 679 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr, 680 tf->tf_usr_sp); 681 682 PROC_LOCK(p); 683 mtx_lock(&psp->ps_mtx); 684 } 685 686 int 687 sys_sigreturn(td, uap) 688 struct thread *td; 689 struct sigreturn_args /* { 690 const struct __ucontext *sigcntxp; 691 } */ *uap; 692 { 693 ucontext_t uc; 694 int error; 695 696 if (uap == NULL) 697 return (EFAULT); 698 if (copyin(uap->sigcntxp, &uc, sizeof(uc))) 699 return (EFAULT); 700 /* Restore register context. */ 701 error = set_mcontext(td, &uc.uc_mcontext); 702 if (error != 0) 703 return (error); 704 705 /* Restore signal mask. */ 706 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 707 708 return (EJUSTRETURN); 709 } 710 711 /* 712 * Construct a PCB from a trapframe. This is called from kdb_trap() where 713 * we want to start a backtrace from the function that caused us to enter 714 * the debugger. We have the context in the trapframe, but base the trace 715 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 716 * enough for a backtrace. 717 */ 718 void 719 makectx(struct trapframe *tf, struct pcb *pcb) 720 { 721 pcb->pcb_regs.sf_r4 = tf->tf_r4; 722 pcb->pcb_regs.sf_r5 = tf->tf_r5; 723 pcb->pcb_regs.sf_r6 = tf->tf_r6; 724 pcb->pcb_regs.sf_r7 = tf->tf_r7; 725 pcb->pcb_regs.sf_r8 = tf->tf_r8; 726 pcb->pcb_regs.sf_r9 = tf->tf_r9; 727 pcb->pcb_regs.sf_r10 = tf->tf_r10; 728 pcb->pcb_regs.sf_r11 = tf->tf_r11; 729 pcb->pcb_regs.sf_r12 = tf->tf_r12; 730 pcb->pcb_regs.sf_pc = tf->tf_pc; 731 pcb->pcb_regs.sf_lr = tf->tf_usr_lr; 732 pcb->pcb_regs.sf_sp = tf->tf_usr_sp; 733 } 734 735 void 736 pcpu0_init(void) 737 { 738 #if __ARM_ARCH >= 6 739 set_curthread(&thread0); 740 #endif 741 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 742 PCPU_SET(curthread, &thread0); 743 } 744 745 /* 746 * Initialize proc0 747 */ 748 void 749 init_proc0(vm_offset_t kstack) 750 { 751 proc_linkup0(&proc0, &thread0); 752 thread0.td_kstack = kstack; 753 thread0.td_pcb = (struct pcb *) 754 (thread0.td_kstack + kstack_pages * PAGE_SIZE) - 1; 755 thread0.td_pcb->pcb_flags = 0; 756 thread0.td_pcb->pcb_vfpcpu = -1; 757 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN; 758 thread0.td_frame = &proc0_tf; 759 pcpup->pc_curpcb = thread0.td_pcb; 760 } 761 762 #if __ARM_ARCH >= 6 763 void 764 set_stackptrs(int cpu) 765 { 766 767 set_stackptr(PSR_IRQ32_MODE, 768 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 769 set_stackptr(PSR_ABT32_MODE, 770 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 771 set_stackptr(PSR_UND32_MODE, 772 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 773 } 774 #else 775 void 776 set_stackptrs(int cpu) 777 { 778 779 set_stackptr(PSR_IRQ32_MODE, 780 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 781 set_stackptr(PSR_ABT32_MODE, 782 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 783 set_stackptr(PSR_UND32_MODE, 784 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 785 } 786 #endif 787 788 static void 789 arm_kdb_init(void) 790 { 791 792 kdb_init(); 793 #ifdef KDB 794 if (boothowto & RB_KDB) 795 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); 796 #endif 797 } 798 799 #ifdef FDT 800 #if __ARM_ARCH < 6 801 void * 802 initarm(struct arm_boot_params *abp) 803 { 804 struct mem_region mem_regions[FDT_MEM_REGIONS]; 805 struct pv_addr kernel_l1pt; 806 struct pv_addr dpcpu; 807 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 808 uint64_t memsize; 809 uint32_t l2size; 810 char *env; 811 void *kmdp; 812 u_int l1pagetable; 813 int i, j, err_devmap, mem_regions_sz; 814 815 lastaddr = parse_boot_param(abp); 816 arm_physmem_kernaddr = abp->abp_physaddr; 817 818 memsize = 0; 819 820 cpuinfo_init(); 821 set_cpufuncs(); 822 823 /* 824 * Find the dtb passed in by the boot loader. 825 */ 826 kmdp = preload_search_by_type("elf kernel"); 827 if (kmdp != NULL) 828 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 829 else 830 dtbp = (vm_offset_t)NULL; 831 832 #if defined(FDT_DTB_STATIC) 833 /* 834 * In case the device tree blob was not retrieved (from metadata) try 835 * to use the statically embedded one. 836 */ 837 if (dtbp == (vm_offset_t)NULL) 838 dtbp = (vm_offset_t)&fdt_static_dtb; 839 #endif 840 841 if (OF_install(OFW_FDT, 0) == FALSE) 842 panic("Cannot install FDT"); 843 844 if (OF_init((void *)dtbp) != 0) 845 panic("OF_init failed with the found device tree"); 846 847 /* Grab physical memory regions information from device tree. */ 848 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0) 849 panic("Cannot get physical memory regions"); 850 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 851 852 /* Grab reserved memory regions information from device tree. */ 853 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 854 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 855 EXFLAG_NODUMP | EXFLAG_NOALLOC); 856 857 /* Platform-specific initialisation */ 858 platform_probe_and_attach(); 859 860 pcpu0_init(); 861 862 /* Do basic tuning, hz etc */ 863 init_param1(); 864 865 /* Calculate number of L2 tables needed for mapping vm_page_array */ 866 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 867 l2size = (l2size >> L1_S_SHIFT) + 1; 868 869 /* 870 * Add one table for end of kernel map, one for stacks, msgbuf and 871 * L1 and L2 tables map, one for vectors map and two for 872 * l2 structures from pmap_bootstrap. 873 */ 874 l2size += 5; 875 876 /* Make it divisible by 4 */ 877 l2size = (l2size + 3) & ~3; 878 879 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 880 881 /* Define a macro to simplify memory allocation */ 882 #define valloc_pages(var, np) \ 883 alloc_pages((var).pv_va, (np)); \ 884 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR); 885 886 #define alloc_pages(var, np) \ 887 (var) = freemempos; \ 888 freemempos += (np * PAGE_SIZE); \ 889 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 890 891 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 892 freemempos += PAGE_SIZE; 893 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 894 895 for (i = 0, j = 0; i < l2size; ++i) { 896 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 897 valloc_pages(kernel_pt_table[i], 898 L2_TABLE_SIZE / PAGE_SIZE); 899 j = i; 900 } else { 901 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 902 L2_TABLE_SIZE_REAL * (i - j); 903 kernel_pt_table[i].pv_pa = 904 kernel_pt_table[i].pv_va - KERNVIRTADDR + 905 abp->abp_physaddr; 906 907 } 908 } 909 /* 910 * Allocate a page for the system page mapped to 0x00000000 911 * or 0xffff0000. This page will just contain the system vectors 912 * and can be shared by all processes. 913 */ 914 valloc_pages(systempage, 1); 915 916 /* Allocate dynamic per-cpu area. */ 917 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 918 dpcpu_init((void *)dpcpu.pv_va, 0); 919 920 /* Allocate stacks for all modes */ 921 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU); 922 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU); 923 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU); 924 valloc_pages(kernelstack, kstack_pages * MAXCPU); 925 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 926 927 /* 928 * Now we start construction of the L1 page table 929 * We start by mapping the L2 page tables into the L1. 930 * This means that we can replace L1 mappings later on if necessary 931 */ 932 l1pagetable = kernel_l1pt.pv_va; 933 934 /* 935 * Try to map as much as possible of kernel text and data using 936 * 1MB section mapping and for the rest of initial kernel address 937 * space use L2 coarse tables. 938 * 939 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 940 * and kernel structures 941 */ 942 l2_start = lastaddr & ~(L1_S_OFFSET); 943 for (i = 0 ; i < l2size - 1; i++) 944 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 945 &kernel_pt_table[i]); 946 947 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 948 949 /* Map kernel code and data */ 950 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr, 951 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 952 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 953 954 /* Map L1 directory and allocated L2 page tables */ 955 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 956 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 957 958 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 959 kernel_pt_table[0].pv_pa, 960 L2_TABLE_SIZE_REAL * l2size, 961 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 962 963 /* Map allocated DPCPU, stacks and msgbuf */ 964 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 965 freemempos - dpcpu.pv_va, 966 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 967 968 /* Link and map the vector page */ 969 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 970 &kernel_pt_table[l2size - 1]); 971 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 972 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE); 973 974 /* Establish static device mappings. */ 975 err_devmap = platform_devmap_init(); 976 devmap_bootstrap(l1pagetable, NULL); 977 vm_max_kernel_address = platform_lastaddr(); 978 979 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT); 980 pmap_pa = kernel_l1pt.pv_pa; 981 cpu_setttb(kernel_l1pt.pv_pa); 982 cpu_tlb_flushID(); 983 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 984 985 /* 986 * Now that proper page tables are installed, call cpu_setup() to enable 987 * instruction and data caches and other chip-specific features. 988 */ 989 cpu_setup(); 990 991 /* 992 * Only after the SOC registers block is mapped we can perform device 993 * tree fixups, as they may attempt to read parameters from hardware. 994 */ 995 OF_interpret("perform-fixup", 0); 996 997 platform_gpio_init(); 998 999 cninit(); 1000 1001 debugf("initarm: console initialized\n"); 1002 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1003 debugf(" boothowto = 0x%08x\n", boothowto); 1004 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1005 arm_print_kenv(); 1006 1007 env = kern_getenv("kernelname"); 1008 if (env != NULL) { 1009 strlcpy(kernelname, env, sizeof(kernelname)); 1010 freeenv(env); 1011 } 1012 1013 if (err_devmap != 0) 1014 printf("WARNING: could not fully configure devmap, error=%d\n", 1015 err_devmap); 1016 1017 platform_late_init(); 1018 1019 /* 1020 * Pages were allocated during the secondary bootstrap for the 1021 * stacks for different CPU modes. 1022 * We must now set the r13 registers in the different CPU modes to 1023 * point to these stacks. 1024 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1025 * of the stack memory. 1026 */ 1027 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 1028 1029 set_stackptrs(0); 1030 1031 /* 1032 * We must now clean the cache again.... 1033 * Cleaning may be done by reading new data to displace any 1034 * dirty data in the cache. This will have happened in cpu_setttb() 1035 * but since we are boot strapping the addresses used for the read 1036 * may have just been remapped and thus the cache could be out 1037 * of sync. A re-clean after the switch will cure this. 1038 * After booting there are no gross relocations of the kernel thus 1039 * this problem will not occur after initarm(). 1040 */ 1041 cpu_idcache_wbinv_all(); 1042 1043 undefined_init(); 1044 1045 init_proc0(kernelstack.pv_va); 1046 1047 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1048 pmap_bootstrap(freemempos, &kernel_l1pt); 1049 msgbufp = (void *)msgbufpv.pv_va; 1050 msgbufinit(msgbufp, msgbufsize); 1051 mutex_init(); 1052 1053 /* 1054 * Exclude the kernel (and all the things we allocated which immediately 1055 * follow the kernel) from the VM allocation pool but not from crash 1056 * dumps. virtual_avail is a global variable which tracks the kva we've 1057 * "allocated" while setting up pmaps. 1058 * 1059 * Prepare the list of physical memory available to the vm subsystem. 1060 */ 1061 arm_physmem_exclude_region(abp->abp_physaddr, 1062 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC); 1063 arm_physmem_init_kernel_globals(); 1064 1065 init_param2(physmem); 1066 dbg_monitor_init(); 1067 arm_kdb_init(); 1068 1069 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 1070 sizeof(struct pcb))); 1071 } 1072 #else /* __ARM_ARCH < 6 */ 1073 void * 1074 initarm(struct arm_boot_params *abp) 1075 { 1076 struct mem_region mem_regions[FDT_MEM_REGIONS]; 1077 vm_paddr_t lastaddr; 1078 vm_offset_t dtbp, kernelstack, dpcpu; 1079 char *env; 1080 void *kmdp; 1081 int err_devmap, mem_regions_sz; 1082 #ifdef EFI 1083 struct efi_map_header *efihdr; 1084 #endif 1085 1086 /* get last allocated physical address */ 1087 arm_physmem_kernaddr = abp->abp_physaddr; 1088 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr; 1089 1090 set_cpufuncs(); 1091 cpuinfo_init(); 1092 1093 /* 1094 * Find the dtb passed in by the boot loader. 1095 */ 1096 kmdp = preload_search_by_type("elf kernel"); 1097 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 1098 #if defined(FDT_DTB_STATIC) 1099 /* 1100 * In case the device tree blob was not retrieved (from metadata) try 1101 * to use the statically embedded one. 1102 */ 1103 if (dtbp == (vm_offset_t)NULL) 1104 dtbp = (vm_offset_t)&fdt_static_dtb; 1105 #endif 1106 1107 if (OF_install(OFW_FDT, 0) == FALSE) 1108 panic("Cannot install FDT"); 1109 1110 if (OF_init((void *)dtbp) != 0) 1111 panic("OF_init failed with the found device tree"); 1112 1113 #if defined(LINUX_BOOT_ABI) 1114 arm_parse_fdt_bootargs(); 1115 #endif 1116 1117 #ifdef EFI 1118 efihdr = (struct efi_map_header *)preload_search_info(kmdp, 1119 MODINFO_METADATA | MODINFOMD_EFI_MAP); 1120 if (efihdr != NULL) { 1121 arm_add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz); 1122 } else 1123 #endif 1124 { 1125 /* Grab physical memory regions information from device tree. */ 1126 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0) 1127 panic("Cannot get physical memory regions"); 1128 } 1129 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 1130 1131 /* Grab reserved memory regions information from device tree. */ 1132 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 1133 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 1134 EXFLAG_NODUMP | EXFLAG_NOALLOC); 1135 1136 /* 1137 * Set TEX remapping registers. 1138 * Setup kernel page tables and switch to kernel L1 page table. 1139 */ 1140 pmap_set_tex(); 1141 pmap_bootstrap_prepare(lastaddr); 1142 1143 /* 1144 * If EARLY_PRINTF support is enabled, we need to re-establish the 1145 * mapping after pmap_bootstrap_prepare() switches to new page tables. 1146 * Note that we can only do the remapping if the VA is outside the 1147 * kernel, now that we have real virtual (not VA=PA) mappings in effect. 1148 * Early printf does not work between the time pmap_set_tex() does 1149 * cp15_prrr_set() and this code remaps the VA. 1150 */ 1151 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE 1152 pmap_preboot_map_attr(SOCDEV_PA, SOCDEV_VA, 1024 * 1024, 1153 VM_PROT_READ | VM_PROT_WRITE, VM_MEMATTR_DEVICE); 1154 #endif 1155 1156 /* 1157 * Now that proper page tables are installed, call cpu_setup() to enable 1158 * instruction and data caches and other chip-specific features. 1159 */ 1160 cpu_setup(); 1161 1162 /* Platform-specific initialisation */ 1163 platform_probe_and_attach(); 1164 pcpu0_init(); 1165 1166 /* Do basic tuning, hz etc */ 1167 init_param1(); 1168 1169 /* 1170 * Allocate a page for the system page mapped to 0xffff0000 1171 * This page will just contain the system vectors and can be 1172 * shared by all processes. 1173 */ 1174 systempage = pmap_preboot_get_pages(1); 1175 1176 /* Map the vector page. */ 1177 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1); 1178 if (virtual_end >= ARM_VECTORS_HIGH) 1179 virtual_end = ARM_VECTORS_HIGH - 1; 1180 1181 /* Allocate dynamic per-cpu area. */ 1182 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE); 1183 dpcpu_init((void *)dpcpu, 0); 1184 1185 /* Allocate stacks for all modes */ 1186 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU); 1187 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU); 1188 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU ); 1189 kernelstack = pmap_preboot_get_vpages(kstack_pages * MAXCPU); 1190 1191 /* Allocate message buffer. */ 1192 msgbufp = (void *)pmap_preboot_get_vpages( 1193 round_page(msgbufsize) / PAGE_SIZE); 1194 1195 /* 1196 * Pages were allocated during the secondary bootstrap for the 1197 * stacks for different CPU modes. 1198 * We must now set the r13 registers in the different CPU modes to 1199 * point to these stacks. 1200 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1201 * of the stack memory. 1202 */ 1203 set_stackptrs(0); 1204 mutex_init(); 1205 1206 /* Establish static device mappings. */ 1207 err_devmap = platform_devmap_init(); 1208 devmap_bootstrap(0, NULL); 1209 vm_max_kernel_address = platform_lastaddr(); 1210 1211 /* 1212 * Only after the SOC registers block is mapped we can perform device 1213 * tree fixups, as they may attempt to read parameters from hardware. 1214 */ 1215 OF_interpret("perform-fixup", 0); 1216 platform_gpio_init(); 1217 cninit(); 1218 1219 /* 1220 * If we made a mapping for EARLY_PRINTF after pmap_bootstrap_prepare(), 1221 * undo it now that the normal console printf works. 1222 */ 1223 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE 1224 pmap_kremove(SOCDEV_VA); 1225 #endif 1226 1227 debugf("initarm: console initialized\n"); 1228 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1229 debugf(" boothowto = 0x%08x\n", boothowto); 1230 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1231 debugf(" lastaddr1: 0x%08x\n", lastaddr); 1232 arm_print_kenv(); 1233 1234 env = kern_getenv("kernelname"); 1235 if (env != NULL) 1236 strlcpy(kernelname, env, sizeof(kernelname)); 1237 1238 if (err_devmap != 0) 1239 printf("WARNING: could not fully configure devmap, error=%d\n", 1240 err_devmap); 1241 1242 platform_late_init(); 1243 1244 /* 1245 * We must now clean the cache again.... 1246 * Cleaning may be done by reading new data to displace any 1247 * dirty data in the cache. This will have happened in cpu_setttb() 1248 * but since we are boot strapping the addresses used for the read 1249 * may have just been remapped and thus the cache could be out 1250 * of sync. A re-clean after the switch will cure this. 1251 * After booting there are no gross relocations of the kernel thus 1252 * this problem will not occur after initarm(). 1253 */ 1254 /* Set stack for exception handlers */ 1255 undefined_init(); 1256 init_proc0(kernelstack); 1257 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1258 enable_interrupts(PSR_A); 1259 pmap_bootstrap(0); 1260 1261 /* Exclude the kernel (and all the things we allocated which immediately 1262 * follow the kernel) from the VM allocation pool but not from crash 1263 * dumps. virtual_avail is a global variable which tracks the kva we've 1264 * "allocated" while setting up pmaps. 1265 * 1266 * Prepare the list of physical memory available to the vm subsystem. 1267 */ 1268 arm_physmem_exclude_region(abp->abp_physaddr, 1269 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC); 1270 arm_physmem_init_kernel_globals(); 1271 1272 init_param2(physmem); 1273 /* Init message buffer. */ 1274 msgbufinit(msgbufp, msgbufsize); 1275 dbg_monitor_init(); 1276 arm_kdb_init(); 1277 /* Apply possible BP hardening. */ 1278 cpuinfo_init_bp_hardening(); 1279 return ((void *)STACKALIGN(thread0.td_pcb)); 1280 1281 } 1282 1283 #endif /* __ARM_ARCH < 6 */ 1284 #endif /* FDT */ 1285