1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */ 2 3 /*- 4 * SPDX-License-Identifier: BSD-4-Clause 5 * 6 * Copyright (c) 2004 Olivier Houchard 7 * Copyright (c) 1994-1998 Mark Brinicombe. 8 * Copyright (c) 1994 Brini. 9 * All rights reserved. 10 * 11 * This code is derived from software written for Brini by Mark Brinicombe 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by Mark Brinicombe 24 * for the NetBSD Project. 25 * 4. The name of the company nor the name of the author may be used to 26 * endorse or promote products derived from this software without specific 27 * prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 31 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 32 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * Machine dependent functions for kernel setup 42 * 43 * Created : 17/09/94 44 * Updated : 18/04/01 updated for new wscons 45 */ 46 47 #include "opt_ddb.h" 48 #include "opt_kstack_pages.h" 49 #include "opt_platform.h" 50 #include "opt_sched.h" 51 #include "opt_timer.h" 52 53 #include <sys/cdefs.h> 54 __FBSDID("$FreeBSD$"); 55 56 #include <sys/param.h> 57 #include <sys/buf.h> 58 #include <sys/bus.h> 59 #include <sys/cons.h> 60 #include <sys/cpu.h> 61 #include <sys/devmap.h> 62 #include <sys/efi.h> 63 #include <sys/imgact.h> 64 #include <sys/kdb.h> 65 #include <sys/kernel.h> 66 #include <sys/ktr.h> 67 #include <sys/linker.h> 68 #include <sys/msgbuf.h> 69 #include <sys/physmem.h> 70 #include <sys/reboot.h> 71 #include <sys/rwlock.h> 72 #include <sys/sched.h> 73 #include <sys/syscallsubr.h> 74 #include <sys/sysent.h> 75 #include <sys/sysproto.h> 76 #include <sys/vmmeter.h> 77 78 #include <vm/vm_object.h> 79 #include <vm/vm_page.h> 80 #include <vm/vm_pager.h> 81 82 #include <machine/asm.h> 83 #include <machine/debug_monitor.h> 84 #include <machine/machdep.h> 85 #include <machine/metadata.h> 86 #include <machine/pcb.h> 87 #include <machine/platform.h> 88 #include <machine/sysarch.h> 89 #include <machine/undefined.h> 90 #include <machine/vfp.h> 91 #include <machine/vmparam.h> 92 93 #ifdef FDT 94 #include <dev/fdt/fdt_common.h> 95 #include <machine/ofw_machdep.h> 96 #endif 97 98 #ifdef DEBUG 99 #define debugf(fmt, args...) printf(fmt, ##args) 100 #else 101 #define debugf(fmt, args...) 102 #endif 103 104 #if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \ 105 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \ 106 defined(COMPAT_FREEBSD9) 107 #error FreeBSD/arm doesn't provide compatibility with releases prior to 10 108 #endif 109 110 #if __ARM_ARCH >= 6 && !defined(INTRNG) 111 #error armv6 requires INTRNG 112 #endif 113 114 #ifndef _ARM_ARCH_5E 115 #error FreeBSD requires ARMv5 or later 116 #endif 117 118 struct pcpu __pcpu[MAXCPU]; 119 struct pcpu *pcpup = &__pcpu[0]; 120 121 static struct trapframe proc0_tf; 122 uint32_t cpu_reset_address = 0; 123 int cold = 1; 124 vm_offset_t vector_page; 125 126 /* The address at which the kernel was loaded. Set early in initarm(). */ 127 vm_paddr_t arm_physmem_kernaddr; 128 129 int (*_arm_memcpy)(void *, void *, int, int) = NULL; 130 int (*_arm_bzero)(void *, int, int) = NULL; 131 int _min_memcpy_size = 0; 132 int _min_bzero_size = 0; 133 134 extern int *end; 135 136 #ifdef FDT 137 vm_paddr_t pmap_pa; 138 #if __ARM_ARCH >= 6 139 vm_offset_t systempage; 140 vm_offset_t irqstack; 141 vm_offset_t undstack; 142 vm_offset_t abtstack; 143 #else 144 /* 145 * This is the number of L2 page tables required for covering max 146 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 147 * stacks etc.), uprounded to be divisible by 4. 148 */ 149 #define KERNEL_PT_MAX 78 150 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 151 struct pv_addr systempage; 152 static struct pv_addr msgbufpv; 153 struct pv_addr irqstack; 154 struct pv_addr undstack; 155 struct pv_addr abtstack; 156 static struct pv_addr kernelstack; 157 #endif /* __ARM_ARCH >= 6 */ 158 #endif /* FDT */ 159 160 #ifdef PLATFORM 161 static delay_func *delay_impl; 162 static void *delay_arg; 163 #endif 164 165 struct kva_md_info kmi; 166 /* 167 * arm32_vector_init: 168 * 169 * Initialize the vector page, and select whether or not to 170 * relocate the vectors. 171 * 172 * NOTE: We expect the vector page to be mapped at its expected 173 * destination. 174 */ 175 176 extern unsigned int page0[], page0_data[]; 177 void 178 arm_vector_init(vm_offset_t va, int which) 179 { 180 unsigned int *vectors = (int *) va; 181 unsigned int *vectors_data = vectors + (page0_data - page0); 182 int vec; 183 184 /* 185 * Loop through the vectors we're taking over, and copy the 186 * vector's insn and data word. 187 */ 188 for (vec = 0; vec < ARM_NVEC; vec++) { 189 if ((which & (1 << vec)) == 0) { 190 /* Don't want to take over this vector. */ 191 continue; 192 } 193 vectors[vec] = page0[vec]; 194 vectors_data[vec] = page0_data[vec]; 195 } 196 197 /* Now sync the vectors. */ 198 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int)); 199 200 vector_page = va; 201 #if __ARM_ARCH < 6 202 if (va == ARM_VECTORS_HIGH) { 203 /* 204 * Enable high vectors in the system control reg (SCTLR). 205 * 206 * Assume the MD caller knows what it's doing here, and really 207 * does want the vector page relocated. 208 * 209 * Note: This has to be done here (and not just in 210 * cpu_setup()) because the vector page needs to be 211 * accessible *before* cpu_startup() is called. 212 * Think ddb(9) ... 213 */ 214 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 215 } 216 #endif 217 } 218 219 static void 220 cpu_startup(void *dummy) 221 { 222 struct pcb *pcb = thread0.td_pcb; 223 const unsigned int mbyte = 1024 * 1024; 224 #if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE) 225 vm_page_t m; 226 #endif 227 228 identify_arm_cpu(); 229 230 vm_ksubmap_init(&kmi); 231 232 /* 233 * Display the RAM layout. 234 */ 235 printf("real memory = %ju (%ju MB)\n", 236 (uintmax_t)arm32_ptob(realmem), 237 (uintmax_t)arm32_ptob(realmem) / mbyte); 238 printf("avail memory = %ju (%ju MB)\n", 239 (uintmax_t)arm32_ptob(vm_free_count()), 240 (uintmax_t)arm32_ptob(vm_free_count()) / mbyte); 241 if (bootverbose) { 242 physmem_print_tables(); 243 devmap_print_table(); 244 } 245 246 bufinit(); 247 vm_pager_bufferinit(); 248 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack + 249 USPACE_SVC_STACK_TOP; 250 pmap_set_pcb_pagedir(kernel_pmap, pcb); 251 #if __ARM_ARCH < 6 252 vector_page_setprot(VM_PROT_READ); 253 pmap_postinit(); 254 #ifdef ARM_CACHE_LOCK_ENABLE 255 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS); 256 arm_lock_cache_line(ARM_TP_ADDRESS); 257 #else 258 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO); 259 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m)); 260 #endif 261 *(uint32_t *)ARM_RAS_START = 0; 262 *(uint32_t *)ARM_RAS_END = 0xffffffff; 263 #endif 264 } 265 266 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 267 268 /* 269 * Flush the D-cache for non-DMA I/O so that the I-cache can 270 * be made coherent later. 271 */ 272 void 273 cpu_flush_dcache(void *ptr, size_t len) 274 { 275 276 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len); 277 } 278 279 /* Get current clock frequency for the given cpu id. */ 280 int 281 cpu_est_clockrate(int cpu_id, uint64_t *rate) 282 { 283 #if __ARM_ARCH >= 6 284 struct pcpu *pc; 285 286 pc = pcpu_find(cpu_id); 287 if (pc == NULL || rate == NULL) 288 return (EINVAL); 289 290 if (pc->pc_clock == 0) 291 return (EOPNOTSUPP); 292 293 *rate = pc->pc_clock; 294 295 return (0); 296 #else 297 return (ENXIO); 298 #endif 299 } 300 301 void 302 cpu_idle(int busy) 303 { 304 305 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu); 306 spinlock_enter(); 307 #ifndef NO_EVENTTIMERS 308 if (!busy) 309 cpu_idleclock(); 310 #endif 311 if (!sched_runnable()) 312 cpu_sleep(0); 313 #ifndef NO_EVENTTIMERS 314 if (!busy) 315 cpu_activeclock(); 316 #endif 317 spinlock_exit(); 318 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu); 319 } 320 321 int 322 cpu_idle_wakeup(int cpu) 323 { 324 325 return (0); 326 } 327 328 #ifdef NO_EVENTTIMERS 329 /* 330 * Most ARM platforms don't need to do anything special to init their clocks 331 * (they get intialized during normal device attachment), and by not defining a 332 * cpu_initclocks() function they get this generic one. Any platform that needs 333 * to do something special can just provide their own implementation, which will 334 * override this one due to the weak linkage. 335 */ 336 void 337 arm_generic_initclocks(void) 338 { 339 } 340 __weak_reference(arm_generic_initclocks, cpu_initclocks); 341 342 #else 343 void 344 cpu_initclocks(void) 345 { 346 347 #ifdef SMP 348 if (PCPU_GET(cpuid) == 0) 349 cpu_initclocks_bsp(); 350 else 351 cpu_initclocks_ap(); 352 #else 353 cpu_initclocks_bsp(); 354 #endif 355 } 356 #endif 357 358 #ifdef PLATFORM 359 void 360 arm_set_delay(delay_func *impl, void *arg) 361 { 362 363 KASSERT(impl != NULL, ("No DELAY implementation")); 364 delay_impl = impl; 365 delay_arg = arg; 366 } 367 368 void 369 DELAY(int usec) 370 { 371 372 TSENTER(); 373 delay_impl(usec, delay_arg); 374 TSEXIT(); 375 } 376 #endif 377 378 void 379 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 380 { 381 } 382 383 void 384 spinlock_enter(void) 385 { 386 struct thread *td; 387 register_t cspr; 388 389 td = curthread; 390 if (td->td_md.md_spinlock_count == 0) { 391 cspr = disable_interrupts(PSR_I | PSR_F); 392 td->td_md.md_spinlock_count = 1; 393 td->td_md.md_saved_cspr = cspr; 394 critical_enter(); 395 } else 396 td->td_md.md_spinlock_count++; 397 } 398 399 void 400 spinlock_exit(void) 401 { 402 struct thread *td; 403 register_t cspr; 404 405 td = curthread; 406 cspr = td->td_md.md_saved_cspr; 407 td->td_md.md_spinlock_count--; 408 if (td->td_md.md_spinlock_count == 0) { 409 critical_exit(); 410 restore_interrupts(cspr); 411 } 412 } 413 414 /* 415 * Clear registers on exec 416 */ 417 void 418 exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack) 419 { 420 struct trapframe *tf = td->td_frame; 421 422 memset(tf, 0, sizeof(*tf)); 423 tf->tf_usr_sp = stack; 424 tf->tf_usr_lr = imgp->entry_addr; 425 tf->tf_svc_lr = 0x77777777; 426 tf->tf_pc = imgp->entry_addr; 427 tf->tf_spsr = PSR_USR32_MODE; 428 } 429 430 431 #ifdef VFP 432 /* 433 * Get machine VFP context. 434 */ 435 void 436 get_vfpcontext(struct thread *td, mcontext_vfp_t *vfp) 437 { 438 struct pcb *pcb; 439 440 pcb = td->td_pcb; 441 if (td == curthread) { 442 critical_enter(); 443 vfp_store(&pcb->pcb_vfpstate, false); 444 critical_exit(); 445 } else 446 MPASS(TD_IS_SUSPENDED(td)); 447 memcpy(vfp->mcv_reg, pcb->pcb_vfpstate.reg, 448 sizeof(vfp->mcv_reg)); 449 vfp->mcv_fpscr = pcb->pcb_vfpstate.fpscr; 450 } 451 452 /* 453 * Set machine VFP context. 454 */ 455 void 456 set_vfpcontext(struct thread *td, mcontext_vfp_t *vfp) 457 { 458 struct pcb *pcb; 459 460 pcb = td->td_pcb; 461 if (td == curthread) { 462 critical_enter(); 463 vfp_discard(td); 464 critical_exit(); 465 } else 466 MPASS(TD_IS_SUSPENDED(td)); 467 memcpy(pcb->pcb_vfpstate.reg, vfp->mcv_reg, 468 sizeof(pcb->pcb_vfpstate.reg)); 469 pcb->pcb_vfpstate.fpscr = vfp->mcv_fpscr; 470 } 471 #endif 472 473 int 474 arm_get_vfpstate(struct thread *td, void *args) 475 { 476 int rv; 477 struct arm_get_vfpstate_args ua; 478 mcontext_vfp_t mcontext_vfp; 479 480 rv = copyin(args, &ua, sizeof(ua)); 481 if (rv != 0) 482 return (rv); 483 if (ua.mc_vfp_size != sizeof(mcontext_vfp_t)) 484 return (EINVAL); 485 #ifdef VFP 486 get_vfpcontext(td, &mcontext_vfp); 487 #else 488 bzero(&mcontext_vfp, sizeof(mcontext_vfp)); 489 #endif 490 491 rv = copyout(&mcontext_vfp, ua.mc_vfp, sizeof(mcontext_vfp)); 492 if (rv != 0) 493 return (rv); 494 return (0); 495 } 496 497 /* 498 * Get machine context. 499 */ 500 int 501 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 502 { 503 struct trapframe *tf = td->td_frame; 504 __greg_t *gr = mcp->__gregs; 505 506 if (clear_ret & GET_MC_CLEAR_RET) { 507 gr[_REG_R0] = 0; 508 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C; 509 } else { 510 gr[_REG_R0] = tf->tf_r0; 511 gr[_REG_CPSR] = tf->tf_spsr; 512 } 513 gr[_REG_R1] = tf->tf_r1; 514 gr[_REG_R2] = tf->tf_r2; 515 gr[_REG_R3] = tf->tf_r3; 516 gr[_REG_R4] = tf->tf_r4; 517 gr[_REG_R5] = tf->tf_r5; 518 gr[_REG_R6] = tf->tf_r6; 519 gr[_REG_R7] = tf->tf_r7; 520 gr[_REG_R8] = tf->tf_r8; 521 gr[_REG_R9] = tf->tf_r9; 522 gr[_REG_R10] = tf->tf_r10; 523 gr[_REG_R11] = tf->tf_r11; 524 gr[_REG_R12] = tf->tf_r12; 525 gr[_REG_SP] = tf->tf_usr_sp; 526 gr[_REG_LR] = tf->tf_usr_lr; 527 gr[_REG_PC] = tf->tf_pc; 528 529 mcp->mc_vfp_size = 0; 530 mcp->mc_vfp_ptr = NULL; 531 memset(&mcp->mc_spare, 0, sizeof(mcp->mc_spare)); 532 533 return (0); 534 } 535 536 /* 537 * Set machine context. 538 * 539 * However, we don't set any but the user modifiable flags, and we won't 540 * touch the cs selector. 541 */ 542 int 543 set_mcontext(struct thread *td, mcontext_t *mcp) 544 { 545 mcontext_vfp_t mc_vfp, *vfp; 546 struct trapframe *tf = td->td_frame; 547 const __greg_t *gr = mcp->__gregs; 548 int spsr; 549 550 /* 551 * Make sure the processor mode has not been tampered with and 552 * interrupts have not been disabled. 553 */ 554 spsr = gr[_REG_CPSR]; 555 if ((spsr & PSR_MODE) != PSR_USR32_MODE || 556 (spsr & (PSR_I | PSR_F)) != 0) 557 return (EINVAL); 558 559 #ifdef WITNESS 560 if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(mc_vfp)) { 561 printf("%s: %s: Malformed mc_vfp_size: %d (0x%08X)\n", 562 td->td_proc->p_comm, __func__, 563 mcp->mc_vfp_size, mcp->mc_vfp_size); 564 } else if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr == NULL) { 565 printf("%s: %s: c_vfp_size != 0 but mc_vfp_ptr == NULL\n", 566 td->td_proc->p_comm, __func__); 567 } 568 #endif 569 570 if (mcp->mc_vfp_size == sizeof(mc_vfp) && mcp->mc_vfp_ptr != NULL) { 571 if (copyin(mcp->mc_vfp_ptr, &mc_vfp, sizeof(mc_vfp)) != 0) 572 return (EFAULT); 573 vfp = &mc_vfp; 574 } else { 575 vfp = NULL; 576 } 577 578 tf->tf_r0 = gr[_REG_R0]; 579 tf->tf_r1 = gr[_REG_R1]; 580 tf->tf_r2 = gr[_REG_R2]; 581 tf->tf_r3 = gr[_REG_R3]; 582 tf->tf_r4 = gr[_REG_R4]; 583 tf->tf_r5 = gr[_REG_R5]; 584 tf->tf_r6 = gr[_REG_R6]; 585 tf->tf_r7 = gr[_REG_R7]; 586 tf->tf_r8 = gr[_REG_R8]; 587 tf->tf_r9 = gr[_REG_R9]; 588 tf->tf_r10 = gr[_REG_R10]; 589 tf->tf_r11 = gr[_REG_R11]; 590 tf->tf_r12 = gr[_REG_R12]; 591 tf->tf_usr_sp = gr[_REG_SP]; 592 tf->tf_usr_lr = gr[_REG_LR]; 593 tf->tf_pc = gr[_REG_PC]; 594 tf->tf_spsr = gr[_REG_CPSR]; 595 #ifdef VFP 596 if (vfp != NULL) 597 set_vfpcontext(td, vfp); 598 #endif 599 return (0); 600 } 601 602 void 603 sendsig(catcher, ksi, mask) 604 sig_t catcher; 605 ksiginfo_t *ksi; 606 sigset_t *mask; 607 { 608 struct thread *td; 609 struct proc *p; 610 struct trapframe *tf; 611 struct sigframe *fp, frame; 612 struct sigacts *psp; 613 struct sysentvec *sysent; 614 int onstack; 615 int sig; 616 int code; 617 618 td = curthread; 619 p = td->td_proc; 620 PROC_LOCK_ASSERT(p, MA_OWNED); 621 sig = ksi->ksi_signo; 622 code = ksi->ksi_code; 623 psp = p->p_sigacts; 624 mtx_assert(&psp->ps_mtx, MA_OWNED); 625 tf = td->td_frame; 626 onstack = sigonstack(tf->tf_usr_sp); 627 628 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 629 catcher, sig); 630 631 /* Allocate and validate space for the signal handler context. */ 632 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) && 633 SIGISMEMBER(psp->ps_sigonstack, sig)) { 634 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp + 635 td->td_sigstk.ss_size); 636 #if defined(COMPAT_43) 637 td->td_sigstk.ss_flags |= SS_ONSTACK; 638 #endif 639 } else 640 fp = (struct sigframe *)td->td_frame->tf_usr_sp; 641 642 /* make room on the stack */ 643 fp--; 644 645 /* make the stack aligned */ 646 fp = (struct sigframe *)STACKALIGN(fp); 647 /* Populate the siginfo frame. */ 648 bzero(&frame, sizeof(frame)); 649 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0); 650 #ifdef VFP 651 get_vfpcontext(td, &frame.sf_vfp); 652 frame.sf_uc.uc_mcontext.mc_vfp_size = sizeof(fp->sf_vfp); 653 frame.sf_uc.uc_mcontext.mc_vfp_ptr = &fp->sf_vfp; 654 #else 655 frame.sf_uc.uc_mcontext.mc_vfp_size = 0; 656 frame.sf_uc.uc_mcontext.mc_vfp_ptr = NULL; 657 #endif 658 frame.sf_si = ksi->ksi_info; 659 frame.sf_uc.uc_sigmask = *mask; 660 frame.sf_uc.uc_stack = td->td_sigstk; 661 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) != 0 ? 662 (onstack ? SS_ONSTACK : 0) : SS_DISABLE; 663 mtx_unlock(&psp->ps_mtx); 664 PROC_UNLOCK(td->td_proc); 665 666 /* Copy the sigframe out to the user's stack. */ 667 if (copyout(&frame, fp, sizeof(*fp)) != 0) { 668 /* Process has trashed its stack. Kill it. */ 669 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp); 670 PROC_LOCK(p); 671 sigexit(td, SIGILL); 672 } 673 674 /* 675 * Build context to run handler in. We invoke the handler 676 * directly, only returning via the trampoline. Note the 677 * trampoline version numbers are coordinated with machine- 678 * dependent code in libc. 679 */ 680 681 tf->tf_r0 = sig; 682 tf->tf_r1 = (register_t)&fp->sf_si; 683 tf->tf_r2 = (register_t)&fp->sf_uc; 684 685 /* the trampoline uses r5 as the uc address */ 686 tf->tf_r5 = (register_t)&fp->sf_uc; 687 tf->tf_pc = (register_t)catcher; 688 tf->tf_usr_sp = (register_t)fp; 689 sysent = p->p_sysent; 690 if (sysent->sv_sigcode_base != 0) 691 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base; 692 else 693 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings - 694 *(sysent->sv_szsigcode)); 695 /* Set the mode to enter in the signal handler */ 696 #if __ARM_ARCH >= 7 697 if ((register_t)catcher & 1) 698 tf->tf_spsr |= PSR_T; 699 else 700 tf->tf_spsr &= ~PSR_T; 701 #endif 702 703 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr, 704 tf->tf_usr_sp); 705 706 PROC_LOCK(p); 707 mtx_lock(&psp->ps_mtx); 708 } 709 710 int 711 sys_sigreturn(td, uap) 712 struct thread *td; 713 struct sigreturn_args /* { 714 const struct __ucontext *sigcntxp; 715 } */ *uap; 716 { 717 ucontext_t uc; 718 int error; 719 720 if (uap == NULL) 721 return (EFAULT); 722 if (copyin(uap->sigcntxp, &uc, sizeof(uc))) 723 return (EFAULT); 724 /* Restore register context. */ 725 error = set_mcontext(td, &uc.uc_mcontext); 726 if (error != 0) 727 return (error); 728 729 /* Restore signal mask. */ 730 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 731 732 return (EJUSTRETURN); 733 } 734 735 /* 736 * Construct a PCB from a trapframe. This is called from kdb_trap() where 737 * we want to start a backtrace from the function that caused us to enter 738 * the debugger. We have the context in the trapframe, but base the trace 739 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 740 * enough for a backtrace. 741 */ 742 void 743 makectx(struct trapframe *tf, struct pcb *pcb) 744 { 745 pcb->pcb_regs.sf_r4 = tf->tf_r4; 746 pcb->pcb_regs.sf_r5 = tf->tf_r5; 747 pcb->pcb_regs.sf_r6 = tf->tf_r6; 748 pcb->pcb_regs.sf_r7 = tf->tf_r7; 749 pcb->pcb_regs.sf_r8 = tf->tf_r8; 750 pcb->pcb_regs.sf_r9 = tf->tf_r9; 751 pcb->pcb_regs.sf_r10 = tf->tf_r10; 752 pcb->pcb_regs.sf_r11 = tf->tf_r11; 753 pcb->pcb_regs.sf_r12 = tf->tf_r12; 754 pcb->pcb_regs.sf_pc = tf->tf_pc; 755 pcb->pcb_regs.sf_lr = tf->tf_usr_lr; 756 pcb->pcb_regs.sf_sp = tf->tf_usr_sp; 757 } 758 759 void 760 pcpu0_init(void) 761 { 762 #if __ARM_ARCH >= 6 763 set_curthread(&thread0); 764 #endif 765 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 766 PCPU_SET(curthread, &thread0); 767 } 768 769 /* 770 * Initialize proc0 771 */ 772 void 773 init_proc0(vm_offset_t kstack) 774 { 775 proc_linkup0(&proc0, &thread0); 776 thread0.td_kstack = kstack; 777 thread0.td_kstack_pages = kstack_pages; 778 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + 779 thread0.td_kstack_pages * PAGE_SIZE) - 1; 780 thread0.td_pcb->pcb_flags = 0; 781 thread0.td_pcb->pcb_vfpcpu = -1; 782 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN; 783 thread0.td_frame = &proc0_tf; 784 pcpup->pc_curpcb = thread0.td_pcb; 785 } 786 787 #if __ARM_ARCH >= 6 788 void 789 set_stackptrs(int cpu) 790 { 791 792 set_stackptr(PSR_IRQ32_MODE, 793 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 794 set_stackptr(PSR_ABT32_MODE, 795 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 796 set_stackptr(PSR_UND32_MODE, 797 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 798 } 799 #else 800 void 801 set_stackptrs(int cpu) 802 { 803 804 set_stackptr(PSR_IRQ32_MODE, 805 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 806 set_stackptr(PSR_ABT32_MODE, 807 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 808 set_stackptr(PSR_UND32_MODE, 809 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 810 } 811 #endif 812 813 static void 814 arm_kdb_init(void) 815 { 816 817 kdb_init(); 818 #ifdef KDB 819 if (boothowto & RB_KDB) 820 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); 821 #endif 822 } 823 824 #ifdef FDT 825 #if __ARM_ARCH < 6 826 void * 827 initarm(struct arm_boot_params *abp) 828 { 829 struct mem_region mem_regions[FDT_MEM_REGIONS]; 830 struct pv_addr kernel_l1pt; 831 struct pv_addr dpcpu; 832 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 833 uint64_t memsize; 834 uint32_t l2size; 835 char *env; 836 void *kmdp; 837 u_int l1pagetable; 838 int i, j, err_devmap, mem_regions_sz; 839 840 lastaddr = parse_boot_param(abp); 841 arm_physmem_kernaddr = abp->abp_physaddr; 842 843 memsize = 0; 844 845 cpuinfo_init(); 846 set_cpufuncs(); 847 848 /* 849 * Find the dtb passed in by the boot loader. 850 */ 851 kmdp = preload_search_by_type("elf kernel"); 852 if (kmdp != NULL) 853 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 854 else 855 dtbp = (vm_offset_t)NULL; 856 857 #if defined(FDT_DTB_STATIC) 858 /* 859 * In case the device tree blob was not retrieved (from metadata) try 860 * to use the statically embedded one. 861 */ 862 if (dtbp == (vm_offset_t)NULL) 863 dtbp = (vm_offset_t)&fdt_static_dtb; 864 #endif 865 866 if (OF_install(OFW_FDT, 0) == FALSE) 867 panic("Cannot install FDT"); 868 869 if (OF_init((void *)dtbp) != 0) 870 panic("OF_init failed with the found device tree"); 871 872 /* Grab physical memory regions information from device tree. */ 873 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0) 874 panic("Cannot get physical memory regions"); 875 physmem_hardware_regions(mem_regions, mem_regions_sz); 876 877 /* Grab reserved memory regions information from device tree. */ 878 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 879 physmem_exclude_regions(mem_regions, mem_regions_sz, 880 EXFLAG_NODUMP | EXFLAG_NOALLOC); 881 882 /* Platform-specific initialisation */ 883 platform_probe_and_attach(); 884 885 pcpu0_init(); 886 887 /* Do basic tuning, hz etc */ 888 init_param1(); 889 890 /* Calculate number of L2 tables needed for mapping vm_page_array */ 891 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 892 l2size = (l2size >> L1_S_SHIFT) + 1; 893 894 /* 895 * Add one table for end of kernel map, one for stacks, msgbuf and 896 * L1 and L2 tables map, one for vectors map and two for 897 * l2 structures from pmap_bootstrap. 898 */ 899 l2size += 5; 900 901 /* Make it divisible by 4 */ 902 l2size = (l2size + 3) & ~3; 903 904 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 905 906 /* Define a macro to simplify memory allocation */ 907 #define valloc_pages(var, np) \ 908 alloc_pages((var).pv_va, (np)); \ 909 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR); 910 911 #define alloc_pages(var, np) \ 912 (var) = freemempos; \ 913 freemempos += (np * PAGE_SIZE); \ 914 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 915 916 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 917 freemempos += PAGE_SIZE; 918 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 919 920 for (i = 0, j = 0; i < l2size; ++i) { 921 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 922 valloc_pages(kernel_pt_table[i], 923 L2_TABLE_SIZE / PAGE_SIZE); 924 j = i; 925 } else { 926 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 927 L2_TABLE_SIZE_REAL * (i - j); 928 kernel_pt_table[i].pv_pa = 929 kernel_pt_table[i].pv_va - KERNVIRTADDR + 930 abp->abp_physaddr; 931 932 } 933 } 934 /* 935 * Allocate a page for the system page mapped to 0x00000000 936 * or 0xffff0000. This page will just contain the system vectors 937 * and can be shared by all processes. 938 */ 939 valloc_pages(systempage, 1); 940 941 /* Allocate dynamic per-cpu area. */ 942 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 943 dpcpu_init((void *)dpcpu.pv_va, 0); 944 945 /* Allocate stacks for all modes */ 946 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU); 947 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU); 948 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU); 949 valloc_pages(kernelstack, kstack_pages); 950 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 951 952 /* 953 * Now we start construction of the L1 page table 954 * We start by mapping the L2 page tables into the L1. 955 * This means that we can replace L1 mappings later on if necessary 956 */ 957 l1pagetable = kernel_l1pt.pv_va; 958 959 /* 960 * Try to map as much as possible of kernel text and data using 961 * 1MB section mapping and for the rest of initial kernel address 962 * space use L2 coarse tables. 963 * 964 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 965 * and kernel structures 966 */ 967 l2_start = lastaddr & ~(L1_S_OFFSET); 968 for (i = 0 ; i < l2size - 1; i++) 969 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 970 &kernel_pt_table[i]); 971 972 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 973 974 /* Map kernel code and data */ 975 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr, 976 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 977 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 978 979 /* Map L1 directory and allocated L2 page tables */ 980 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 981 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 982 983 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 984 kernel_pt_table[0].pv_pa, 985 L2_TABLE_SIZE_REAL * l2size, 986 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 987 988 /* Map allocated DPCPU, stacks and msgbuf */ 989 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 990 freemempos - dpcpu.pv_va, 991 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 992 993 /* Link and map the vector page */ 994 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 995 &kernel_pt_table[l2size - 1]); 996 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 997 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE); 998 999 /* Establish static device mappings. */ 1000 err_devmap = platform_devmap_init(); 1001 devmap_bootstrap(l1pagetable, NULL); 1002 vm_max_kernel_address = platform_lastaddr(); 1003 1004 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT); 1005 pmap_pa = kernel_l1pt.pv_pa; 1006 cpu_setttb(kernel_l1pt.pv_pa); 1007 cpu_tlb_flushID(); 1008 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 1009 1010 /* 1011 * Now that proper page tables are installed, call cpu_setup() to enable 1012 * instruction and data caches and other chip-specific features. 1013 */ 1014 cpu_setup(); 1015 1016 /* 1017 * Only after the SOC registers block is mapped we can perform device 1018 * tree fixups, as they may attempt to read parameters from hardware. 1019 */ 1020 OF_interpret("perform-fixup", 0); 1021 1022 platform_gpio_init(); 1023 1024 cninit(); 1025 1026 debugf("initarm: console initialized\n"); 1027 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1028 debugf(" boothowto = 0x%08x\n", boothowto); 1029 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1030 arm_print_kenv(); 1031 1032 env = kern_getenv("kernelname"); 1033 if (env != NULL) { 1034 strlcpy(kernelname, env, sizeof(kernelname)); 1035 freeenv(env); 1036 } 1037 1038 if (err_devmap != 0) 1039 printf("WARNING: could not fully configure devmap, error=%d\n", 1040 err_devmap); 1041 1042 platform_late_init(); 1043 1044 /* 1045 * Pages were allocated during the secondary bootstrap for the 1046 * stacks for different CPU modes. 1047 * We must now set the r13 registers in the different CPU modes to 1048 * point to these stacks. 1049 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1050 * of the stack memory. 1051 */ 1052 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 1053 1054 set_stackptrs(0); 1055 1056 /* 1057 * We must now clean the cache again.... 1058 * Cleaning may be done by reading new data to displace any 1059 * dirty data in the cache. This will have happened in cpu_setttb() 1060 * but since we are boot strapping the addresses used for the read 1061 * may have just been remapped and thus the cache could be out 1062 * of sync. A re-clean after the switch will cure this. 1063 * After booting there are no gross relocations of the kernel thus 1064 * this problem will not occur after initarm(). 1065 */ 1066 cpu_idcache_wbinv_all(); 1067 1068 undefined_init(); 1069 1070 init_proc0(kernelstack.pv_va); 1071 1072 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1073 pmap_bootstrap(freemempos, &kernel_l1pt); 1074 msgbufp = (void *)msgbufpv.pv_va; 1075 msgbufinit(msgbufp, msgbufsize); 1076 mutex_init(); 1077 1078 /* 1079 * Exclude the kernel (and all the things we allocated which immediately 1080 * follow the kernel) from the VM allocation pool but not from crash 1081 * dumps. virtual_avail is a global variable which tracks the kva we've 1082 * "allocated" while setting up pmaps. 1083 * 1084 * Prepare the list of physical memory available to the vm subsystem. 1085 */ 1086 physmem_exclude_region(abp->abp_physaddr, 1087 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC); 1088 physmem_init_kernel_globals(); 1089 1090 init_param2(physmem); 1091 dbg_monitor_init(); 1092 arm_kdb_init(); 1093 1094 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 1095 sizeof(struct pcb))); 1096 } 1097 #else /* __ARM_ARCH < 6 */ 1098 void * 1099 initarm(struct arm_boot_params *abp) 1100 { 1101 struct mem_region mem_regions[FDT_MEM_REGIONS]; 1102 vm_paddr_t lastaddr; 1103 vm_offset_t dtbp, kernelstack, dpcpu; 1104 char *env; 1105 void *kmdp; 1106 int err_devmap, mem_regions_sz; 1107 #ifdef EFI 1108 struct efi_map_header *efihdr; 1109 #endif 1110 1111 /* get last allocated physical address */ 1112 arm_physmem_kernaddr = abp->abp_physaddr; 1113 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr; 1114 1115 set_cpufuncs(); 1116 cpuinfo_init(); 1117 1118 /* 1119 * Find the dtb passed in by the boot loader. 1120 */ 1121 kmdp = preload_search_by_type("elf kernel"); 1122 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 1123 #if defined(FDT_DTB_STATIC) 1124 /* 1125 * In case the device tree blob was not retrieved (from metadata) try 1126 * to use the statically embedded one. 1127 */ 1128 if (dtbp == (vm_offset_t)NULL) 1129 dtbp = (vm_offset_t)&fdt_static_dtb; 1130 #endif 1131 1132 if (OF_install(OFW_FDT, 0) == FALSE) 1133 panic("Cannot install FDT"); 1134 1135 if (OF_init((void *)dtbp) != 0) 1136 panic("OF_init failed with the found device tree"); 1137 1138 #if defined(LINUX_BOOT_ABI) 1139 arm_parse_fdt_bootargs(); 1140 #endif 1141 1142 #ifdef EFI 1143 efihdr = (struct efi_map_header *)preload_search_info(kmdp, 1144 MODINFO_METADATA | MODINFOMD_EFI_MAP); 1145 if (efihdr != NULL) { 1146 arm_add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz); 1147 } else 1148 #endif 1149 { 1150 /* Grab physical memory regions information from device tree. */ 1151 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0) 1152 panic("Cannot get physical memory regions"); 1153 } 1154 physmem_hardware_regions(mem_regions, mem_regions_sz); 1155 1156 /* Grab reserved memory regions information from device tree. */ 1157 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 1158 physmem_exclude_regions(mem_regions, mem_regions_sz, 1159 EXFLAG_NODUMP | EXFLAG_NOALLOC); 1160 1161 /* 1162 * Set TEX remapping registers. 1163 * Setup kernel page tables and switch to kernel L1 page table. 1164 */ 1165 pmap_set_tex(); 1166 pmap_bootstrap_prepare(lastaddr); 1167 1168 /* 1169 * If EARLY_PRINTF support is enabled, we need to re-establish the 1170 * mapping after pmap_bootstrap_prepare() switches to new page tables. 1171 * Note that we can only do the remapping if the VA is outside the 1172 * kernel, now that we have real virtual (not VA=PA) mappings in effect. 1173 * Early printf does not work between the time pmap_set_tex() does 1174 * cp15_prrr_set() and this code remaps the VA. 1175 */ 1176 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE 1177 pmap_preboot_map_attr(SOCDEV_PA, SOCDEV_VA, 1024 * 1024, 1178 VM_PROT_READ | VM_PROT_WRITE, VM_MEMATTR_DEVICE); 1179 #endif 1180 1181 /* 1182 * Now that proper page tables are installed, call cpu_setup() to enable 1183 * instruction and data caches and other chip-specific features. 1184 */ 1185 cpu_setup(); 1186 1187 /* Platform-specific initialisation */ 1188 platform_probe_and_attach(); 1189 pcpu0_init(); 1190 1191 /* Do basic tuning, hz etc */ 1192 init_param1(); 1193 1194 /* 1195 * Allocate a page for the system page mapped to 0xffff0000 1196 * This page will just contain the system vectors and can be 1197 * shared by all processes. 1198 */ 1199 systempage = pmap_preboot_get_pages(1); 1200 1201 /* Map the vector page. */ 1202 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1); 1203 if (virtual_end >= ARM_VECTORS_HIGH) 1204 virtual_end = ARM_VECTORS_HIGH - 1; 1205 1206 /* Allocate dynamic per-cpu area. */ 1207 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE); 1208 dpcpu_init((void *)dpcpu, 0); 1209 1210 /* Allocate stacks for all modes */ 1211 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU); 1212 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU); 1213 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU ); 1214 kernelstack = pmap_preboot_get_vpages(kstack_pages); 1215 1216 /* Allocate message buffer. */ 1217 msgbufp = (void *)pmap_preboot_get_vpages( 1218 round_page(msgbufsize) / PAGE_SIZE); 1219 1220 /* 1221 * Pages were allocated during the secondary bootstrap for the 1222 * stacks for different CPU modes. 1223 * We must now set the r13 registers in the different CPU modes to 1224 * point to these stacks. 1225 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1226 * of the stack memory. 1227 */ 1228 set_stackptrs(0); 1229 mutex_init(); 1230 1231 /* Establish static device mappings. */ 1232 err_devmap = platform_devmap_init(); 1233 devmap_bootstrap(0, NULL); 1234 vm_max_kernel_address = platform_lastaddr(); 1235 1236 /* 1237 * Only after the SOC registers block is mapped we can perform device 1238 * tree fixups, as they may attempt to read parameters from hardware. 1239 */ 1240 OF_interpret("perform-fixup", 0); 1241 platform_gpio_init(); 1242 cninit(); 1243 1244 /* 1245 * If we made a mapping for EARLY_PRINTF after pmap_bootstrap_prepare(), 1246 * undo it now that the normal console printf works. 1247 */ 1248 #if defined(EARLY_PRINTF) && defined(SOCDEV_PA) && defined(SOCDEV_VA) && SOCDEV_VA < KERNBASE 1249 pmap_kremove(SOCDEV_VA); 1250 #endif 1251 1252 debugf("initarm: console initialized\n"); 1253 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1254 debugf(" boothowto = 0x%08x\n", boothowto); 1255 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1256 debugf(" lastaddr1: 0x%08x\n", lastaddr); 1257 arm_print_kenv(); 1258 1259 env = kern_getenv("kernelname"); 1260 if (env != NULL) 1261 strlcpy(kernelname, env, sizeof(kernelname)); 1262 1263 if (err_devmap != 0) 1264 printf("WARNING: could not fully configure devmap, error=%d\n", 1265 err_devmap); 1266 1267 platform_late_init(); 1268 1269 /* 1270 * We must now clean the cache again.... 1271 * Cleaning may be done by reading new data to displace any 1272 * dirty data in the cache. This will have happened in cpu_setttb() 1273 * but since we are boot strapping the addresses used for the read 1274 * may have just been remapped and thus the cache could be out 1275 * of sync. A re-clean after the switch will cure this. 1276 * After booting there are no gross relocations of the kernel thus 1277 * this problem will not occur after initarm(). 1278 */ 1279 /* Set stack for exception handlers */ 1280 undefined_init(); 1281 init_proc0(kernelstack); 1282 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1283 enable_interrupts(PSR_A); 1284 pmap_bootstrap(0); 1285 1286 /* Exclude the kernel (and all the things we allocated which immediately 1287 * follow the kernel) from the VM allocation pool but not from crash 1288 * dumps. virtual_avail is a global variable which tracks the kva we've 1289 * "allocated" while setting up pmaps. 1290 * 1291 * Prepare the list of physical memory available to the vm subsystem. 1292 */ 1293 physmem_exclude_region(abp->abp_physaddr, 1294 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC); 1295 physmem_init_kernel_globals(); 1296 1297 init_param2(physmem); 1298 /* Init message buffer. */ 1299 msgbufinit(msgbufp, msgbufsize); 1300 dbg_monitor_init(); 1301 arm_kdb_init(); 1302 /* Apply possible BP hardening. */ 1303 cpuinfo_init_bp_hardening(); 1304 return ((void *)STACKALIGN(thread0.td_pcb)); 1305 1306 } 1307 1308 #endif /* __ARM_ARCH < 6 */ 1309 #endif /* FDT */ 1310