1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */ 2 3 /*- 4 * Copyright (c) 2004 Olivier Houchard 5 * Copyright (c) 1994-1998 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * 9 * This code is derived from software written for Brini by Mark Brinicombe 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Mark Brinicombe 22 * for the NetBSD Project. 23 * 4. The name of the company nor the name of the author may be used to 24 * endorse or promote products derived from this software without specific 25 * prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * Machine dependent functions for kernel setup 40 * 41 * Created : 17/09/94 42 * Updated : 18/04/01 updated for new wscons 43 */ 44 45 #include "opt_compat.h" 46 #include "opt_ddb.h" 47 #include "opt_kstack_pages.h" 48 #include "opt_platform.h" 49 #include "opt_sched.h" 50 #include "opt_timer.h" 51 52 #include <sys/cdefs.h> 53 __FBSDID("$FreeBSD$"); 54 55 #include <sys/param.h> 56 #include <sys/buf.h> 57 #include <sys/bus.h> 58 #include <sys/cons.h> 59 #include <sys/cpu.h> 60 #include <sys/devmap.h> 61 #include <sys/efi.h> 62 #include <sys/imgact.h> 63 #include <sys/kdb.h> 64 #include <sys/kernel.h> 65 #include <sys/linker.h> 66 #include <sys/msgbuf.h> 67 #include <sys/rwlock.h> 68 #include <sys/sched.h> 69 #include <sys/syscallsubr.h> 70 #include <sys/sysent.h> 71 #include <sys/sysproto.h> 72 #include <sys/vmmeter.h> 73 74 #include <vm/vm_object.h> 75 #include <vm/vm_page.h> 76 #include <vm/vm_pager.h> 77 78 #include <machine/debug_monitor.h> 79 #include <machine/machdep.h> 80 #include <machine/metadata.h> 81 #include <machine/pcb.h> 82 #include <machine/physmem.h> 83 #include <machine/platform.h> 84 #include <machine/sysarch.h> 85 #include <machine/undefined.h> 86 #include <machine/vfp.h> 87 #include <machine/vmparam.h> 88 89 #ifdef FDT 90 #include <dev/fdt/fdt_common.h> 91 #include <machine/ofw_machdep.h> 92 #endif 93 94 #ifdef DEBUG 95 #define debugf(fmt, args...) printf(fmt, ##args) 96 #else 97 #define debugf(fmt, args...) 98 #endif 99 100 #if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \ 101 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \ 102 defined(COMPAT_FREEBSD9) 103 #error FreeBSD/arm doesn't provide compatibility with releases prior to 10 104 #endif 105 106 #if __ARM_ARCH >= 6 && !defined(INTRNG) 107 #error armv6 requires INTRNG 108 #endif 109 110 struct pcpu __pcpu[MAXCPU]; 111 struct pcpu *pcpup = &__pcpu[0]; 112 113 static struct trapframe proc0_tf; 114 uint32_t cpu_reset_address = 0; 115 int cold = 1; 116 vm_offset_t vector_page; 117 118 int (*_arm_memcpy)(void *, void *, int, int) = NULL; 119 int (*_arm_bzero)(void *, int, int) = NULL; 120 int _min_memcpy_size = 0; 121 int _min_bzero_size = 0; 122 123 extern int *end; 124 125 #ifdef FDT 126 vm_paddr_t pmap_pa; 127 #if __ARM_ARCH >= 6 128 vm_offset_t systempage; 129 vm_offset_t irqstack; 130 vm_offset_t undstack; 131 vm_offset_t abtstack; 132 #else 133 /* 134 * This is the number of L2 page tables required for covering max 135 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 136 * stacks etc.), uprounded to be divisible by 4. 137 */ 138 #define KERNEL_PT_MAX 78 139 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 140 struct pv_addr systempage; 141 static struct pv_addr msgbufpv; 142 struct pv_addr irqstack; 143 struct pv_addr undstack; 144 struct pv_addr abtstack; 145 static struct pv_addr kernelstack; 146 #endif /* __ARM_ARCH >= 6 */ 147 #endif /* FDT */ 148 149 #ifdef MULTIDELAY 150 static delay_func *delay_impl; 151 static void *delay_arg; 152 #endif 153 154 struct kva_md_info kmi; 155 156 /* 157 * arm32_vector_init: 158 * 159 * Initialize the vector page, and select whether or not to 160 * relocate the vectors. 161 * 162 * NOTE: We expect the vector page to be mapped at its expected 163 * destination. 164 */ 165 166 extern unsigned int page0[], page0_data[]; 167 void 168 arm_vector_init(vm_offset_t va, int which) 169 { 170 unsigned int *vectors = (int *) va; 171 unsigned int *vectors_data = vectors + (page0_data - page0); 172 int vec; 173 174 /* 175 * Loop through the vectors we're taking over, and copy the 176 * vector's insn and data word. 177 */ 178 for (vec = 0; vec < ARM_NVEC; vec++) { 179 if ((which & (1 << vec)) == 0) { 180 /* Don't want to take over this vector. */ 181 continue; 182 } 183 vectors[vec] = page0[vec]; 184 vectors_data[vec] = page0_data[vec]; 185 } 186 187 /* Now sync the vectors. */ 188 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int)); 189 190 vector_page = va; 191 #if __ARM_ARCH < 6 192 if (va == ARM_VECTORS_HIGH) { 193 /* 194 * Enable high vectors in the system control reg (SCTLR). 195 * 196 * Assume the MD caller knows what it's doing here, and really 197 * does want the vector page relocated. 198 * 199 * Note: This has to be done here (and not just in 200 * cpu_setup()) because the vector page needs to be 201 * accessible *before* cpu_startup() is called. 202 * Think ddb(9) ... 203 */ 204 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 205 } 206 #endif 207 } 208 209 static void 210 cpu_startup(void *dummy) 211 { 212 struct pcb *pcb = thread0.td_pcb; 213 const unsigned int mbyte = 1024 * 1024; 214 #if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE) 215 vm_page_t m; 216 #endif 217 218 identify_arm_cpu(); 219 220 vm_ksubmap_init(&kmi); 221 222 /* 223 * Display the RAM layout. 224 */ 225 printf("real memory = %ju (%ju MB)\n", 226 (uintmax_t)arm32_ptob(realmem), 227 (uintmax_t)arm32_ptob(realmem) / mbyte); 228 printf("avail memory = %ju (%ju MB)\n", 229 (uintmax_t)arm32_ptob(vm_cnt.v_free_count), 230 (uintmax_t)arm32_ptob(vm_cnt.v_free_count) / mbyte); 231 if (bootverbose) { 232 arm_physmem_print_tables(); 233 devmap_print_table(); 234 } 235 236 bufinit(); 237 vm_pager_bufferinit(); 238 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack + 239 USPACE_SVC_STACK_TOP; 240 pmap_set_pcb_pagedir(kernel_pmap, pcb); 241 #if __ARM_ARCH < 6 242 vector_page_setprot(VM_PROT_READ); 243 pmap_postinit(); 244 #ifdef ARM_CACHE_LOCK_ENABLE 245 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS); 246 arm_lock_cache_line(ARM_TP_ADDRESS); 247 #else 248 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO); 249 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m)); 250 #endif 251 *(uint32_t *)ARM_RAS_START = 0; 252 *(uint32_t *)ARM_RAS_END = 0xffffffff; 253 #endif 254 } 255 256 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 257 258 /* 259 * Flush the D-cache for non-DMA I/O so that the I-cache can 260 * be made coherent later. 261 */ 262 void 263 cpu_flush_dcache(void *ptr, size_t len) 264 { 265 266 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len); 267 } 268 269 /* Get current clock frequency for the given cpu id. */ 270 int 271 cpu_est_clockrate(int cpu_id, uint64_t *rate) 272 { 273 274 return (ENXIO); 275 } 276 277 void 278 cpu_idle(int busy) 279 { 280 281 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu); 282 spinlock_enter(); 283 #ifndef NO_EVENTTIMERS 284 if (!busy) 285 cpu_idleclock(); 286 #endif 287 if (!sched_runnable()) 288 cpu_sleep(0); 289 #ifndef NO_EVENTTIMERS 290 if (!busy) 291 cpu_activeclock(); 292 #endif 293 spinlock_exit(); 294 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu); 295 } 296 297 int 298 cpu_idle_wakeup(int cpu) 299 { 300 301 return (0); 302 } 303 304 #ifdef NO_EVENTTIMERS 305 /* 306 * Most ARM platforms don't need to do anything special to init their clocks 307 * (they get intialized during normal device attachment), and by not defining a 308 * cpu_initclocks() function they get this generic one. Any platform that needs 309 * to do something special can just provide their own implementation, which will 310 * override this one due to the weak linkage. 311 */ 312 void 313 arm_generic_initclocks(void) 314 { 315 } 316 __weak_reference(arm_generic_initclocks, cpu_initclocks); 317 318 #else 319 void 320 cpu_initclocks(void) 321 { 322 323 #ifdef SMP 324 if (PCPU_GET(cpuid) == 0) 325 cpu_initclocks_bsp(); 326 else 327 cpu_initclocks_ap(); 328 #else 329 cpu_initclocks_bsp(); 330 #endif 331 } 332 #endif 333 334 #ifdef MULTIDELAY 335 void 336 arm_set_delay(delay_func *impl, void *arg) 337 { 338 339 KASSERT(impl != NULL, ("No DELAY implementation")); 340 delay_impl = impl; 341 delay_arg = arg; 342 } 343 344 void 345 DELAY(int usec) 346 { 347 348 delay_impl(usec, delay_arg); 349 } 350 #endif 351 352 void 353 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 354 { 355 } 356 357 void 358 spinlock_enter(void) 359 { 360 struct thread *td; 361 register_t cspr; 362 363 td = curthread; 364 if (td->td_md.md_spinlock_count == 0) { 365 cspr = disable_interrupts(PSR_I | PSR_F); 366 td->td_md.md_spinlock_count = 1; 367 td->td_md.md_saved_cspr = cspr; 368 } else 369 td->td_md.md_spinlock_count++; 370 critical_enter(); 371 } 372 373 void 374 spinlock_exit(void) 375 { 376 struct thread *td; 377 register_t cspr; 378 379 td = curthread; 380 critical_exit(); 381 cspr = td->td_md.md_saved_cspr; 382 td->td_md.md_spinlock_count--; 383 if (td->td_md.md_spinlock_count == 0) 384 restore_interrupts(cspr); 385 } 386 387 /* 388 * Clear registers on exec 389 */ 390 void 391 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 392 { 393 struct trapframe *tf = td->td_frame; 394 395 memset(tf, 0, sizeof(*tf)); 396 tf->tf_usr_sp = stack; 397 tf->tf_usr_lr = imgp->entry_addr; 398 tf->tf_svc_lr = 0x77777777; 399 tf->tf_pc = imgp->entry_addr; 400 tf->tf_spsr = PSR_USR32_MODE; 401 } 402 403 404 #ifdef VFP 405 /* 406 * Get machine VFP context. 407 */ 408 static void 409 get_vfpcontext(struct thread *td, mcontext_vfp_t *vfp) 410 { 411 struct pcb *curpcb; 412 413 curpcb = curthread->td_pcb; 414 critical_enter(); 415 416 vfp_store(&curpcb->pcb_vfpstate, false); 417 memcpy(vfp->mcv_reg, curpcb->pcb_vfpstate.reg, 418 sizeof(vfp->mcv_reg)); 419 vfp->mcv_fpscr = curpcb->pcb_vfpstate.fpscr; 420 421 critical_exit(); 422 } 423 424 /* 425 * Set machine VFP context. 426 */ 427 static void 428 set_vfpcontext(struct thread *td, mcontext_vfp_t *vfp) 429 { 430 struct pcb *curpcb; 431 432 curpcb = curthread->td_pcb; 433 critical_enter(); 434 435 vfp_discard(td); 436 memcpy(curpcb->pcb_vfpstate.reg, vfp->mcv_reg, 437 sizeof(curpcb->pcb_vfpstate.reg)); 438 curpcb->pcb_vfpstate.fpscr = vfp->mcv_fpscr; 439 440 critical_exit(); 441 } 442 #endif 443 444 /* 445 * Get machine context. 446 */ 447 int 448 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 449 { 450 struct trapframe *tf = td->td_frame; 451 __greg_t *gr = mcp->__gregs; 452 453 if (clear_ret & GET_MC_CLEAR_RET) { 454 gr[_REG_R0] = 0; 455 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C; 456 } else { 457 gr[_REG_R0] = tf->tf_r0; 458 gr[_REG_CPSR] = tf->tf_spsr; 459 } 460 gr[_REG_R1] = tf->tf_r1; 461 gr[_REG_R2] = tf->tf_r2; 462 gr[_REG_R3] = tf->tf_r3; 463 gr[_REG_R4] = tf->tf_r4; 464 gr[_REG_R5] = tf->tf_r5; 465 gr[_REG_R6] = tf->tf_r6; 466 gr[_REG_R7] = tf->tf_r7; 467 gr[_REG_R8] = tf->tf_r8; 468 gr[_REG_R9] = tf->tf_r9; 469 gr[_REG_R10] = tf->tf_r10; 470 gr[_REG_R11] = tf->tf_r11; 471 gr[_REG_R12] = tf->tf_r12; 472 gr[_REG_SP] = tf->tf_usr_sp; 473 gr[_REG_LR] = tf->tf_usr_lr; 474 gr[_REG_PC] = tf->tf_pc; 475 476 mcp->mc_vfp_size = 0; 477 mcp->mc_vfp_ptr = NULL; 478 memset(&mcp->mc_spare, 0, sizeof(mcp->mc_spare)); 479 480 return (0); 481 } 482 483 /* 484 * Set machine context. 485 * 486 * However, we don't set any but the user modifiable flags, and we won't 487 * touch the cs selector. 488 */ 489 int 490 set_mcontext(struct thread *td, mcontext_t *mcp) 491 { 492 mcontext_vfp_t mc_vfp, *vfp; 493 struct trapframe *tf = td->td_frame; 494 const __greg_t *gr = mcp->__gregs; 495 496 #ifdef WITNESS 497 if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(mc_vfp)) { 498 printf("%s: %s: Malformed mc_vfp_size: %d (0x%08X)\n", 499 td->td_proc->p_comm, __func__, 500 mcp->mc_vfp_size, mcp->mc_vfp_size); 501 } else if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr == NULL) { 502 printf("%s: %s: c_vfp_size != 0 but mc_vfp_ptr == NULL\n", 503 td->td_proc->p_comm, __func__); 504 } 505 #endif 506 507 if (mcp->mc_vfp_size == sizeof(mc_vfp) && mcp->mc_vfp_ptr != NULL) { 508 if (copyin(mcp->mc_vfp_ptr, &mc_vfp, sizeof(mc_vfp)) != 0) 509 return (EFAULT); 510 vfp = &mc_vfp; 511 } else { 512 vfp = NULL; 513 } 514 515 tf->tf_r0 = gr[_REG_R0]; 516 tf->tf_r1 = gr[_REG_R1]; 517 tf->tf_r2 = gr[_REG_R2]; 518 tf->tf_r3 = gr[_REG_R3]; 519 tf->tf_r4 = gr[_REG_R4]; 520 tf->tf_r5 = gr[_REG_R5]; 521 tf->tf_r6 = gr[_REG_R6]; 522 tf->tf_r7 = gr[_REG_R7]; 523 tf->tf_r8 = gr[_REG_R8]; 524 tf->tf_r9 = gr[_REG_R9]; 525 tf->tf_r10 = gr[_REG_R10]; 526 tf->tf_r11 = gr[_REG_R11]; 527 tf->tf_r12 = gr[_REG_R12]; 528 tf->tf_usr_sp = gr[_REG_SP]; 529 tf->tf_usr_lr = gr[_REG_LR]; 530 tf->tf_pc = gr[_REG_PC]; 531 tf->tf_spsr = gr[_REG_CPSR]; 532 #ifdef VFP 533 if (vfp != NULL) 534 set_vfpcontext(td, vfp); 535 #endif 536 return (0); 537 } 538 539 void 540 sendsig(catcher, ksi, mask) 541 sig_t catcher; 542 ksiginfo_t *ksi; 543 sigset_t *mask; 544 { 545 struct thread *td; 546 struct proc *p; 547 struct trapframe *tf; 548 struct sigframe *fp, frame; 549 struct sigacts *psp; 550 struct sysentvec *sysent; 551 int onstack; 552 int sig; 553 int code; 554 555 td = curthread; 556 p = td->td_proc; 557 PROC_LOCK_ASSERT(p, MA_OWNED); 558 sig = ksi->ksi_signo; 559 code = ksi->ksi_code; 560 psp = p->p_sigacts; 561 mtx_assert(&psp->ps_mtx, MA_OWNED); 562 tf = td->td_frame; 563 onstack = sigonstack(tf->tf_usr_sp); 564 565 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 566 catcher, sig); 567 568 /* Allocate and validate space for the signal handler context. */ 569 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) && 570 SIGISMEMBER(psp->ps_sigonstack, sig)) { 571 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp + 572 td->td_sigstk.ss_size); 573 #if defined(COMPAT_43) 574 td->td_sigstk.ss_flags |= SS_ONSTACK; 575 #endif 576 } else 577 fp = (struct sigframe *)td->td_frame->tf_usr_sp; 578 579 /* make room on the stack */ 580 fp--; 581 582 /* make the stack aligned */ 583 fp = (struct sigframe *)STACKALIGN(fp); 584 /* Populate the siginfo frame. */ 585 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0); 586 #ifdef VFP 587 get_vfpcontext(td, &frame.sf_vfp); 588 frame.sf_uc.uc_mcontext.mc_vfp_size = sizeof(fp->sf_vfp); 589 frame.sf_uc.uc_mcontext.mc_vfp_ptr = &fp->sf_vfp; 590 #else 591 frame.sf_uc.uc_mcontext.mc_vfp_size = 0; 592 frame.sf_uc.uc_mcontext.mc_vfp_ptr = NULL; 593 #endif 594 frame.sf_si = ksi->ksi_info; 595 frame.sf_uc.uc_sigmask = *mask; 596 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK ) 597 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE; 598 frame.sf_uc.uc_stack = td->td_sigstk; 599 mtx_unlock(&psp->ps_mtx); 600 PROC_UNLOCK(td->td_proc); 601 602 /* Copy the sigframe out to the user's stack. */ 603 if (copyout(&frame, fp, sizeof(*fp)) != 0) { 604 /* Process has trashed its stack. Kill it. */ 605 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp); 606 PROC_LOCK(p); 607 sigexit(td, SIGILL); 608 } 609 610 /* 611 * Build context to run handler in. We invoke the handler 612 * directly, only returning via the trampoline. Note the 613 * trampoline version numbers are coordinated with machine- 614 * dependent code in libc. 615 */ 616 617 tf->tf_r0 = sig; 618 tf->tf_r1 = (register_t)&fp->sf_si; 619 tf->tf_r2 = (register_t)&fp->sf_uc; 620 621 /* the trampoline uses r5 as the uc address */ 622 tf->tf_r5 = (register_t)&fp->sf_uc; 623 tf->tf_pc = (register_t)catcher; 624 tf->tf_usr_sp = (register_t)fp; 625 sysent = p->p_sysent; 626 if (sysent->sv_sigcode_base != 0) 627 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base; 628 else 629 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings - 630 *(sysent->sv_szsigcode)); 631 /* Set the mode to enter in the signal handler */ 632 #if __ARM_ARCH >= 7 633 if ((register_t)catcher & 1) 634 tf->tf_spsr |= PSR_T; 635 else 636 tf->tf_spsr &= ~PSR_T; 637 #endif 638 639 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr, 640 tf->tf_usr_sp); 641 642 PROC_LOCK(p); 643 mtx_lock(&psp->ps_mtx); 644 } 645 646 int 647 sys_sigreturn(td, uap) 648 struct thread *td; 649 struct sigreturn_args /* { 650 const struct __ucontext *sigcntxp; 651 } */ *uap; 652 { 653 ucontext_t uc; 654 int spsr; 655 656 if (uap == NULL) 657 return (EFAULT); 658 if (copyin(uap->sigcntxp, &uc, sizeof(uc))) 659 return (EFAULT); 660 /* 661 * Make sure the processor mode has not been tampered with and 662 * interrupts have not been disabled. 663 */ 664 spsr = uc.uc_mcontext.__gregs[_REG_CPSR]; 665 if ((spsr & PSR_MODE) != PSR_USR32_MODE || 666 (spsr & (PSR_I | PSR_F)) != 0) 667 return (EINVAL); 668 /* Restore register context. */ 669 set_mcontext(td, &uc.uc_mcontext); 670 671 /* Restore signal mask. */ 672 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 673 674 return (EJUSTRETURN); 675 } 676 677 /* 678 * Construct a PCB from a trapframe. This is called from kdb_trap() where 679 * we want to start a backtrace from the function that caused us to enter 680 * the debugger. We have the context in the trapframe, but base the trace 681 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 682 * enough for a backtrace. 683 */ 684 void 685 makectx(struct trapframe *tf, struct pcb *pcb) 686 { 687 pcb->pcb_regs.sf_r4 = tf->tf_r4; 688 pcb->pcb_regs.sf_r5 = tf->tf_r5; 689 pcb->pcb_regs.sf_r6 = tf->tf_r6; 690 pcb->pcb_regs.sf_r7 = tf->tf_r7; 691 pcb->pcb_regs.sf_r8 = tf->tf_r8; 692 pcb->pcb_regs.sf_r9 = tf->tf_r9; 693 pcb->pcb_regs.sf_r10 = tf->tf_r10; 694 pcb->pcb_regs.sf_r11 = tf->tf_r11; 695 pcb->pcb_regs.sf_r12 = tf->tf_r12; 696 pcb->pcb_regs.sf_pc = tf->tf_pc; 697 pcb->pcb_regs.sf_lr = tf->tf_usr_lr; 698 pcb->pcb_regs.sf_sp = tf->tf_usr_sp; 699 } 700 701 void 702 pcpu0_init(void) 703 { 704 #if __ARM_ARCH >= 6 705 set_curthread(&thread0); 706 #endif 707 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 708 PCPU_SET(curthread, &thread0); 709 } 710 711 /* 712 * Initialize proc0 713 */ 714 void 715 init_proc0(vm_offset_t kstack) 716 { 717 proc_linkup0(&proc0, &thread0); 718 thread0.td_kstack = kstack; 719 thread0.td_pcb = (struct pcb *) 720 (thread0.td_kstack + kstack_pages * PAGE_SIZE) - 1; 721 thread0.td_pcb->pcb_flags = 0; 722 thread0.td_pcb->pcb_vfpcpu = -1; 723 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN; 724 thread0.td_frame = &proc0_tf; 725 pcpup->pc_curpcb = thread0.td_pcb; 726 } 727 728 #if __ARM_ARCH >= 6 729 void 730 set_stackptrs(int cpu) 731 { 732 733 set_stackptr(PSR_IRQ32_MODE, 734 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 735 set_stackptr(PSR_ABT32_MODE, 736 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 737 set_stackptr(PSR_UND32_MODE, 738 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 739 } 740 #else 741 void 742 set_stackptrs(int cpu) 743 { 744 745 set_stackptr(PSR_IRQ32_MODE, 746 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 747 set_stackptr(PSR_ABT32_MODE, 748 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 749 set_stackptr(PSR_UND32_MODE, 750 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 751 } 752 #endif 753 754 755 #ifdef FDT 756 #if __ARM_ARCH < 6 757 void * 758 initarm(struct arm_boot_params *abp) 759 { 760 struct mem_region mem_regions[FDT_MEM_REGIONS]; 761 struct pv_addr kernel_l1pt; 762 struct pv_addr dpcpu; 763 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 764 uint64_t memsize; 765 uint32_t l2size; 766 char *env; 767 void *kmdp; 768 u_int l1pagetable; 769 int i, j, err_devmap, mem_regions_sz; 770 771 lastaddr = parse_boot_param(abp); 772 arm_physmem_kernaddr = abp->abp_physaddr; 773 774 memsize = 0; 775 776 cpuinfo_init(); 777 set_cpufuncs(); 778 779 /* 780 * Find the dtb passed in by the boot loader. 781 */ 782 kmdp = preload_search_by_type("elf kernel"); 783 if (kmdp != NULL) 784 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 785 else 786 dtbp = (vm_offset_t)NULL; 787 788 #if defined(FDT_DTB_STATIC) 789 /* 790 * In case the device tree blob was not retrieved (from metadata) try 791 * to use the statically embedded one. 792 */ 793 if (dtbp == (vm_offset_t)NULL) 794 dtbp = (vm_offset_t)&fdt_static_dtb; 795 #endif 796 797 if (OF_install(OFW_FDT, 0) == FALSE) 798 panic("Cannot install FDT"); 799 800 if (OF_init((void *)dtbp) != 0) 801 panic("OF_init failed with the found device tree"); 802 803 /* Grab physical memory regions information from device tree. */ 804 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0) 805 panic("Cannot get physical memory regions"); 806 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 807 808 /* Grab reserved memory regions information from device tree. */ 809 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 810 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 811 EXFLAG_NODUMP | EXFLAG_NOALLOC); 812 813 /* Platform-specific initialisation */ 814 platform_probe_and_attach(); 815 816 pcpu0_init(); 817 818 /* Do basic tuning, hz etc */ 819 init_param1(); 820 821 /* Calculate number of L2 tables needed for mapping vm_page_array */ 822 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 823 l2size = (l2size >> L1_S_SHIFT) + 1; 824 825 /* 826 * Add one table for end of kernel map, one for stacks, msgbuf and 827 * L1 and L2 tables map, one for vectors map and two for 828 * l2 structures from pmap_bootstrap. 829 */ 830 l2size += 5; 831 832 /* Make it divisible by 4 */ 833 l2size = (l2size + 3) & ~3; 834 835 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 836 837 /* Define a macro to simplify memory allocation */ 838 #define valloc_pages(var, np) \ 839 alloc_pages((var).pv_va, (np)); \ 840 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR); 841 842 #define alloc_pages(var, np) \ 843 (var) = freemempos; \ 844 freemempos += (np * PAGE_SIZE); \ 845 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 846 847 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 848 freemempos += PAGE_SIZE; 849 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 850 851 for (i = 0, j = 0; i < l2size; ++i) { 852 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 853 valloc_pages(kernel_pt_table[i], 854 L2_TABLE_SIZE / PAGE_SIZE); 855 j = i; 856 } else { 857 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 858 L2_TABLE_SIZE_REAL * (i - j); 859 kernel_pt_table[i].pv_pa = 860 kernel_pt_table[i].pv_va - KERNVIRTADDR + 861 abp->abp_physaddr; 862 863 } 864 } 865 /* 866 * Allocate a page for the system page mapped to 0x00000000 867 * or 0xffff0000. This page will just contain the system vectors 868 * and can be shared by all processes. 869 */ 870 valloc_pages(systempage, 1); 871 872 /* Allocate dynamic per-cpu area. */ 873 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 874 dpcpu_init((void *)dpcpu.pv_va, 0); 875 876 /* Allocate stacks for all modes */ 877 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU); 878 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU); 879 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU); 880 valloc_pages(kernelstack, kstack_pages * MAXCPU); 881 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 882 883 /* 884 * Now we start construction of the L1 page table 885 * We start by mapping the L2 page tables into the L1. 886 * This means that we can replace L1 mappings later on if necessary 887 */ 888 l1pagetable = kernel_l1pt.pv_va; 889 890 /* 891 * Try to map as much as possible of kernel text and data using 892 * 1MB section mapping and for the rest of initial kernel address 893 * space use L2 coarse tables. 894 * 895 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 896 * and kernel structures 897 */ 898 l2_start = lastaddr & ~(L1_S_OFFSET); 899 for (i = 0 ; i < l2size - 1; i++) 900 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 901 &kernel_pt_table[i]); 902 903 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 904 905 /* Map kernel code and data */ 906 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr, 907 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 908 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 909 910 /* Map L1 directory and allocated L2 page tables */ 911 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 912 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 913 914 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 915 kernel_pt_table[0].pv_pa, 916 L2_TABLE_SIZE_REAL * l2size, 917 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 918 919 /* Map allocated DPCPU, stacks and msgbuf */ 920 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 921 freemempos - dpcpu.pv_va, 922 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 923 924 /* Link and map the vector page */ 925 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 926 &kernel_pt_table[l2size - 1]); 927 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 928 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE); 929 930 /* Establish static device mappings. */ 931 err_devmap = platform_devmap_init(); 932 devmap_bootstrap(l1pagetable, NULL); 933 vm_max_kernel_address = platform_lastaddr(); 934 935 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT); 936 pmap_pa = kernel_l1pt.pv_pa; 937 cpu_setttb(kernel_l1pt.pv_pa); 938 cpu_tlb_flushID(); 939 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 940 941 /* 942 * Now that proper page tables are installed, call cpu_setup() to enable 943 * instruction and data caches and other chip-specific features. 944 */ 945 cpu_setup(); 946 947 /* 948 * Only after the SOC registers block is mapped we can perform device 949 * tree fixups, as they may attempt to read parameters from hardware. 950 */ 951 OF_interpret("perform-fixup", 0); 952 953 platform_gpio_init(); 954 955 cninit(); 956 957 debugf("initarm: console initialized\n"); 958 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 959 debugf(" boothowto = 0x%08x\n", boothowto); 960 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 961 arm_print_kenv(); 962 963 env = kern_getenv("kernelname"); 964 if (env != NULL) { 965 strlcpy(kernelname, env, sizeof(kernelname)); 966 freeenv(env); 967 } 968 969 if (err_devmap != 0) 970 printf("WARNING: could not fully configure devmap, error=%d\n", 971 err_devmap); 972 973 platform_late_init(); 974 975 /* 976 * Pages were allocated during the secondary bootstrap for the 977 * stacks for different CPU modes. 978 * We must now set the r13 registers in the different CPU modes to 979 * point to these stacks. 980 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 981 * of the stack memory. 982 */ 983 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 984 985 set_stackptrs(0); 986 987 /* 988 * We must now clean the cache again.... 989 * Cleaning may be done by reading new data to displace any 990 * dirty data in the cache. This will have happened in cpu_setttb() 991 * but since we are boot strapping the addresses used for the read 992 * may have just been remapped and thus the cache could be out 993 * of sync. A re-clean after the switch will cure this. 994 * After booting there are no gross relocations of the kernel thus 995 * this problem will not occur after initarm(). 996 */ 997 cpu_idcache_wbinv_all(); 998 999 undefined_init(); 1000 1001 init_proc0(kernelstack.pv_va); 1002 1003 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1004 pmap_bootstrap(freemempos, &kernel_l1pt); 1005 msgbufp = (void *)msgbufpv.pv_va; 1006 msgbufinit(msgbufp, msgbufsize); 1007 mutex_init(); 1008 1009 /* 1010 * Exclude the kernel (and all the things we allocated which immediately 1011 * follow the kernel) from the VM allocation pool but not from crash 1012 * dumps. virtual_avail is a global variable which tracks the kva we've 1013 * "allocated" while setting up pmaps. 1014 * 1015 * Prepare the list of physical memory available to the vm subsystem. 1016 */ 1017 arm_physmem_exclude_region(abp->abp_physaddr, 1018 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC); 1019 arm_physmem_init_kernel_globals(); 1020 1021 init_param2(physmem); 1022 dbg_monitor_init(); 1023 kdb_init(); 1024 1025 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 1026 sizeof(struct pcb))); 1027 } 1028 #else /* __ARM_ARCH < 6 */ 1029 void * 1030 initarm(struct arm_boot_params *abp) 1031 { 1032 struct mem_region mem_regions[FDT_MEM_REGIONS]; 1033 vm_paddr_t lastaddr; 1034 vm_offset_t dtbp, kernelstack, dpcpu; 1035 char *env; 1036 void *kmdp; 1037 int err_devmap, mem_regions_sz; 1038 #ifdef EFI 1039 struct efi_map_header *efihdr; 1040 #endif 1041 1042 /* get last allocated physical address */ 1043 arm_physmem_kernaddr = abp->abp_physaddr; 1044 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr; 1045 1046 set_cpufuncs(); 1047 cpuinfo_init(); 1048 1049 /* 1050 * Find the dtb passed in by the boot loader. 1051 */ 1052 kmdp = preload_search_by_type("elf kernel"); 1053 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 1054 #if defined(FDT_DTB_STATIC) 1055 /* 1056 * In case the device tree blob was not retrieved (from metadata) try 1057 * to use the statically embedded one. 1058 */ 1059 if (dtbp == (vm_offset_t)NULL) 1060 dtbp = (vm_offset_t)&fdt_static_dtb; 1061 #endif 1062 1063 if (OF_install(OFW_FDT, 0) == FALSE) 1064 panic("Cannot install FDT"); 1065 1066 if (OF_init((void *)dtbp) != 0) 1067 panic("OF_init failed with the found device tree"); 1068 1069 #if defined(LINUX_BOOT_ABI) 1070 arm_parse_fdt_bootargs(); 1071 #endif 1072 1073 #ifdef EFI 1074 efihdr = (struct efi_map_header *)preload_search_info(kmdp, 1075 MODINFO_METADATA | MODINFOMD_EFI_MAP); 1076 if (efihdr != NULL) { 1077 arm_add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz); 1078 } else 1079 #endif 1080 { 1081 /* Grab physical memory regions information from device tree. */ 1082 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0) 1083 panic("Cannot get physical memory regions"); 1084 } 1085 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 1086 1087 /* Grab reserved memory regions information from device tree. */ 1088 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 1089 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 1090 EXFLAG_NODUMP | EXFLAG_NOALLOC); 1091 1092 /* 1093 * Set TEX remapping registers. 1094 * Setup kernel page tables and switch to kernel L1 page table. 1095 */ 1096 pmap_set_tex(); 1097 pmap_bootstrap_prepare(lastaddr); 1098 1099 /* 1100 * Now that proper page tables are installed, call cpu_setup() to enable 1101 * instruction and data caches and other chip-specific features. 1102 */ 1103 cpu_setup(); 1104 1105 /* Platform-specific initialisation */ 1106 platform_probe_and_attach(); 1107 pcpu0_init(); 1108 1109 /* Do basic tuning, hz etc */ 1110 init_param1(); 1111 1112 /* 1113 * Allocate a page for the system page mapped to 0xffff0000 1114 * This page will just contain the system vectors and can be 1115 * shared by all processes. 1116 */ 1117 systempage = pmap_preboot_get_pages(1); 1118 1119 /* Map the vector page. */ 1120 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1); 1121 if (virtual_end >= ARM_VECTORS_HIGH) 1122 virtual_end = ARM_VECTORS_HIGH - 1; 1123 1124 /* Allocate dynamic per-cpu area. */ 1125 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE); 1126 dpcpu_init((void *)dpcpu, 0); 1127 1128 /* Allocate stacks for all modes */ 1129 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU); 1130 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU); 1131 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU ); 1132 kernelstack = pmap_preboot_get_vpages(kstack_pages * MAXCPU); 1133 1134 /* Allocate message buffer. */ 1135 msgbufp = (void *)pmap_preboot_get_vpages( 1136 round_page(msgbufsize) / PAGE_SIZE); 1137 1138 /* 1139 * Pages were allocated during the secondary bootstrap for the 1140 * stacks for different CPU modes. 1141 * We must now set the r13 registers in the different CPU modes to 1142 * point to these stacks. 1143 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1144 * of the stack memory. 1145 */ 1146 set_stackptrs(0); 1147 mutex_init(); 1148 1149 /* Establish static device mappings. */ 1150 err_devmap = platform_devmap_init(); 1151 devmap_bootstrap(0, NULL); 1152 vm_max_kernel_address = platform_lastaddr(); 1153 1154 /* 1155 * Only after the SOC registers block is mapped we can perform device 1156 * tree fixups, as they may attempt to read parameters from hardware. 1157 */ 1158 OF_interpret("perform-fixup", 0); 1159 platform_gpio_init(); 1160 cninit(); 1161 1162 debugf("initarm: console initialized\n"); 1163 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1164 debugf(" boothowto = 0x%08x\n", boothowto); 1165 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1166 debugf(" lastaddr1: 0x%08x\n", lastaddr); 1167 arm_print_kenv(); 1168 1169 env = kern_getenv("kernelname"); 1170 if (env != NULL) 1171 strlcpy(kernelname, env, sizeof(kernelname)); 1172 1173 if (err_devmap != 0) 1174 printf("WARNING: could not fully configure devmap, error=%d\n", 1175 err_devmap); 1176 1177 platform_late_init(); 1178 1179 /* 1180 * We must now clean the cache again.... 1181 * Cleaning may be done by reading new data to displace any 1182 * dirty data in the cache. This will have happened in cpu_setttb() 1183 * but since we are boot strapping the addresses used for the read 1184 * may have just been remapped and thus the cache could be out 1185 * of sync. A re-clean after the switch will cure this. 1186 * After booting there are no gross relocations of the kernel thus 1187 * this problem will not occur after initarm(). 1188 */ 1189 /* Set stack for exception handlers */ 1190 undefined_init(); 1191 init_proc0(kernelstack); 1192 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1193 enable_interrupts(PSR_A); 1194 pmap_bootstrap(0); 1195 1196 /* Exclude the kernel (and all the things we allocated which immediately 1197 * follow the kernel) from the VM allocation pool but not from crash 1198 * dumps. virtual_avail is a global variable which tracks the kva we've 1199 * "allocated" while setting up pmaps. 1200 * 1201 * Prepare the list of physical memory available to the vm subsystem. 1202 */ 1203 arm_physmem_exclude_region(abp->abp_physaddr, 1204 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC); 1205 arm_physmem_init_kernel_globals(); 1206 1207 init_param2(physmem); 1208 /* Init message buffer. */ 1209 msgbufinit(msgbufp, msgbufsize); 1210 dbg_monitor_init(); 1211 kdb_init(); 1212 return ((void *)STACKALIGN(thread0.td_pcb)); 1213 1214 } 1215 1216 #endif /* __ARM_ARCH < 6 */ 1217 #endif /* FDT */ 1218