xref: /freebsd/sys/arm/arm/machdep_kdb.c (revision fdafd315)
1ffeeb2abSMichal Meloun /*	$NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $	*/
2ffeeb2abSMichal Meloun 
3ffeeb2abSMichal Meloun /*-
4ffeeb2abSMichal Meloun  * Copyright (c) 2004 Olivier Houchard
5ffeeb2abSMichal Meloun  * Copyright (c) 1994-1998 Mark Brinicombe.
6ffeeb2abSMichal Meloun  * Copyright (c) 1994 Brini.
7ffeeb2abSMichal Meloun  * All rights reserved.
8ffeeb2abSMichal Meloun  *
9ffeeb2abSMichal Meloun  * Redistribution and use in source and binary forms, with or without
10ffeeb2abSMichal Meloun  * modification, are permitted provided that the following conditions
11ffeeb2abSMichal Meloun  * are met:
12ffeeb2abSMichal Meloun  * 1. Redistributions of source code must retain the above copyright
13ffeeb2abSMichal Meloun  *    notice, this list of conditions and the following disclaimer.
14ffeeb2abSMichal Meloun  * 2. Redistributions in binary form must reproduce the above copyright
15ffeeb2abSMichal Meloun  *    notice, this list of conditions and the following disclaimer in the
16ffeeb2abSMichal Meloun  *    documentation and/or other materials provided with the distribution.
17ffeeb2abSMichal Meloun  *
18ffeeb2abSMichal Meloun  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19ffeeb2abSMichal Meloun  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20ffeeb2abSMichal Meloun  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21ffeeb2abSMichal Meloun  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22ffeeb2abSMichal Meloun  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23ffeeb2abSMichal Meloun  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24ffeeb2abSMichal Meloun  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25ffeeb2abSMichal Meloun  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26ffeeb2abSMichal Meloun  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27ffeeb2abSMichal Meloun  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28ffeeb2abSMichal Meloun  * SUCH DAMAGE.
29ffeeb2abSMichal Meloun  */
30ffeeb2abSMichal Meloun 
31ffeeb2abSMichal Meloun #include "opt_ddb.h"
32ffeeb2abSMichal Meloun 
33ffeeb2abSMichal Meloun #include <sys/param.h>
34ffeeb2abSMichal Meloun #include <sys/proc.h>
35b7924341SAndrew Turner #include <sys/reg.h>
36ffeeb2abSMichal Meloun #include <sys/systm.h>
37ffeeb2abSMichal Meloun 
38ffeeb2abSMichal Meloun #include <machine/cpu.h>
396926e269SKornel Dulęba #include <machine/pcb.h>
40ffeeb2abSMichal Meloun 
41ffeeb2abSMichal Meloun #ifdef DDB
42ffeeb2abSMichal Meloun #include <ddb/ddb.h>
43ffeeb2abSMichal Meloun 
DB_SHOW_COMMAND(cp15,db_show_cp15)44ffeeb2abSMichal Meloun DB_SHOW_COMMAND(cp15, db_show_cp15)
45ffeeb2abSMichal Meloun {
46ffeeb2abSMichal Meloun 	u_int reg;
47ffeeb2abSMichal Meloun 
48ffeeb2abSMichal Meloun 	reg = cp15_midr_get();
49ffeeb2abSMichal Meloun 	db_printf("Cpu ID: 0x%08x\n", reg);
50ffeeb2abSMichal Meloun 	reg = cp15_ctr_get();
51ffeeb2abSMichal Meloun 	db_printf("Current Cache Lvl ID: 0x%08x\n",reg);
52ffeeb2abSMichal Meloun 
53ffeeb2abSMichal Meloun 	reg = cp15_sctlr_get();
54ffeeb2abSMichal Meloun 	db_printf("Ctrl: 0x%08x\n",reg);
55ffeeb2abSMichal Meloun 	reg = cp15_actlr_get();
56ffeeb2abSMichal Meloun 	db_printf("Aux Ctrl: 0x%08x\n",reg);
57ffeeb2abSMichal Meloun 
58ffeeb2abSMichal Meloun 	reg = cp15_id_pfr0_get();
59ffeeb2abSMichal Meloun 	db_printf("Processor Feat 0: 0x%08x\n", reg);
60ffeeb2abSMichal Meloun 	reg = cp15_id_pfr1_get();
61ffeeb2abSMichal Meloun 	db_printf("Processor Feat 1: 0x%08x\n", reg);
62ffeeb2abSMichal Meloun 	reg = cp15_id_dfr0_get();
63ffeeb2abSMichal Meloun 	db_printf("Debug Feat 0: 0x%08x\n", reg);
64ffeeb2abSMichal Meloun 	reg = cp15_id_afr0_get();
65ffeeb2abSMichal Meloun 	db_printf("Auxiliary Feat 0: 0x%08x\n", reg);
66ffeeb2abSMichal Meloun 	reg = cp15_id_mmfr0_get();
67ffeeb2abSMichal Meloun 	db_printf("Memory Model Feat 0: 0x%08x\n", reg);
68ffeeb2abSMichal Meloun 	reg = cp15_id_mmfr1_get();
69ffeeb2abSMichal Meloun 	db_printf("Memory Model Feat 1: 0x%08x\n", reg);
70ffeeb2abSMichal Meloun 	reg = cp15_id_mmfr2_get();
71ffeeb2abSMichal Meloun 	db_printf("Memory Model Feat 2: 0x%08x\n", reg);
72ffeeb2abSMichal Meloun 	reg = cp15_id_mmfr3_get();
73ffeeb2abSMichal Meloun 	db_printf("Memory Model Feat 3: 0x%08x\n", reg);
74ffeeb2abSMichal Meloun 	reg = cp15_ttbr_get();
75ffeeb2abSMichal Meloun 	db_printf("TTB0: 0x%08x\n", reg);
76ffeeb2abSMichal Meloun }
77ffeeb2abSMichal Meloun 
DB_SHOW_COMMAND(vtop,db_show_vtop)78ffeeb2abSMichal Meloun DB_SHOW_COMMAND(vtop, db_show_vtop)
79ffeeb2abSMichal Meloun {
80ffeeb2abSMichal Meloun 	u_int reg;
81ffeeb2abSMichal Meloun 
82ffeeb2abSMichal Meloun 	if (have_addr) {
83ffeeb2abSMichal Meloun 		cp15_ats1cpr_set(addr);
84ffeeb2abSMichal Meloun 		reg = cp15_par_get();
85ffeeb2abSMichal Meloun 		db_printf("Physical address reg: 0x%08x\n",reg);
86ffeeb2abSMichal Meloun 	} else
87ffeeb2abSMichal Meloun 		db_printf("show vtop <virt_addr>\n");
88ffeeb2abSMichal Meloun }
89ffeeb2abSMichal Meloun #endif /* DDB */
90ffeeb2abSMichal Meloun 
91ffeeb2abSMichal Meloun int
fill_regs(struct thread * td,struct reg * regs)92ffeeb2abSMichal Meloun fill_regs(struct thread *td, struct reg *regs)
93ffeeb2abSMichal Meloun {
94ffeeb2abSMichal Meloun 	struct trapframe *tf = td->td_frame;
95ffeeb2abSMichal Meloun 	bcopy(&tf->tf_r0, regs->r, sizeof(regs->r));
96ffeeb2abSMichal Meloun 	regs->r_sp = tf->tf_usr_sp;
97ffeeb2abSMichal Meloun 	regs->r_lr = tf->tf_usr_lr;
98ffeeb2abSMichal Meloun 	regs->r_pc = tf->tf_pc;
99ffeeb2abSMichal Meloun 	regs->r_cpsr = tf->tf_spsr;
100ffeeb2abSMichal Meloun 	return (0);
101ffeeb2abSMichal Meloun }
102352aaa51SMark Johnston 
103ffeeb2abSMichal Meloun int
fill_fpregs(struct thread * td,struct fpreg * regs)104ffeeb2abSMichal Meloun fill_fpregs(struct thread *td, struct fpreg *regs)
105ffeeb2abSMichal Meloun {
1066926e269SKornel Dulęba #ifdef VFP
1076926e269SKornel Dulęba 	struct pcb *pcb;
1086926e269SKornel Dulęba 
1096926e269SKornel Dulęba 	pcb = td->td_pcb;
1106926e269SKornel Dulęba 	if ((pcb->pcb_fpflags & PCB_FP_STARTED) != 0) {
1116926e269SKornel Dulęba 		/*
1126926e269SKornel Dulęba 		 * If we have just been running VFP instructions we will
1136926e269SKornel Dulęba 		 * need to save the state to memcpy it below.
1146926e269SKornel Dulęba 		 */
1156926e269SKornel Dulęba 		if (td == curthread)
1166926e269SKornel Dulęba 			vfp_save_state(td, pcb);
1176926e269SKornel Dulęba 	}
1186926e269SKornel Dulęba 	KASSERT(pcb->pcb_vfpsaved == &pcb->pcb_vfpstate,
1196926e269SKornel Dulęba 	    ("Called fill_fpregs while the kernel is using the VFP"));
1206926e269SKornel Dulęba 	memcpy(regs->fpr_r, pcb->pcb_vfpstate.reg,
1216926e269SKornel Dulęba 	    sizeof(regs->fpr_r));
1226926e269SKornel Dulęba 	regs->fpr_fpscr = pcb->pcb_vfpstate.fpscr;
1236926e269SKornel Dulęba #else
1246926e269SKornel Dulęba 	memset(regs, 0, sizeof(*regs));
1256926e269SKornel Dulęba #endif
126ffeeb2abSMichal Meloun 	return (0);
127ffeeb2abSMichal Meloun }
128ffeeb2abSMichal Meloun 
129ffeeb2abSMichal Meloun int
set_regs(struct thread * td,struct reg * regs)130ffeeb2abSMichal Meloun set_regs(struct thread *td, struct reg *regs)
131ffeeb2abSMichal Meloun {
132ffeeb2abSMichal Meloun 	struct trapframe *tf = td->td_frame;
133ffeeb2abSMichal Meloun 
134ffeeb2abSMichal Meloun 	bcopy(regs->r, &tf->tf_r0, sizeof(regs->r));
135ffeeb2abSMichal Meloun 	tf->tf_usr_sp = regs->r_sp;
136ffeeb2abSMichal Meloun 	tf->tf_usr_lr = regs->r_lr;
137ffeeb2abSMichal Meloun 	tf->tf_pc = regs->r_pc;
138ffeeb2abSMichal Meloun 	tf->tf_spsr &=  ~PSR_FLAGS;
139ffeeb2abSMichal Meloun 	tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS;
140ffeeb2abSMichal Meloun 	return (0);
141ffeeb2abSMichal Meloun }
142ffeeb2abSMichal Meloun 
143ffeeb2abSMichal Meloun int
set_fpregs(struct thread * td,struct fpreg * regs)144ffeeb2abSMichal Meloun set_fpregs(struct thread *td, struct fpreg *regs)
145ffeeb2abSMichal Meloun {
1466926e269SKornel Dulęba #ifdef VFP
1476926e269SKornel Dulęba 	struct pcb *pcb;
1486926e269SKornel Dulęba 
1496926e269SKornel Dulęba 	pcb = td->td_pcb;
1506926e269SKornel Dulęba 	KASSERT(pcb->pcb_vfpsaved == &pcb->pcb_vfpstate,
1516926e269SKornel Dulęba 	    ("Called set_fpregs while the kernel is using the VFP"));
1526926e269SKornel Dulęba 	memcpy(pcb->pcb_vfpstate.reg, regs->fpr_r, sizeof(regs->fpr_r));
1536926e269SKornel Dulęba 	pcb->pcb_vfpstate.fpscr = regs->fpr_fpscr;
1546926e269SKornel Dulęba #endif
155ffeeb2abSMichal Meloun 	return (0);
156ffeeb2abSMichal Meloun }
157ffeeb2abSMichal Meloun 
158ffeeb2abSMichal Meloun int
fill_dbregs(struct thread * td,struct dbreg * regs)159ffeeb2abSMichal Meloun fill_dbregs(struct thread *td, struct dbreg *regs)
160ffeeb2abSMichal Meloun {
161352aaa51SMark Johnston 
162352aaa51SMark Johnston 	bzero(regs, sizeof(*regs));
163ffeeb2abSMichal Meloun 	return (0);
164ffeeb2abSMichal Meloun }
165352aaa51SMark Johnston 
166ffeeb2abSMichal Meloun int
set_dbregs(struct thread * td,struct dbreg * regs)167ffeeb2abSMichal Meloun set_dbregs(struct thread *td, struct dbreg *regs)
168ffeeb2abSMichal Meloun {
169ffeeb2abSMichal Meloun 	return (0);
170ffeeb2abSMichal Meloun }
171