xref: /freebsd/sys/arm/arm/sys_machdep.c (revision 3025d19d)
16fc729afSOlivier Houchard /*-
26fc729afSOlivier Houchard  * Copyright (c) 1990 The Regents of the University of California.
36fc729afSOlivier Houchard  * All rights reserved.
46fc729afSOlivier Houchard  *
56fc729afSOlivier Houchard  * Redistribution and use in source and binary forms, with or without
66fc729afSOlivier Houchard  * modification, are permitted provided that the following conditions
76fc729afSOlivier Houchard  * are met:
86fc729afSOlivier Houchard  * 1. Redistributions of source code must retain the above copyright
96fc729afSOlivier Houchard  *    notice, this list of conditions and the following disclaimer.
106fc729afSOlivier Houchard  * 2. Redistributions in binary form must reproduce the above copyright
116fc729afSOlivier Houchard  *    notice, this list of conditions and the following disclaimer in the
126fc729afSOlivier Houchard  *    documentation and/or other materials provided with the distribution.
13f04f6877SWarner Losh  * 3. Neither the name of the University nor the names of its contributors
146fc729afSOlivier Houchard  *    may be used to endorse or promote products derived from this software
156fc729afSOlivier Houchard  *    without specific prior written permission.
166fc729afSOlivier Houchard  *
176fc729afSOlivier Houchard  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
186fc729afSOlivier Houchard  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
196fc729afSOlivier Houchard  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
206fc729afSOlivier Houchard  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
216fc729afSOlivier Houchard  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
226fc729afSOlivier Houchard  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
236fc729afSOlivier Houchard  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
246fc729afSOlivier Houchard  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
256fc729afSOlivier Houchard  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
266fc729afSOlivier Houchard  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
276fc729afSOlivier Houchard  * SUCH DAMAGE.
286fc729afSOlivier Houchard  *
296fc729afSOlivier Houchard  *	from: @(#)sys_machdep.c	5.5 (Berkeley) 1/19/91
306fc729afSOlivier Houchard  */
316fc729afSOlivier Houchard 
326fc729afSOlivier Houchard #include <sys/cdefs.h>
336fc729afSOlivier Houchard __FBSDID("$FreeBSD$");
346fc729afSOlivier Houchard 
3524c1c3bfSJonathan Anderson #include "opt_capsicum.h"
3674b5505eSRobert Watson 
376fc729afSOlivier Houchard #include <sys/param.h>
386fc729afSOlivier Houchard #include <sys/systm.h>
394a144410SRobert Watson #include <sys/capsicum.h>
406fc729afSOlivier Houchard #include <sys/proc.h>
416fc729afSOlivier Houchard #include <sys/sysproto.h>
426fc729afSOlivier Houchard #include <sys/syscall.h>
436fc729afSOlivier Houchard #include <sys/sysent.h>
448826d904SIan Lepore #include <vm/vm.h>
458826d904SIan Lepore #include <vm/vm_extern.h>
466fc729afSOlivier Houchard 
47173cd467SAndrew Turner #include <machine/acle-compat.h>
483025d19dSMichal Meloun #include <machine/cpu.h>
49371853e5SOlivier Houchard #include <machine/sysarch.h>
508826d904SIan Lepore #include <machine/vmparam.h>
51371853e5SOlivier Houchard 
526fc729afSOlivier Houchard #ifndef _SYS_SYSPROTO_H_
536fc729afSOlivier Houchard struct sysarch_args {
546fc729afSOlivier Houchard 	int op;
556fc729afSOlivier Houchard 	char *parms;
566fc729afSOlivier Houchard };
576fc729afSOlivier Houchard #endif
586fc729afSOlivier Houchard 
59371853e5SOlivier Houchard /* Prototypes */
60371853e5SOlivier Houchard static int arm32_sync_icache (struct thread *, void *);
61371853e5SOlivier Houchard static int arm32_drain_writebuf(struct thread *, void *);
62371853e5SOlivier Houchard 
638826d904SIan Lepore #if __ARM_ARCH >= 6
648826d904SIan Lepore static int
658826d904SIan Lepore sync_icache(uintptr_t addr, size_t len)
668826d904SIan Lepore {
678826d904SIan Lepore 	size_t size;
688826d904SIan Lepore 	vm_offset_t rv;
698826d904SIan Lepore 
708826d904SIan Lepore 	/*
718826d904SIan Lepore 	 * Align starting address to even number because value of "1"
728826d904SIan Lepore 	 * is used as return value for success.
738826d904SIan Lepore 	 */
748826d904SIan Lepore 	len += addr & 1;
758826d904SIan Lepore 	addr &= ~1;
768826d904SIan Lepore 
778826d904SIan Lepore 	/* Break whole range to pages. */
788826d904SIan Lepore 	do {
798826d904SIan Lepore 		size = PAGE_SIZE - (addr & PAGE_MASK);
808826d904SIan Lepore 		size = min(size, len);
818826d904SIan Lepore 		rv = dcache_wb_pou_checked(addr, size);
828826d904SIan Lepore 		if (rv == 1) /* see dcache_wb_pou_checked() */
838826d904SIan Lepore 			rv = icache_inv_pou_checked(addr, size);
848826d904SIan Lepore 		if (rv != 1) {
858826d904SIan Lepore 			if (!useracc((void *)addr, size, VM_PROT_READ)) {
868826d904SIan Lepore 				/* Invalid access */
878826d904SIan Lepore 				return (rv);
888826d904SIan Lepore 			}
898826d904SIan Lepore 			/* Valid but unmapped page - skip it. */
908826d904SIan Lepore 		}
918826d904SIan Lepore 		len -= size;
928826d904SIan Lepore 		addr += size;
938826d904SIan Lepore 	} while (len > 0);
948826d904SIan Lepore 
958826d904SIan Lepore 	/* Invalidate branch predictor buffer. */
968826d904SIan Lepore 	bpb_inv_all();
978826d904SIan Lepore 	return (1);
988826d904SIan Lepore }
998826d904SIan Lepore #endif
1008826d904SIan Lepore 
101371853e5SOlivier Houchard static int
102371853e5SOlivier Houchard arm32_sync_icache(struct thread *td, void *args)
103371853e5SOlivier Houchard {
104371853e5SOlivier Houchard 	struct arm_sync_icache_args ua;
105371853e5SOlivier Houchard 	int error;
1068826d904SIan Lepore 	ksiginfo_t ksi;
1078826d904SIan Lepore #if __ARM_ARCH >= 6
1088826d904SIan Lepore 	vm_offset_t rv;
1098826d904SIan Lepore #endif
110371853e5SOlivier Houchard 
111371853e5SOlivier Houchard 	if ((error = copyin(args, &ua, sizeof(ua))) != 0)
112371853e5SOlivier Houchard 		return (error);
113371853e5SOlivier Houchard 
1148826d904SIan Lepore 	if  (ua.len == 0) {
1158826d904SIan Lepore 		td->td_retval[0] = 0;
1168826d904SIan Lepore 		return (0);
1178826d904SIan Lepore 	}
1188826d904SIan Lepore 
1198826d904SIan Lepore 	/*
1208826d904SIan Lepore 	 * Validate arguments. Address and length are unsigned,
1218826d904SIan Lepore 	 * so we can use wrapped overflow check.
1228826d904SIan Lepore 	 */
1238826d904SIan Lepore 	if (((ua.addr + ua.len) < ua.addr) ||
1248826d904SIan Lepore 	    ((ua.addr + ua.len) > VM_MAXUSER_ADDRESS)) {
1258826d904SIan Lepore 		ksiginfo_init_trap(&ksi);
1268826d904SIan Lepore 		ksi.ksi_signo = SIGSEGV;
1278826d904SIan Lepore 		ksi.ksi_code = SEGV_ACCERR;
1288826d904SIan Lepore 		ksi.ksi_addr = (void *)max(ua.addr, VM_MAXUSER_ADDRESS);
1298826d904SIan Lepore 		trapsignal(td, &ksi);
1308826d904SIan Lepore 		return (EINVAL);
1318826d904SIan Lepore 	}
1328826d904SIan Lepore 
1338826d904SIan Lepore #if __ARM_ARCH >= 6
1348826d904SIan Lepore 	rv = sync_icache(ua.addr, ua.len);
1358826d904SIan Lepore 	if (rv != 1) {
1368826d904SIan Lepore 		ksiginfo_init_trap(&ksi);
1378826d904SIan Lepore 		ksi.ksi_signo = SIGSEGV;
1388826d904SIan Lepore 		ksi.ksi_code = SEGV_MAPERR;
1398826d904SIan Lepore 		ksi.ksi_addr = (void *)rv;
1408826d904SIan Lepore 		trapsignal(td, &ksi);
1418826d904SIan Lepore 		return (EINVAL);
1428826d904SIan Lepore 	}
1438826d904SIan Lepore #else
144371853e5SOlivier Houchard 	cpu_icache_sync_range(ua.addr, ua.len);
1458826d904SIan Lepore #endif
146371853e5SOlivier Houchard 
147371853e5SOlivier Houchard 	td->td_retval[0] = 0;
148371853e5SOlivier Houchard 	return (0);
149371853e5SOlivier Houchard }
150371853e5SOlivier Houchard 
151371853e5SOlivier Houchard static int
152371853e5SOlivier Houchard arm32_drain_writebuf(struct thread *td, void *args)
153371853e5SOlivier Houchard {
154371853e5SOlivier Houchard 	/* No args. */
155371853e5SOlivier Houchard 
156371853e5SOlivier Houchard 	td->td_retval[0] = 0;
157371853e5SOlivier Houchard 	cpu_drain_writebuf();
158371853e5SOlivier Houchard 	return (0);
159371853e5SOlivier Houchard }
160371853e5SOlivier Houchard 
161a74985cdSOlivier Houchard static int
162a74985cdSOlivier Houchard arm32_set_tp(struct thread *td, void *args)
163a74985cdSOlivier Houchard {
164a74985cdSOlivier Houchard 
165ae5b8077SWarner Losh 	td->td_md.md_tp = (register_t)args;
166173cd467SAndrew Turner #if __ARM_ARCH >= 6
167cf1a573fSOleksandr Tymoshenko 	set_tls(args);
168cf1a573fSOleksandr Tymoshenko #else
169cf1a573fSOleksandr Tymoshenko 	*(register_t *)ARM_TP_ADDRESS = (register_t)args;
170cf1a573fSOleksandr Tymoshenko #endif
171a74985cdSOlivier Houchard 	return (0);
172a74985cdSOlivier Houchard }
173a74985cdSOlivier Houchard 
174a74985cdSOlivier Houchard static int
175a74985cdSOlivier Houchard arm32_get_tp(struct thread *td, void *args)
176a74985cdSOlivier Houchard {
177a74985cdSOlivier Houchard 
178173cd467SAndrew Turner #if __ARM_ARCH >= 6
1792647339fSIan Lepore 	td->td_retval[0] = td->td_md.md_tp;
180cf1a573fSOleksandr Tymoshenko #else
181cf1a573fSOleksandr Tymoshenko 	td->td_retval[0] = *(register_t *)ARM_TP_ADDRESS;
182cf1a573fSOleksandr Tymoshenko #endif
183a74985cdSOlivier Houchard 	return (0);
184a74985cdSOlivier Houchard }
185a74985cdSOlivier Houchard 
1866fc729afSOlivier Houchard int
1876fc729afSOlivier Houchard sysarch(td, uap)
1886fc729afSOlivier Houchard 	struct thread *td;
1896fc729afSOlivier Houchard 	register struct sysarch_args *uap;
1906fc729afSOlivier Houchard {
191371853e5SOlivier Houchard 	int error;
192371853e5SOlivier Houchard 
19324c1c3bfSJonathan Anderson #ifdef CAPABILITY_MODE
19474b5505eSRobert Watson 	/*
19512bc222eSJonathan Anderson 	 * When adding new operations, add a new case statement here to
19612bc222eSJonathan Anderson 	 * explicitly indicate whether or not the operation is safe to
19712bc222eSJonathan Anderson 	 * perform in capability mode.
19874b5505eSRobert Watson 	 */
19974b5505eSRobert Watson 	if (IN_CAPABILITY_MODE(td)) {
20074b5505eSRobert Watson 		switch (uap->op) {
20174b5505eSRobert Watson 		case ARM_SYNC_ICACHE:
20274b5505eSRobert Watson 		case ARM_DRAIN_WRITEBUF:
20374b5505eSRobert Watson 		case ARM_SET_TP:
20474b5505eSRobert Watson 		case ARM_GET_TP:
20574b5505eSRobert Watson 			break;
20674b5505eSRobert Watson 
20774b5505eSRobert Watson 		default:
208a417d4a4SDag-Erling Smørgrav #ifdef KTRACE
209a417d4a4SDag-Erling Smørgrav 			if (KTRPOINT(td, KTR_CAPFAIL))
2103fded357SPawel Jakub Dawidek 				ktrcapfail(CAPFAIL_SYSCALL, NULL, NULL);
211a417d4a4SDag-Erling Smørgrav #endif
21274b5505eSRobert Watson 			return (ECAPMODE);
21374b5505eSRobert Watson 		}
21474b5505eSRobert Watson 	}
21574b5505eSRobert Watson #endif
21674b5505eSRobert Watson 
217371853e5SOlivier Houchard 	switch (uap->op) {
218371853e5SOlivier Houchard 	case ARM_SYNC_ICACHE:
219371853e5SOlivier Houchard 		error = arm32_sync_icache(td, uap->parms);
220371853e5SOlivier Houchard 		break;
221371853e5SOlivier Houchard 	case ARM_DRAIN_WRITEBUF:
222371853e5SOlivier Houchard 		error = arm32_drain_writebuf(td, uap->parms);
223371853e5SOlivier Houchard 		break;
224a74985cdSOlivier Houchard 	case ARM_SET_TP:
225a74985cdSOlivier Houchard 		error = arm32_set_tp(td, uap->parms);
226a74985cdSOlivier Houchard 		break;
227a74985cdSOlivier Houchard 	case ARM_GET_TP:
228a74985cdSOlivier Houchard 		error = arm32_get_tp(td, uap->parms);
229a74985cdSOlivier Houchard 		break;
230371853e5SOlivier Houchard 	default:
231371853e5SOlivier Houchard 		error = EINVAL;
232371853e5SOlivier Houchard 		break;
233371853e5SOlivier Houchard 	}
234371853e5SOlivier Houchard 	return (error);
2356fc729afSOlivier Houchard }
236