16fc729afSOlivier Houchard /*- 251369649SPedro F. Giffuni * SPDX-License-Identifier: BSD-3-Clause 351369649SPedro F. Giffuni * 46fc729afSOlivier Houchard * Copyright (c) 1990 The Regents of the University of California. 56fc729afSOlivier Houchard * All rights reserved. 66fc729afSOlivier Houchard * 76fc729afSOlivier Houchard * Redistribution and use in source and binary forms, with or without 86fc729afSOlivier Houchard * modification, are permitted provided that the following conditions 96fc729afSOlivier Houchard * are met: 106fc729afSOlivier Houchard * 1. Redistributions of source code must retain the above copyright 116fc729afSOlivier Houchard * notice, this list of conditions and the following disclaimer. 126fc729afSOlivier Houchard * 2. Redistributions in binary form must reproduce the above copyright 136fc729afSOlivier Houchard * notice, this list of conditions and the following disclaimer in the 146fc729afSOlivier Houchard * documentation and/or other materials provided with the distribution. 15f04f6877SWarner Losh * 3. Neither the name of the University nor the names of its contributors 166fc729afSOlivier Houchard * may be used to endorse or promote products derived from this software 176fc729afSOlivier Houchard * without specific prior written permission. 186fc729afSOlivier Houchard * 196fc729afSOlivier Houchard * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 206fc729afSOlivier Houchard * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 216fc729afSOlivier Houchard * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 226fc729afSOlivier Houchard * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 236fc729afSOlivier Houchard * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 246fc729afSOlivier Houchard * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 256fc729afSOlivier Houchard * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 266fc729afSOlivier Houchard * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 276fc729afSOlivier Houchard * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 286fc729afSOlivier Houchard * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 296fc729afSOlivier Houchard * SUCH DAMAGE. 306fc729afSOlivier Houchard * 316fc729afSOlivier Houchard * from: @(#)sys_machdep.c 5.5 (Berkeley) 1/19/91 326fc729afSOlivier Houchard */ 336fc729afSOlivier Houchard 346fc729afSOlivier Houchard #include <sys/cdefs.h> 356fc729afSOlivier Houchard __FBSDID("$FreeBSD$"); 366fc729afSOlivier Houchard 3724c1c3bfSJonathan Anderson #include "opt_capsicum.h" 3874b5505eSRobert Watson 396fc729afSOlivier Houchard #include <sys/param.h> 406fc729afSOlivier Houchard #include <sys/systm.h> 414a144410SRobert Watson #include <sys/capsicum.h> 426fc729afSOlivier Houchard #include <sys/proc.h> 436fc729afSOlivier Houchard #include <sys/sysproto.h> 446fc729afSOlivier Houchard #include <sys/syscall.h> 456fc729afSOlivier Houchard #include <sys/sysent.h> 468826d904SIan Lepore #include <vm/vm.h> 478826d904SIan Lepore #include <vm/vm_extern.h> 486fc729afSOlivier Houchard 493025d19dSMichal Meloun #include <machine/cpu.h> 50371853e5SOlivier Houchard #include <machine/sysarch.h> 51a86d7982SMichal Meloun #include <machine/machdep.h> 528826d904SIan Lepore #include <machine/vmparam.h> 53371853e5SOlivier Houchard 546fc729afSOlivier Houchard #ifndef _SYS_SYSPROTO_H_ 556fc729afSOlivier Houchard struct sysarch_args { 566fc729afSOlivier Houchard int op; 576fc729afSOlivier Houchard char *parms; 586fc729afSOlivier Houchard }; 596fc729afSOlivier Houchard #endif 606fc729afSOlivier Houchard 61371853e5SOlivier Houchard /* Prototypes */ 62371853e5SOlivier Houchard static int arm32_sync_icache (struct thread *, void *); 63371853e5SOlivier Houchard static int arm32_drain_writebuf(struct thread *, void *); 64371853e5SOlivier Houchard 658826d904SIan Lepore static int 668826d904SIan Lepore sync_icache(uintptr_t addr, size_t len) 678826d904SIan Lepore { 688826d904SIan Lepore size_t size; 698826d904SIan Lepore vm_offset_t rv; 708826d904SIan Lepore 71ec090f4aSMichal Meloun /* Align starting address to cacheline size */ 72ec090f4aSMichal Meloun len += addr & cpuinfo.dcache_line_mask; 73ec090f4aSMichal Meloun addr &= ~cpuinfo.dcache_line_mask; 748826d904SIan Lepore 758826d904SIan Lepore /* Break whole range to pages. */ 768826d904SIan Lepore do { 778826d904SIan Lepore size = PAGE_SIZE - (addr & PAGE_MASK); 788826d904SIan Lepore size = min(size, len); 798826d904SIan Lepore rv = dcache_wb_pou_checked(addr, size); 808826d904SIan Lepore if (rv == 1) /* see dcache_wb_pou_checked() */ 818826d904SIan Lepore rv = icache_inv_pou_checked(addr, size); 828826d904SIan Lepore if (rv != 1) { 838826d904SIan Lepore if (!useracc((void *)addr, size, VM_PROT_READ)) { 848826d904SIan Lepore /* Invalid access */ 858826d904SIan Lepore return (rv); 868826d904SIan Lepore } 878826d904SIan Lepore /* Valid but unmapped page - skip it. */ 888826d904SIan Lepore } 898826d904SIan Lepore len -= size; 908826d904SIan Lepore addr += size; 918826d904SIan Lepore } while (len > 0); 928826d904SIan Lepore 938826d904SIan Lepore /* Invalidate branch predictor buffer. */ 948826d904SIan Lepore bpb_inv_all(); 958826d904SIan Lepore return (1); 968826d904SIan Lepore } 978826d904SIan Lepore 98371853e5SOlivier Houchard static int 99371853e5SOlivier Houchard arm32_sync_icache(struct thread *td, void *args) 100371853e5SOlivier Houchard { 101371853e5SOlivier Houchard struct arm_sync_icache_args ua; 102371853e5SOlivier Houchard int error; 1038826d904SIan Lepore ksiginfo_t ksi; 1048826d904SIan Lepore vm_offset_t rv; 105371853e5SOlivier Houchard 106371853e5SOlivier Houchard if ((error = copyin(args, &ua, sizeof(ua))) != 0) 107371853e5SOlivier Houchard return (error); 108371853e5SOlivier Houchard 1098826d904SIan Lepore if (ua.len == 0) { 1108826d904SIan Lepore td->td_retval[0] = 0; 1118826d904SIan Lepore return (0); 1128826d904SIan Lepore } 1138826d904SIan Lepore 1148826d904SIan Lepore /* 1158826d904SIan Lepore * Validate arguments. Address and length are unsigned, 1168826d904SIan Lepore * so we can use wrapped overflow check. 1178826d904SIan Lepore */ 1188826d904SIan Lepore if (((ua.addr + ua.len) < ua.addr) || 1198826d904SIan Lepore ((ua.addr + ua.len) > VM_MAXUSER_ADDRESS)) { 1208826d904SIan Lepore ksiginfo_init_trap(&ksi); 1218826d904SIan Lepore ksi.ksi_signo = SIGSEGV; 1228826d904SIan Lepore ksi.ksi_code = SEGV_ACCERR; 1238826d904SIan Lepore ksi.ksi_addr = (void *)max(ua.addr, VM_MAXUSER_ADDRESS); 1248826d904SIan Lepore trapsignal(td, &ksi); 1258826d904SIan Lepore return (EINVAL); 1268826d904SIan Lepore } 1278826d904SIan Lepore 1288826d904SIan Lepore rv = sync_icache(ua.addr, ua.len); 1298826d904SIan Lepore if (rv != 1) { 1308826d904SIan Lepore ksiginfo_init_trap(&ksi); 1318826d904SIan Lepore ksi.ksi_signo = SIGSEGV; 1328826d904SIan Lepore ksi.ksi_code = SEGV_MAPERR; 1338826d904SIan Lepore ksi.ksi_addr = (void *)rv; 1348826d904SIan Lepore trapsignal(td, &ksi); 1358826d904SIan Lepore return (EINVAL); 1368826d904SIan Lepore } 137371853e5SOlivier Houchard 138371853e5SOlivier Houchard td->td_retval[0] = 0; 139371853e5SOlivier Houchard return (0); 140371853e5SOlivier Houchard } 141371853e5SOlivier Houchard 142371853e5SOlivier Houchard static int 143371853e5SOlivier Houchard arm32_drain_writebuf(struct thread *td, void *args) 144371853e5SOlivier Houchard { 145371853e5SOlivier Houchard /* No args. */ 146371853e5SOlivier Houchard 147a89156f5SMichal Meloun dsb(); 148a89156f5SMichal Meloun cpu_l2cache_drain_writebuf(); 149a89156f5SMichal Meloun td->td_retval[0] = 0; 150371853e5SOlivier Houchard return (0); 151371853e5SOlivier Houchard } 152371853e5SOlivier Houchard 153a74985cdSOlivier Houchard static int 154a74985cdSOlivier Houchard arm32_set_tp(struct thread *td, void *args) 155a74985cdSOlivier Houchard { 156a74985cdSOlivier Houchard 157cf1a573fSOleksandr Tymoshenko set_tls(args); 158a74985cdSOlivier Houchard return (0); 159a74985cdSOlivier Houchard } 160a74985cdSOlivier Houchard 161a74985cdSOlivier Houchard static int 162a74985cdSOlivier Houchard arm32_get_tp(struct thread *td, void *args) 163a74985cdSOlivier Houchard { 164a74985cdSOlivier Houchard 165fa878ec3SEd Schouten td->td_retval[0] = (register_t)get_tls(); 166a74985cdSOlivier Houchard return (0); 167a74985cdSOlivier Houchard } 168a74985cdSOlivier Houchard 1696fc729afSOlivier Houchard int 1703e85b721SEd Maste sysarch(struct thread *td, struct sysarch_args *uap) 1716fc729afSOlivier Houchard { 172371853e5SOlivier Houchard int error; 173371853e5SOlivier Houchard 17424c1c3bfSJonathan Anderson #ifdef CAPABILITY_MODE 17574b5505eSRobert Watson /* 17612bc222eSJonathan Anderson * When adding new operations, add a new case statement here to 17712bc222eSJonathan Anderson * explicitly indicate whether or not the operation is safe to 17812bc222eSJonathan Anderson * perform in capability mode. 17974b5505eSRobert Watson */ 18074b5505eSRobert Watson if (IN_CAPABILITY_MODE(td)) { 18174b5505eSRobert Watson switch (uap->op) { 18274b5505eSRobert Watson case ARM_SYNC_ICACHE: 18374b5505eSRobert Watson case ARM_DRAIN_WRITEBUF: 18474b5505eSRobert Watson case ARM_SET_TP: 18574b5505eSRobert Watson case ARM_GET_TP: 186a86d7982SMichal Meloun case ARM_GET_VFPSTATE: 18774b5505eSRobert Watson break; 18874b5505eSRobert Watson 18974b5505eSRobert Watson default: 190a417d4a4SDag-Erling Smørgrav #ifdef KTRACE 191a417d4a4SDag-Erling Smørgrav if (KTRPOINT(td, KTR_CAPFAIL)) 1923fded357SPawel Jakub Dawidek ktrcapfail(CAPFAIL_SYSCALL, NULL, NULL); 193a417d4a4SDag-Erling Smørgrav #endif 19474b5505eSRobert Watson return (ECAPMODE); 19574b5505eSRobert Watson } 19674b5505eSRobert Watson } 19774b5505eSRobert Watson #endif 19874b5505eSRobert Watson 199371853e5SOlivier Houchard switch (uap->op) { 200371853e5SOlivier Houchard case ARM_SYNC_ICACHE: 201371853e5SOlivier Houchard error = arm32_sync_icache(td, uap->parms); 202371853e5SOlivier Houchard break; 203371853e5SOlivier Houchard case ARM_DRAIN_WRITEBUF: 204371853e5SOlivier Houchard error = arm32_drain_writebuf(td, uap->parms); 205371853e5SOlivier Houchard break; 206a74985cdSOlivier Houchard case ARM_SET_TP: 207a74985cdSOlivier Houchard error = arm32_set_tp(td, uap->parms); 208a74985cdSOlivier Houchard break; 209a74985cdSOlivier Houchard case ARM_GET_TP: 210a74985cdSOlivier Houchard error = arm32_get_tp(td, uap->parms); 211a74985cdSOlivier Houchard break; 212a86d7982SMichal Meloun case ARM_GET_VFPSTATE: 213a86d7982SMichal Meloun error = arm_get_vfpstate(td, uap->parms); 214a86d7982SMichal Meloun break; 215371853e5SOlivier Houchard default: 216371853e5SOlivier Houchard error = EINVAL; 217371853e5SOlivier Houchard break; 218371853e5SOlivier Houchard } 219371853e5SOlivier Houchard return (error); 2206fc729afSOlivier Houchard } 221