1 /* $NetBSD: undefined.c,v 1.22 2003/11/29 22:21:29 bjh21 Exp $ */ 2 3 /*- 4 * SPDX-License-Identifier: BSD-4-Clause 5 * 6 * Copyright (c) 2001 Ben Harris. 7 * Copyright (c) 1995 Mark Brinicombe. 8 * Copyright (c) 1995 Brini. 9 * All rights reserved. 10 * 11 * This code is derived from software written for Brini by Mark Brinicombe 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by Brini. 24 * 4. The name of the company nor the name of the author may be used to 25 * endorse or promote products derived from this software without specific 26 * prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 30 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 32 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 33 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * RiscBSD kernel project 41 * 42 * undefined.c 43 * 44 * Fault handler 45 * 46 * Created : 06/01/95 47 */ 48 49 #include "opt_ddb.h" 50 51 #include <sys/param.h> 52 #include <sys/malloc.h> 53 #include <sys/queue.h> 54 #include <sys/signal.h> 55 #include <sys/systm.h> 56 #include <sys/proc.h> 57 #include <sys/syslog.h> 58 #include <sys/vmmeter.h> 59 #include <sys/lock.h> 60 #include <sys/mutex.h> 61 #include <sys/signalvar.h> 62 #include <sys/ptrace.h> 63 #include <sys/vmmeter.h> 64 #ifdef KDB 65 #include <sys/kdb.h> 66 #endif 67 68 #include <vm/vm.h> 69 #include <vm/vm_extern.h> 70 71 #include <machine/armreg.h> 72 #include <machine/asm.h> 73 #include <machine/cpu.h> 74 #include <machine/frame.h> 75 #include <machine/undefined.h> 76 #include <machine/trap.h> 77 78 #include <machine/disassem.h> 79 80 #ifdef DDB 81 #include <ddb/db_output.h> 82 #endif 83 84 #ifdef KDB 85 #include <machine/db_machdep.h> 86 #endif 87 88 #define ARM_COPROC_INSN(insn) (((insn) & (1 << 27)) != 0) 89 #define ARM_VFP_INSN(insn) ((((insn) & 0xfe000000) == 0xf2000000) || \ 90 (((insn) & 0xff100000) == 0xf4000000)) 91 #define ARM_COPROC(insn) (((insn) >> 8) & 0xf) 92 93 #define THUMB_32BIT_INSN(insn) ((((insn) & 0xe000) == 0xe000) && \ 94 (((insn) & 0x1800) != 0)) 95 /* 96 * Coprocessor, Advanced SIMD, and 97 * Floating-point instructions on page A6-251 98 * OP1 == 01 OR 11 99 * OP2 == 1xxxxxx 100 */ 101 #define THUMB_COPROC_INSN(insn) (((insn) & (3 << 26)) == (3 << 26)) 102 /* 103 * Advanced SIMD element or structure 104 * load/store instructions on page A7-275 105 * OP1 == 11 106 * OP2 == 001xxx0 107 */ 108 #define THUMB_VFP_INSN(insn) (((insn) & (0x1F1 << 20)) == (0x190 << 20)) 109 #define THUMB_COPROC(insn) (((insn) >> 8) & 0xf) 110 111 #define COPROC_VFP 10 112 113 static int gdb_trapper(u_int, u_int, struct trapframe *, int); 114 115 LIST_HEAD(, undefined_handler) undefined_handlers[MAX_COPROCS]; 116 117 void * 118 install_coproc_handler(int coproc, undef_handler_t handler) 119 { 120 struct undefined_handler *uh; 121 122 KASSERT(coproc >= 0 && coproc < MAX_COPROCS, ("bad coproc")); 123 KASSERT(handler != NULL, ("handler is NULL")); /* Used to be legal. */ 124 125 /* XXX: M_TEMP??? */ 126 uh = malloc(sizeof(*uh), M_TEMP, M_WAITOK); 127 uh->uh_handler = handler; 128 install_coproc_handler_static(coproc, uh); 129 return uh; 130 } 131 132 void 133 install_coproc_handler_static(int coproc, struct undefined_handler *uh) 134 { 135 136 LIST_INSERT_HEAD(&undefined_handlers[coproc], uh, uh_link); 137 } 138 139 void 140 remove_coproc_handler(void *cookie) 141 { 142 struct undefined_handler *uh = cookie; 143 144 LIST_REMOVE(uh, uh_link); 145 free(uh, M_TEMP); 146 } 147 148 static int 149 gdb_trapper(u_int addr, u_int insn, struct trapframe *frame, int code) 150 { 151 struct thread *td; 152 ksiginfo_t ksi; 153 int error; 154 155 td = (curthread == NULL) ? &thread0 : curthread; 156 157 if (insn == GDB_BREAKPOINT || insn == GDB5_BREAKPOINT) { 158 if (code == FAULT_USER) { 159 ksiginfo_init_trap(&ksi); 160 ksi.ksi_signo = SIGTRAP; 161 ksi.ksi_code = TRAP_BRKPT; 162 ksi.ksi_addr = (u_int32_t *)addr; 163 trapsignal(td, &ksi); 164 return 0; 165 } 166 #if 0 167 #ifdef KGDB 168 return !kgdb_trap(T_BREAKPOINT, frame); 169 #endif 170 #endif 171 } 172 173 if (code == FAULT_USER) { 174 /* TODO: No support for ptrace from Thumb-2 */ 175 if ((frame->tf_spsr & PSR_T) == 0 && 176 insn == PTRACE_BREAKPOINT) { 177 PROC_LOCK(td->td_proc); 178 _PHOLD(td->td_proc); 179 error = ptrace_clear_single_step(td); 180 _PRELE(td->td_proc); 181 PROC_UNLOCK(td->td_proc); 182 if (error == 0) { 183 ksiginfo_init_trap(&ksi); 184 ksi.ksi_signo = SIGTRAP; 185 ksi.ksi_code = TRAP_TRACE; 186 ksi.ksi_addr = (u_int32_t *)addr; 187 trapsignal(td, &ksi); 188 return (0); 189 } 190 } 191 } 192 193 return 1; 194 } 195 196 static struct undefined_handler gdb_uh; 197 198 void 199 undefined_init(void) 200 { 201 int loop; 202 203 /* Not actually necessary -- the initialiser is just NULL */ 204 for (loop = 0; loop < MAX_COPROCS; ++loop) 205 LIST_INIT(&undefined_handlers[loop]); 206 207 /* Install handler for GDB breakpoints */ 208 gdb_uh.uh_handler = gdb_trapper; 209 install_coproc_handler_static(0, &gdb_uh); 210 } 211 212 void 213 undefinedinstruction(struct trapframe *frame) 214 { 215 struct thread *td; 216 u_int fault_pc; 217 int fault_instruction; 218 int fault_code; 219 int coprocessor; 220 struct undefined_handler *uh; 221 #ifdef VERBOSE_ARM32 222 int s; 223 #endif 224 ksiginfo_t ksi; 225 226 /* Enable interrupts if they were enabled before the exception. */ 227 if (__predict_true(frame->tf_spsr & PSR_I) == 0) 228 enable_interrupts(PSR_I); 229 if (__predict_true(frame->tf_spsr & PSR_F) == 0) 230 enable_interrupts(PSR_F); 231 232 VM_CNT_INC(v_trap); 233 234 fault_pc = frame->tf_pc; 235 236 /* 237 * Get the current thread/proc structure or thread0/proc0 if there is 238 * none. 239 */ 240 td = curthread == NULL ? &thread0 : curthread; 241 242 coprocessor = 0; 243 if ((frame->tf_spsr & PSR_T) == 0) { 244 /* 245 * Make sure the program counter is correctly aligned so we 246 * don't take an alignment fault trying to read the opcode. 247 */ 248 if (__predict_false((fault_pc & 3) != 0)) { 249 ksiginfo_init_trap(&ksi); 250 ksi.ksi_signo = SIGILL; 251 ksi.ksi_code = ILL_ILLADR; 252 ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc; 253 trapsignal(td, &ksi); 254 userret(td, frame); 255 return; 256 } 257 258 /* 259 * Should use fuword() here .. but in the interests of 260 * squeezing every bit of speed we will just use ReadWord(). 261 * We know the instruction can be read as was just executed 262 * so this will never fail unless the kernel is screwed up 263 * in which case it does not really matter does it ? 264 */ 265 266 fault_instruction = *(u_int32_t *)fault_pc; 267 268 /* Check for coprocessor instruction */ 269 270 /* 271 * According to the datasheets you only need to look at bit 272 * 27 of the instruction to tell the difference between and 273 * undefined instruction and a coprocessor instruction 274 * following an undefined instruction trap. 275 */ 276 277 if (ARM_COPROC_INSN(fault_instruction)) 278 coprocessor = ARM_COPROC(fault_instruction); 279 else { /* check for special instructions */ 280 if (ARM_VFP_INSN(fault_instruction)) 281 coprocessor = COPROC_VFP; /* vfp / simd */ 282 } 283 } else { 284 #if __ARM_ARCH >= 7 285 fault_instruction = *(uint16_t *)fault_pc; 286 if (THUMB_32BIT_INSN(fault_instruction)) { 287 fault_instruction <<= 16; 288 fault_instruction |= *(uint16_t *)(fault_pc + 2); 289 290 /* Coprocessor, Advanced SIMD and Floating-point */ 291 if (THUMB_COPROC_INSN(fault_instruction)) 292 coprocessor = THUMB_COPROC(fault_instruction); 293 else { 294 /* Advanced SIMD load/store */ 295 if (THUMB_VFP_INSN(fault_instruction)) 296 coprocessor = COPROC_VFP; /* SIMD */ 297 } 298 } 299 #else 300 /* 301 * No support for Thumb-2 on this cpu 302 */ 303 ksiginfo_init_trap(&ksi); 304 ksi.ksi_signo = SIGILL; 305 ksi.ksi_code = ILL_ILLADR; 306 ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc; 307 trapsignal(td, &ksi); 308 userret(td, frame); 309 return; 310 #endif 311 } 312 313 if ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE) { 314 /* 315 * Modify the fault_code to reflect the USR/SVC state at 316 * time of fault. 317 */ 318 fault_code = FAULT_USER; 319 td->td_frame = frame; 320 } else 321 fault_code = 0; 322 323 /* OK this is were we do something about the instruction. */ 324 LIST_FOREACH(uh, &undefined_handlers[coprocessor], uh_link) 325 if (uh->uh_handler(fault_pc, fault_instruction, frame, 326 fault_code) == 0) 327 break; 328 329 if (uh == NULL && (fault_code & FAULT_USER)) { 330 /* Fault has not been handled */ 331 ksiginfo_init_trap(&ksi); 332 ksi.ksi_signo = SIGILL; 333 ksi.ksi_code = ILL_ILLOPC; 334 ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc; 335 trapsignal(td, &ksi); 336 } 337 338 if ((fault_code & FAULT_USER) == 0) { 339 if (fault_instruction == KERNEL_BREAKPOINT) { 340 #ifdef KDB 341 kdb_trap(T_BREAKPOINT, 0, frame); 342 #else 343 printf("No debugger in kernel.\n"); 344 #endif 345 return; 346 } 347 else 348 panic("Undefined instruction in kernel (0x%08x).\n", 349 fault_instruction); 350 } 351 352 userret(td, frame); 353 } 354