1 /* $NetBSD: undefined.c,v 1.22 2003/11/29 22:21:29 bjh21 Exp $ */ 2 3 /*- 4 * SPDX-License-Identifier: BSD-4-Clause 5 * 6 * Copyright (c) 2001 Ben Harris. 7 * Copyright (c) 1995 Mark Brinicombe. 8 * Copyright (c) 1995 Brini. 9 * All rights reserved. 10 * 11 * This code is derived from software written for Brini by Mark Brinicombe 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by Brini. 24 * 4. The name of the company nor the name of the author may be used to 25 * endorse or promote products derived from this software without specific 26 * prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 30 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 32 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 33 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * RiscBSD kernel project 41 * 42 * undefined.c 43 * 44 * Fault handler 45 * 46 * Created : 06/01/95 47 */ 48 49 #include "opt_ddb.h" 50 51 #include <sys/cdefs.h> 52 #include <sys/param.h> 53 #include <sys/malloc.h> 54 #include <sys/queue.h> 55 #include <sys/signal.h> 56 #include <sys/systm.h> 57 #include <sys/proc.h> 58 #include <sys/syslog.h> 59 #include <sys/vmmeter.h> 60 #include <sys/lock.h> 61 #include <sys/mutex.h> 62 #include <sys/signalvar.h> 63 #include <sys/ptrace.h> 64 #include <sys/vmmeter.h> 65 #ifdef KDB 66 #include <sys/kdb.h> 67 #endif 68 69 #include <vm/vm.h> 70 #include <vm/vm_extern.h> 71 72 #include <machine/armreg.h> 73 #include <machine/asm.h> 74 #include <machine/cpu.h> 75 #include <machine/frame.h> 76 #include <machine/undefined.h> 77 #include <machine/trap.h> 78 79 #include <machine/disassem.h> 80 81 #ifdef DDB 82 #include <ddb/db_output.h> 83 #endif 84 85 #ifdef KDB 86 #include <machine/db_machdep.h> 87 #endif 88 89 #define ARM_COPROC_INSN(insn) (((insn) & (1 << 27)) != 0) 90 #define ARM_VFP_INSN(insn) ((((insn) & 0xfe000000) == 0xf2000000) || \ 91 (((insn) & 0xff100000) == 0xf4000000)) 92 #define ARM_COPROC(insn) (((insn) >> 8) & 0xf) 93 94 #define THUMB_32BIT_INSN(insn) ((((insn) & 0xe000) == 0xe000) && \ 95 (((insn) & 0x1800) != 0)) 96 /* 97 * Coprocessor, Advanced SIMD, and 98 * Floating-point instructions on page A6-251 99 * OP1 == 01 OR 11 100 * OP2 == 1xxxxxx 101 */ 102 #define THUMB_COPROC_INSN(insn) (((insn) & (3 << 26)) == (3 << 26)) 103 /* 104 * Advanced SIMD element or structure 105 * load/store instructions on page A7-275 106 * OP1 == 11 107 * OP2 == 001xxx0 108 */ 109 #define THUMB_VFP_INSN(insn) (((insn) & (0x1F1 << 20)) == (0x190 << 20)) 110 #define THUMB_COPROC(insn) (((insn) >> 8) & 0xf) 111 112 #define COPROC_VFP 10 113 114 static int gdb_trapper(u_int, u_int, struct trapframe *, int); 115 116 LIST_HEAD(, undefined_handler) undefined_handlers[MAX_COPROCS]; 117 118 void * 119 install_coproc_handler(int coproc, undef_handler_t handler) 120 { 121 struct undefined_handler *uh; 122 123 KASSERT(coproc >= 0 && coproc < MAX_COPROCS, ("bad coproc")); 124 KASSERT(handler != NULL, ("handler is NULL")); /* Used to be legal. */ 125 126 /* XXX: M_TEMP??? */ 127 uh = malloc(sizeof(*uh), M_TEMP, M_WAITOK); 128 uh->uh_handler = handler; 129 install_coproc_handler_static(coproc, uh); 130 return uh; 131 } 132 133 void 134 install_coproc_handler_static(int coproc, struct undefined_handler *uh) 135 { 136 137 LIST_INSERT_HEAD(&undefined_handlers[coproc], uh, uh_link); 138 } 139 140 void 141 remove_coproc_handler(void *cookie) 142 { 143 struct undefined_handler *uh = cookie; 144 145 LIST_REMOVE(uh, uh_link); 146 free(uh, M_TEMP); 147 } 148 149 static int 150 gdb_trapper(u_int addr, u_int insn, struct trapframe *frame, int code) 151 { 152 struct thread *td; 153 ksiginfo_t ksi; 154 int error; 155 156 td = (curthread == NULL) ? &thread0 : curthread; 157 158 if (insn == GDB_BREAKPOINT || insn == GDB5_BREAKPOINT) { 159 if (code == FAULT_USER) { 160 ksiginfo_init_trap(&ksi); 161 ksi.ksi_signo = SIGTRAP; 162 ksi.ksi_code = TRAP_BRKPT; 163 ksi.ksi_addr = (u_int32_t *)addr; 164 trapsignal(td, &ksi); 165 return 0; 166 } 167 #if 0 168 #ifdef KGDB 169 return !kgdb_trap(T_BREAKPOINT, frame); 170 #endif 171 #endif 172 } 173 174 if (code == FAULT_USER) { 175 /* TODO: No support for ptrace from Thumb-2 */ 176 if ((frame->tf_spsr & PSR_T) == 0 && 177 insn == PTRACE_BREAKPOINT) { 178 PROC_LOCK(td->td_proc); 179 _PHOLD(td->td_proc); 180 error = ptrace_clear_single_step(td); 181 _PRELE(td->td_proc); 182 PROC_UNLOCK(td->td_proc); 183 if (error == 0) { 184 ksiginfo_init_trap(&ksi); 185 ksi.ksi_signo = SIGTRAP; 186 ksi.ksi_code = TRAP_TRACE; 187 ksi.ksi_addr = (u_int32_t *)addr; 188 trapsignal(td, &ksi); 189 return (0); 190 } 191 } 192 } 193 194 return 1; 195 } 196 197 static struct undefined_handler gdb_uh; 198 199 void 200 undefined_init(void) 201 { 202 int loop; 203 204 /* Not actually necessary -- the initialiser is just NULL */ 205 for (loop = 0; loop < MAX_COPROCS; ++loop) 206 LIST_INIT(&undefined_handlers[loop]); 207 208 /* Install handler for GDB breakpoints */ 209 gdb_uh.uh_handler = gdb_trapper; 210 install_coproc_handler_static(0, &gdb_uh); 211 } 212 213 void 214 undefinedinstruction(struct trapframe *frame) 215 { 216 struct thread *td; 217 u_int fault_pc; 218 int fault_instruction; 219 int fault_code; 220 int coprocessor; 221 struct undefined_handler *uh; 222 #ifdef VERBOSE_ARM32 223 int s; 224 #endif 225 ksiginfo_t ksi; 226 227 /* Enable interrupts if they were enabled before the exception. */ 228 if (__predict_true(frame->tf_spsr & PSR_I) == 0) 229 enable_interrupts(PSR_I); 230 if (__predict_true(frame->tf_spsr & PSR_F) == 0) 231 enable_interrupts(PSR_F); 232 233 VM_CNT_INC(v_trap); 234 235 fault_pc = frame->tf_pc; 236 237 /* 238 * Get the current thread/proc structure or thread0/proc0 if there is 239 * none. 240 */ 241 td = curthread == NULL ? &thread0 : curthread; 242 243 coprocessor = 0; 244 if ((frame->tf_spsr & PSR_T) == 0) { 245 /* 246 * Make sure the program counter is correctly aligned so we 247 * don't take an alignment fault trying to read the opcode. 248 */ 249 if (__predict_false((fault_pc & 3) != 0)) { 250 ksiginfo_init_trap(&ksi); 251 ksi.ksi_signo = SIGILL; 252 ksi.ksi_code = ILL_ILLADR; 253 ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc; 254 trapsignal(td, &ksi); 255 userret(td, frame); 256 return; 257 } 258 259 /* 260 * Should use fuword() here .. but in the interests of 261 * squeezing every bit of speed we will just use ReadWord(). 262 * We know the instruction can be read as was just executed 263 * so this will never fail unless the kernel is screwed up 264 * in which case it does not really matter does it ? 265 */ 266 267 fault_instruction = *(u_int32_t *)fault_pc; 268 269 /* Check for coprocessor instruction */ 270 271 /* 272 * According to the datasheets you only need to look at bit 273 * 27 of the instruction to tell the difference between and 274 * undefined instruction and a coprocessor instruction 275 * following an undefined instruction trap. 276 */ 277 278 if (ARM_COPROC_INSN(fault_instruction)) 279 coprocessor = ARM_COPROC(fault_instruction); 280 else { /* check for special instructions */ 281 if (ARM_VFP_INSN(fault_instruction)) 282 coprocessor = COPROC_VFP; /* vfp / simd */ 283 } 284 } else { 285 #if __ARM_ARCH >= 7 286 fault_instruction = *(uint16_t *)fault_pc; 287 if (THUMB_32BIT_INSN(fault_instruction)) { 288 fault_instruction <<= 16; 289 fault_instruction |= *(uint16_t *)(fault_pc + 2); 290 291 /* Coprocessor, Advanced SIMD and Floating-point */ 292 if (THUMB_COPROC_INSN(fault_instruction)) 293 coprocessor = THUMB_COPROC(fault_instruction); 294 else { 295 /* Advanced SIMD load/store */ 296 if (THUMB_VFP_INSN(fault_instruction)) 297 coprocessor = COPROC_VFP; /* SIMD */ 298 } 299 } 300 #else 301 /* 302 * No support for Thumb-2 on this cpu 303 */ 304 ksiginfo_init_trap(&ksi); 305 ksi.ksi_signo = SIGILL; 306 ksi.ksi_code = ILL_ILLADR; 307 ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc; 308 trapsignal(td, &ksi); 309 userret(td, frame); 310 return; 311 #endif 312 } 313 314 if ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE) { 315 /* 316 * Modify the fault_code to reflect the USR/SVC state at 317 * time of fault. 318 */ 319 fault_code = FAULT_USER; 320 td->td_frame = frame; 321 } else 322 fault_code = 0; 323 324 /* OK this is were we do something about the instruction. */ 325 LIST_FOREACH(uh, &undefined_handlers[coprocessor], uh_link) 326 if (uh->uh_handler(fault_pc, fault_instruction, frame, 327 fault_code) == 0) 328 break; 329 330 if (uh == NULL && (fault_code & FAULT_USER)) { 331 /* Fault has not been handled */ 332 ksiginfo_init_trap(&ksi); 333 ksi.ksi_signo = SIGILL; 334 ksi.ksi_code = ILL_ILLOPC; 335 ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc; 336 trapsignal(td, &ksi); 337 } 338 339 if ((fault_code & FAULT_USER) == 0) { 340 if (fault_instruction == KERNEL_BREAKPOINT) { 341 #ifdef KDB 342 kdb_trap(T_BREAKPOINT, 0, frame); 343 #else 344 printf("No debugger in kernel.\n"); 345 #endif 346 return; 347 } 348 else 349 panic("Undefined instruction in kernel (0x%08x).\n", 350 fault_instruction); 351 } 352 353 userret(td, frame); 354 } 355