116694521SOleksandr Tymoshenko /*- 216694521SOleksandr Tymoshenko * Copyright (c) 2011 Semihalf. 316694521SOleksandr Tymoshenko * All rights reserved. 416694521SOleksandr Tymoshenko * 516694521SOleksandr Tymoshenko * Redistribution and use in source and binary forms, with or without 616694521SOleksandr Tymoshenko * modification, are permitted provided that the following conditions 716694521SOleksandr Tymoshenko * are met: 816694521SOleksandr Tymoshenko * 1. Redistributions of source code must retain the above copyright 916694521SOleksandr Tymoshenko * notice, this list of conditions and the following disclaimer. 1016694521SOleksandr Tymoshenko * 2. Redistributions in binary form must reproduce the above copyright 1116694521SOleksandr Tymoshenko * notice, this list of conditions and the following disclaimer in the 1216694521SOleksandr Tymoshenko * documentation and/or other materials provided with the distribution. 1316694521SOleksandr Tymoshenko * 1416694521SOleksandr Tymoshenko * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1516694521SOleksandr Tymoshenko * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1616694521SOleksandr Tymoshenko * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1716694521SOleksandr Tymoshenko * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1816694521SOleksandr Tymoshenko * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1916694521SOleksandr Tymoshenko * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2016694521SOleksandr Tymoshenko * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2116694521SOleksandr Tymoshenko * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2216694521SOleksandr Tymoshenko * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2316694521SOleksandr Tymoshenko * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2416694521SOleksandr Tymoshenko * SUCH DAMAGE. 2516694521SOleksandr Tymoshenko * 2616694521SOleksandr Tymoshenko * $FreeBSD$ 2716694521SOleksandr Tymoshenko */ 2816694521SOleksandr Tymoshenko 2916694521SOleksandr Tymoshenko #include <sys/param.h> 3016694521SOleksandr Tymoshenko #include <sys/systm.h> 3116694521SOleksandr Tymoshenko #include <sys/bus.h> 3216694521SOleksandr Tymoshenko #include <sys/lock.h> 3316694521SOleksandr Tymoshenko #include <sys/mutex.h> 3416694521SOleksandr Tymoshenko #include <sys/smp.h> 3516694521SOleksandr Tymoshenko 365c39c3ffSGrzegorz Bernacki #include <vm/vm.h> 375c39c3ffSGrzegorz Bernacki #include <vm/vm_kern.h> 385c39c3ffSGrzegorz Bernacki #include <vm/vm_extern.h> 39087af50aSAndrew Turner #include <vm/pmap.h> 405c39c3ffSGrzegorz Bernacki 4147fdf913SZbigniew Bodek #include <dev/fdt/fdt_common.h> 4247fdf913SZbigniew Bodek 4316694521SOleksandr Tymoshenko #include <machine/smp.h> 4416694521SOleksandr Tymoshenko #include <machine/fdt.h> 455c39c3ffSGrzegorz Bernacki #include <machine/armreg.h> 4616694521SOleksandr Tymoshenko 4716694521SOleksandr Tymoshenko #include <arm/mv/mvwin.h> 4816694521SOleksandr Tymoshenko 4916694521SOleksandr Tymoshenko #define MV_AXP_CPU_DIVCLK_BASE (MV_BASE + 0x18700) 5016694521SOleksandr Tymoshenko #define CPU_DIVCLK_CTRL0 0x00 5116694521SOleksandr Tymoshenko #define CPU_DIVCLK_CTRL2_RATIO_FULL0 0x08 5216694521SOleksandr Tymoshenko #define CPU_DIVCLK_CTRL2_RATIO_FULL1 0x0c 535c39c3ffSGrzegorz Bernacki #define CPU_DIVCLK_MASK(x) (~(0xff << (8 * (x)))) 5416694521SOleksandr Tymoshenko 5516694521SOleksandr Tymoshenko #define CPU_PMU(x) (MV_BASE + 0x22100 + (0x100 * (x))) 5616694521SOleksandr Tymoshenko #define CPU_PMU_BOOT 0x24 5716694521SOleksandr Tymoshenko 5816694521SOleksandr Tymoshenko #define MP (MV_BASE + 0x20800) 5916694521SOleksandr Tymoshenko #define MP_SW_RESET(x) ((x) * 8) 6016694521SOleksandr Tymoshenko 6116694521SOleksandr Tymoshenko #define CPU_RESUME_CONTROL (0x20988) 6216694521SOleksandr Tymoshenko 635c39c3ffSGrzegorz Bernacki void armadaxp_init_coher_fabric(void); 645c39c3ffSGrzegorz Bernacki int platform_get_ncpus(void); 6516694521SOleksandr Tymoshenko 6616694521SOleksandr Tymoshenko /* Coherency Fabric registers */ 6716694521SOleksandr Tymoshenko static uint32_t 6816694521SOleksandr Tymoshenko read_cpu_clkdiv(uint32_t reg) 6916694521SOleksandr Tymoshenko { 7016694521SOleksandr Tymoshenko 7116694521SOleksandr Tymoshenko return (bus_space_read_4(fdtbus_bs_tag, MV_AXP_CPU_DIVCLK_BASE, reg)); 7216694521SOleksandr Tymoshenko } 7316694521SOleksandr Tymoshenko 7416694521SOleksandr Tymoshenko static void 7516694521SOleksandr Tymoshenko write_cpu_clkdiv(uint32_t reg, uint32_t val) 7616694521SOleksandr Tymoshenko { 7716694521SOleksandr Tymoshenko 7816694521SOleksandr Tymoshenko bus_space_write_4(fdtbus_bs_tag, MV_AXP_CPU_DIVCLK_BASE, reg, val); 7916694521SOleksandr Tymoshenko } 8016694521SOleksandr Tymoshenko 8116694521SOleksandr Tymoshenko void 8216694521SOleksandr Tymoshenko platform_mp_setmaxid(void) 8316694521SOleksandr Tymoshenko { 8416694521SOleksandr Tymoshenko 8516694521SOleksandr Tymoshenko mp_maxid = 3; 8616694521SOleksandr Tymoshenko } 8716694521SOleksandr Tymoshenko 8816694521SOleksandr Tymoshenko int 8916694521SOleksandr Tymoshenko platform_mp_probe(void) 9016694521SOleksandr Tymoshenko { 9116694521SOleksandr Tymoshenko 9216694521SOleksandr Tymoshenko mp_ncpus = platform_get_ncpus(); 9316694521SOleksandr Tymoshenko 9416694521SOleksandr Tymoshenko return (mp_ncpus > 1); 9516694521SOleksandr Tymoshenko } 9616694521SOleksandr Tymoshenko 9716694521SOleksandr Tymoshenko void 9816694521SOleksandr Tymoshenko platform_mp_init_secondary(void) 9916694521SOleksandr Tymoshenko { 10016694521SOleksandr Tymoshenko } 10116694521SOleksandr Tymoshenko 10216694521SOleksandr Tymoshenko void mptramp(void); 103d0307444SZbigniew Bodek void mptramp_end(void); 10447fdf913SZbigniew Bodek extern vm_offset_t mptramp_pmu_boot; 10516694521SOleksandr Tymoshenko 10616694521SOleksandr Tymoshenko void 10716694521SOleksandr Tymoshenko platform_mp_start_ap(void) 10816694521SOleksandr Tymoshenko { 1095c39c3ffSGrzegorz Bernacki uint32_t reg, *src, *dst, cpu_num, div_val, cputype; 11016b2a62eSIan Lepore vm_offset_t pmu_boot_off; 1115c39c3ffSGrzegorz Bernacki /* 1125c39c3ffSGrzegorz Bernacki * Initialization procedure depends on core revision, 1135c39c3ffSGrzegorz Bernacki * in this step CHIP ID is checked to choose proper procedure 1145c39c3ffSGrzegorz Bernacki */ 1155c39c3ffSGrzegorz Bernacki cputype = cpufunc_id(); 1165c39c3ffSGrzegorz Bernacki cputype &= CPU_ID_CPU_MASK; 11716694521SOleksandr Tymoshenko 11847fdf913SZbigniew Bodek /* 11947fdf913SZbigniew Bodek * Set the PA of CPU0 Boot Address Redirect register used in 12047fdf913SZbigniew Bodek * mptramp according to the actual SoC registers' base address. 12147fdf913SZbigniew Bodek */ 12247fdf913SZbigniew Bodek pmu_boot_off = (CPU_PMU(0) - MV_BASE) + CPU_PMU_BOOT; 12347fdf913SZbigniew Bodek mptramp_pmu_boot = fdt_immr_pa + pmu_boot_off; 12416b2a62eSIan Lepore dst = pmap_mapdev(0xffff0000, PAGE_SIZE); 125d0307444SZbigniew Bodek for (src = (uint32_t *)mptramp; src < (uint32_t *)mptramp_end; 1265c39c3ffSGrzegorz Bernacki src++, dst++) { 1275c39c3ffSGrzegorz Bernacki *dst = *src; 1285c39c3ffSGrzegorz Bernacki } 12916b2a62eSIan Lepore pmap_unmapdev((vm_offset_t)dst, PAGE_SIZE); 1305c39c3ffSGrzegorz Bernacki if (cputype == CPU_ID_MV88SV584X_V7) { 1315c39c3ffSGrzegorz Bernacki /* Core rev A0 */ 1325c39c3ffSGrzegorz Bernacki div_val = read_cpu_clkdiv(CPU_DIVCLK_CTRL2_RATIO_FULL1); 1335c39c3ffSGrzegorz Bernacki div_val &= 0x3f; 1345c39c3ffSGrzegorz Bernacki 1355c39c3ffSGrzegorz Bernacki for (cpu_num = 1; cpu_num < mp_ncpus; cpu_num++ ) { 1365c39c3ffSGrzegorz Bernacki reg = read_cpu_clkdiv(CPU_DIVCLK_CTRL2_RATIO_FULL1); 1375c39c3ffSGrzegorz Bernacki reg &= CPU_DIVCLK_MASK(cpu_num); 1385c39c3ffSGrzegorz Bernacki reg |= div_val << (cpu_num * 8); 1395c39c3ffSGrzegorz Bernacki write_cpu_clkdiv(CPU_DIVCLK_CTRL2_RATIO_FULL1, reg); 1405c39c3ffSGrzegorz Bernacki } 1415c39c3ffSGrzegorz Bernacki } else { 1425c39c3ffSGrzegorz Bernacki /* Core rev Z1 */ 1435c39c3ffSGrzegorz Bernacki div_val = 0x01; 14416694521SOleksandr Tymoshenko 14516694521SOleksandr Tymoshenko if (mp_ncpus > 1) { 14616694521SOleksandr Tymoshenko reg = read_cpu_clkdiv(CPU_DIVCLK_CTRL2_RATIO_FULL0); 1475c39c3ffSGrzegorz Bernacki reg &= CPU_DIVCLK_MASK(3); 1485c39c3ffSGrzegorz Bernacki reg |= div_val << 24; 14916694521SOleksandr Tymoshenko write_cpu_clkdiv(CPU_DIVCLK_CTRL2_RATIO_FULL0, reg); 15016694521SOleksandr Tymoshenko } 1515c39c3ffSGrzegorz Bernacki 1525c39c3ffSGrzegorz Bernacki for (cpu_num = 2; cpu_num < mp_ncpus; cpu_num++ ) { 15316694521SOleksandr Tymoshenko reg = read_cpu_clkdiv(CPU_DIVCLK_CTRL2_RATIO_FULL1); 1545c39c3ffSGrzegorz Bernacki reg &= CPU_DIVCLK_MASK(cpu_num); 1555c39c3ffSGrzegorz Bernacki reg |= div_val << (cpu_num * 8); 15616694521SOleksandr Tymoshenko write_cpu_clkdiv(CPU_DIVCLK_CTRL2_RATIO_FULL1, reg); 15716694521SOleksandr Tymoshenko } 15816694521SOleksandr Tymoshenko } 15916694521SOleksandr Tymoshenko 16016694521SOleksandr Tymoshenko reg = read_cpu_clkdiv(CPU_DIVCLK_CTRL0); 16116694521SOleksandr Tymoshenko reg |= ((0x1 << (mp_ncpus - 1)) - 1) << 21; 16216694521SOleksandr Tymoshenko write_cpu_clkdiv(CPU_DIVCLK_CTRL0, reg); 16316694521SOleksandr Tymoshenko reg = read_cpu_clkdiv(CPU_DIVCLK_CTRL0); 16416694521SOleksandr Tymoshenko reg |= 0x01000000; 16516694521SOleksandr Tymoshenko write_cpu_clkdiv(CPU_DIVCLK_CTRL0, reg); 16616694521SOleksandr Tymoshenko 16716694521SOleksandr Tymoshenko DELAY(100); 16816694521SOleksandr Tymoshenko reg &= ~(0xf << 21); 16916694521SOleksandr Tymoshenko write_cpu_clkdiv(CPU_DIVCLK_CTRL0, reg); 17016694521SOleksandr Tymoshenko DELAY(100); 17116694521SOleksandr Tymoshenko 17216694521SOleksandr Tymoshenko bus_space_write_4(fdtbus_bs_tag, MV_BASE, CPU_RESUME_CONTROL, 0); 17316694521SOleksandr Tymoshenko 17416694521SOleksandr Tymoshenko for (cpu_num = 1; cpu_num < mp_ncpus; cpu_num++ ) 17516694521SOleksandr Tymoshenko bus_space_write_4(fdtbus_bs_tag, CPU_PMU(cpu_num), CPU_PMU_BOOT, 1769e9b17fbSOlivier Houchard pmap_kextract((vm_offset_t)mpentry)); 17716694521SOleksandr Tymoshenko 17816694521SOleksandr Tymoshenko cpu_idcache_wbinv_all(); 17916694521SOleksandr Tymoshenko 18016694521SOleksandr Tymoshenko for (cpu_num = 1; cpu_num < mp_ncpus; cpu_num++ ) 18116694521SOleksandr Tymoshenko bus_space_write_4(fdtbus_bs_tag, MP, MP_SW_RESET(cpu_num), 0); 18216694521SOleksandr Tymoshenko 18316694521SOleksandr Tymoshenko /* XXX: Temporary workaround for hangup after releasing AP's */ 18416694521SOleksandr Tymoshenko wmb(); 18516694521SOleksandr Tymoshenko DELAY(10); 18616694521SOleksandr Tymoshenko 1875c39c3ffSGrzegorz Bernacki armadaxp_init_coher_fabric(); 18816694521SOleksandr Tymoshenko } 18916694521SOleksandr Tymoshenko 19016694521SOleksandr Tymoshenko void 19116694521SOleksandr Tymoshenko platform_ipi_send(cpuset_t cpus, u_int ipi) 19216694521SOleksandr Tymoshenko { 19316694521SOleksandr Tymoshenko 19416694521SOleksandr Tymoshenko pic_ipi_send(cpus, ipi); 19516694521SOleksandr Tymoshenko } 196