1127e4d95SHubert Mazur /*-
24d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause
3127e4d95SHubert Mazur *
4127e4d95SHubert Mazur * Copyright (c) 2021 Semihalf.
5127e4d95SHubert Mazur *
6127e4d95SHubert Mazur * Redistribution and use in source and binary forms, with or without
7127e4d95SHubert Mazur * modification, are permitted provided that the following conditions
8127e4d95SHubert Mazur * are met:
9127e4d95SHubert Mazur * 1. Redistributions of source code must retain the above copyright
10127e4d95SHubert Mazur * notice, this list of conditions and the following disclaimer.
11127e4d95SHubert Mazur * 2. Redistributions in binary form must reproduce the above copyright
12127e4d95SHubert Mazur * notice, this list of conditions and the following disclaimer in the
13127e4d95SHubert Mazur * documentation and/or other materials provided with the distribution.
14127e4d95SHubert Mazur *
15127e4d95SHubert Mazur * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16127e4d95SHubert Mazur * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17127e4d95SHubert Mazur * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18127e4d95SHubert Mazur * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19127e4d95SHubert Mazur * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20127e4d95SHubert Mazur * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21127e4d95SHubert Mazur * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22127e4d95SHubert Mazur * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23127e4d95SHubert Mazur * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24127e4d95SHubert Mazur * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25127e4d95SHubert Mazur * SUCH DAMAGE.
26127e4d95SHubert Mazur */
27127e4d95SHubert Mazur
28127e4d95SHubert Mazur #include <sys/param.h>
29127e4d95SHubert Mazur #include <sys/bus.h>
30127e4d95SHubert Mazur #include <sys/kernel.h>
31127e4d95SHubert Mazur #include <sys/module.h>
32127e4d95SHubert Mazur #include <sys/rman.h>
33127e4d95SHubert Mazur #include <machine/bus.h>
34127e4d95SHubert Mazur
35be82b3a0SEmmanuel Vadot #include <dev/clk/clk.h>
36127e4d95SHubert Mazur #include <dev/ofw/ofw_bus_subr.h>
37127e4d95SHubert Mazur
38127e4d95SHubert Mazur #include "clkdev_if.h"
39127e4d95SHubert Mazur
40127e4d95SHubert Mazur #include "a37x0_tbg_pll.h"
41127e4d95SHubert Mazur
42127e4d95SHubert Mazur #define NUM_TBG 4
43127e4d95SHubert Mazur
44127e4d95SHubert Mazur #define TBG_CTRL0 0x4
45127e4d95SHubert Mazur #define TBG_CTRL1 0x8
46127e4d95SHubert Mazur #define TBG_CTRL7 0x20
47127e4d95SHubert Mazur #define TBG_CTRL8 0x30
48127e4d95SHubert Mazur
49127e4d95SHubert Mazur #define TBG_MASK 0x1FF
50127e4d95SHubert Mazur
51127e4d95SHubert Mazur #define TBG_A_REFDIV 0
52127e4d95SHubert Mazur #define TBG_B_REFDIV 16
53127e4d95SHubert Mazur
54127e4d95SHubert Mazur #define TBG_A_FBDIV 2
55127e4d95SHubert Mazur #define TBG_B_FBDIV 18
56127e4d95SHubert Mazur
57127e4d95SHubert Mazur #define TBG_A_VCODIV_SEL 0
58127e4d95SHubert Mazur #define TBG_B_VCODIV_SEL 16
59127e4d95SHubert Mazur
60127e4d95SHubert Mazur #define TBG_A_VCODIV_DIFF 1
61127e4d95SHubert Mazur #define TBG_B_VCODIV_DIFF 17
62127e4d95SHubert Mazur
63127e4d95SHubert Mazur struct a37x0_tbg_softc {
64127e4d95SHubert Mazur device_t dev;
65127e4d95SHubert Mazur struct clkdom *clkdom;
66127e4d95SHubert Mazur struct resource *res;
67127e4d95SHubert Mazur };
68127e4d95SHubert Mazur
69127e4d95SHubert Mazur static struct resource_spec a37x0_tbg_clk_spec[] = {
70127e4d95SHubert Mazur { SYS_RES_MEMORY, 0, RF_ACTIVE },
71127e4d95SHubert Mazur { -1, 0 }
72127e4d95SHubert Mazur };
73127e4d95SHubert Mazur
74127e4d95SHubert Mazur struct a37x0_tbg_def {
75127e4d95SHubert Mazur char *name;
76127e4d95SHubert Mazur uint32_t refdiv_shift;
77127e4d95SHubert Mazur uint32_t fbdiv_shift;
78127e4d95SHubert Mazur uint32_t vcodiv_offset;
79127e4d95SHubert Mazur uint32_t vcodiv_shift;
80127e4d95SHubert Mazur uint32_t tbg_bypass_en;
81127e4d95SHubert Mazur };
82127e4d95SHubert Mazur
83127e4d95SHubert Mazur static const struct a37x0_tbg_def tbg[NUM_TBG] = {
84127e4d95SHubert Mazur {"TBG-A-P", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL8, TBG_A_VCODIV_DIFF, 9},
85127e4d95SHubert Mazur {"TBG-B-P", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL8,
86127e4d95SHubert Mazur TBG_B_VCODIV_DIFF, 25},
87127e4d95SHubert Mazur {"TBG-A-S", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL1, TBG_A_VCODIV_SEL, 9},
88127e4d95SHubert Mazur {"TBG-B-S", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL1, TBG_B_VCODIV_SEL, 25}
89127e4d95SHubert Mazur };
90127e4d95SHubert Mazur
91127e4d95SHubert Mazur static int a37x0_tbg_read_4(device_t, bus_addr_t, uint32_t *);
92127e4d95SHubert Mazur static int a37x0_tbg_attach(device_t);
93127e4d95SHubert Mazur static int a37x0_tbg_detach(device_t);
94127e4d95SHubert Mazur static int a37x0_tbg_probe(device_t);
95127e4d95SHubert Mazur
96127e4d95SHubert Mazur static device_method_t a37x0_tbg_methods [] = {
97127e4d95SHubert Mazur DEVMETHOD(device_attach, a37x0_tbg_attach),
98127e4d95SHubert Mazur DEVMETHOD(device_detach, a37x0_tbg_detach),
99127e4d95SHubert Mazur DEVMETHOD(device_probe, a37x0_tbg_probe),
100127e4d95SHubert Mazur
101127e4d95SHubert Mazur DEVMETHOD(clkdev_read_4, a37x0_tbg_read_4),
102127e4d95SHubert Mazur
103127e4d95SHubert Mazur DEVMETHOD_END
104127e4d95SHubert Mazur };
105127e4d95SHubert Mazur
106127e4d95SHubert Mazur static driver_t a37x0_tbg_driver = {
107127e4d95SHubert Mazur "a37x0_tbg",
108127e4d95SHubert Mazur a37x0_tbg_methods,
109127e4d95SHubert Mazur sizeof(struct a37x0_tbg_softc)
110127e4d95SHubert Mazur };
111127e4d95SHubert Mazur
112a3b866cbSJohn Baldwin EARLY_DRIVER_MODULE(a37x0_tbg, simplebus, a37x0_tbg_driver, 0, 0,
113a3b866cbSJohn Baldwin BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);
114127e4d95SHubert Mazur
115127e4d95SHubert Mazur static int
a37x0_tbg_read_4(device_t dev,bus_addr_t offset,uint32_t * val)116127e4d95SHubert Mazur a37x0_tbg_read_4(device_t dev, bus_addr_t offset, uint32_t *val)
117127e4d95SHubert Mazur {
118127e4d95SHubert Mazur struct a37x0_tbg_softc *sc;
119127e4d95SHubert Mazur
120127e4d95SHubert Mazur sc = device_get_softc(dev);
121127e4d95SHubert Mazur
122127e4d95SHubert Mazur *val = bus_read_4(sc->res, offset);
123127e4d95SHubert Mazur
124127e4d95SHubert Mazur return (0);
125127e4d95SHubert Mazur }
126127e4d95SHubert Mazur
127127e4d95SHubert Mazur static int
a37x0_tbg_attach(device_t dev)128127e4d95SHubert Mazur a37x0_tbg_attach(device_t dev)
129127e4d95SHubert Mazur {
130127e4d95SHubert Mazur struct a37x0_tbg_pll_clk_def def;
131127e4d95SHubert Mazur struct a37x0_tbg_softc *sc;
132127e4d95SHubert Mazur const char *clkname;
133127e4d95SHubert Mazur int error, i;
134127e4d95SHubert Mazur phandle_t node;
135127e4d95SHubert Mazur clk_t clock;
136127e4d95SHubert Mazur
137127e4d95SHubert Mazur sc = device_get_softc(dev);
138127e4d95SHubert Mazur node = ofw_bus_get_node(dev);
139127e4d95SHubert Mazur sc->dev = dev;
140127e4d95SHubert Mazur
141127e4d95SHubert Mazur if (bus_alloc_resources(dev, a37x0_tbg_clk_spec, &sc->res) != 0) {
142127e4d95SHubert Mazur device_printf(dev, "Cannot allocate resources\n");
143127e4d95SHubert Mazur return (ENXIO);
144127e4d95SHubert Mazur }
145127e4d95SHubert Mazur
146127e4d95SHubert Mazur sc->clkdom = clkdom_create(dev);
147127e4d95SHubert Mazur if (sc->clkdom == NULL) {
148127e4d95SHubert Mazur device_printf(dev, "Cannot create clock domain.\n");
149127e4d95SHubert Mazur return (ENXIO);
150127e4d95SHubert Mazur }
151127e4d95SHubert Mazur
152127e4d95SHubert Mazur error = clk_get_by_ofw_index(dev, node, 0, &clock);
153127e4d95SHubert Mazur if (error != 0) {
154127e4d95SHubert Mazur device_printf(dev, "Cannot find clock parent\n");
155127e4d95SHubert Mazur bus_release_resources(dev, a37x0_tbg_clk_spec, &sc->res);
156127e4d95SHubert Mazur return (error);
157127e4d95SHubert Mazur }
158127e4d95SHubert Mazur
159127e4d95SHubert Mazur clkname = clk_get_name(clock);
160127e4d95SHubert Mazur
161127e4d95SHubert Mazur for (i = 0; i < NUM_TBG; i++) {
162127e4d95SHubert Mazur def.clkdef.parent_names = &clkname;
163127e4d95SHubert Mazur def.clkdef.parent_cnt = 1;
164127e4d95SHubert Mazur def.clkdef.id = i;
165127e4d95SHubert Mazur def.clkdef.name = tbg[i].name;
166127e4d95SHubert Mazur
167127e4d95SHubert Mazur def.vcodiv.offset = tbg[i].vcodiv_offset;
168127e4d95SHubert Mazur def.vcodiv.shift = tbg[i].vcodiv_shift;
169127e4d95SHubert Mazur def.refdiv.offset = TBG_CTRL7;
170127e4d95SHubert Mazur def.refdiv.shift = tbg[i].refdiv_shift;
171127e4d95SHubert Mazur def.fbdiv.offset = TBG_CTRL0;
172127e4d95SHubert Mazur def.fbdiv.shift = tbg[i].fbdiv_shift;
173127e4d95SHubert Mazur def.vcodiv.mask = def.refdiv.mask = def.fbdiv.mask = TBG_MASK;
174127e4d95SHubert Mazur def.tbg_bypass.offset = TBG_CTRL1;
175127e4d95SHubert Mazur def.tbg_bypass.shift = tbg[i].tbg_bypass_en;
176127e4d95SHubert Mazur def.tbg_bypass.mask = 0x1;
177127e4d95SHubert Mazur
178127e4d95SHubert Mazur error = a37x0_tbg_pll_clk_register(sc->clkdom, &def);
179127e4d95SHubert Mazur
180127e4d95SHubert Mazur if (error) {
181127e4d95SHubert Mazur device_printf(dev, "Cannot register clock node\n");
182127e4d95SHubert Mazur bus_release_resources(dev, a37x0_tbg_clk_spec,
183127e4d95SHubert Mazur &sc->res);
184127e4d95SHubert Mazur return (ENXIO);
185127e4d95SHubert Mazur }
186127e4d95SHubert Mazur }
187127e4d95SHubert Mazur
188127e4d95SHubert Mazur error = clkdom_finit(sc->clkdom);
189127e4d95SHubert Mazur if (error) {
190127e4d95SHubert Mazur device_printf(dev,
191127e4d95SHubert Mazur "Cannot finalize clock domain intialization\n");
192127e4d95SHubert Mazur bus_release_resources(dev, a37x0_tbg_clk_spec, &sc->res);
193127e4d95SHubert Mazur return (ENXIO);
194127e4d95SHubert Mazur }
195127e4d95SHubert Mazur
196127e4d95SHubert Mazur if (bootverbose)
197127e4d95SHubert Mazur clkdom_dump(sc->clkdom);
198127e4d95SHubert Mazur
199127e4d95SHubert Mazur return (0);
200127e4d95SHubert Mazur }
201127e4d95SHubert Mazur
202127e4d95SHubert Mazur static int
a37x0_tbg_probe(device_t dev)203127e4d95SHubert Mazur a37x0_tbg_probe(device_t dev)
204127e4d95SHubert Mazur {
205127e4d95SHubert Mazur
206127e4d95SHubert Mazur if (!ofw_bus_status_okay(dev))
207127e4d95SHubert Mazur return (ENXIO);
208127e4d95SHubert Mazur
209127e4d95SHubert Mazur if (!ofw_bus_is_compatible(dev, "marvell,armada-3700-tbg-clock"))
210127e4d95SHubert Mazur return (ENXIO);
211127e4d95SHubert Mazur
212127e4d95SHubert Mazur device_set_desc(dev, "Marvell Armada 3700 time base generators");
213127e4d95SHubert Mazur return (BUS_PROBE_DEFAULT);
214127e4d95SHubert Mazur }
215127e4d95SHubert Mazur
216127e4d95SHubert Mazur static int
a37x0_tbg_detach(device_t dev)217127e4d95SHubert Mazur a37x0_tbg_detach(device_t dev)
218127e4d95SHubert Mazur {
219127e4d95SHubert Mazur
220127e4d95SHubert Mazur return (EBUSY);
221127e4d95SHubert Mazur }
222