1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2022 Semihalf. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/bus.h> 31 32 #include <machine/bus.h> 33 34 #include <dev/extres/clk/clk.h> 35 36 #include <arm/mv/clk/armada38x_gen.h> 37 38 #include "clkdev_if.h" 39 40 #define SAR_A38X_TCLK_FREQ_SHIFT 15 41 #define SAR_A38X_TCLK_FREQ_MASK 0x00008000 42 43 #define TCLK_250MHZ 250 * 1000 * 1000 44 #define TCLK_200MHZ 200 * 1000 * 1000 45 46 #define WR4(_clk, offset, val) \ 47 CLKDEV_WRITE_4(clknode_get_device(_clk), offset, val) 48 #define RD4(_clk, offset, val) \ 49 CLKDEV_READ_4(clknode_get_device(_clk), offset, val) 50 #define DEVICE_LOCK(_clk) \ 51 CLKDEV_DEVICE_LOCK(clknode_get_device(_clk)) 52 #define DEVICE_UNLOCK(_clk) \ 53 CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk)) 54 55 static int 56 armada38x_gen_recalc(struct clknode *clk, uint64_t *freq) 57 { 58 uint32_t reg; 59 60 DEVICE_LOCK(clk); 61 RD4(clk, 0, ®); 62 DEVICE_UNLOCK(clk); 63 64 reg = (reg & SAR_A38X_TCLK_FREQ_MASK) >> SAR_A38X_TCLK_FREQ_SHIFT; 65 *freq = reg ? TCLK_200MHZ : TCLK_250MHZ; 66 67 return (0); 68 } 69 70 static int 71 armada38x_gen_init(struct clknode *clk, device_t dev) 72 { 73 return (0); 74 } 75 76 static clknode_method_t armada38x_gen_clknode_methods[] = { 77 /* Device interface */ 78 CLKNODEMETHOD(clknode_init, armada38x_gen_init), 79 CLKNODEMETHOD(clknode_recalc_freq, armada38x_gen_recalc), 80 CLKNODEMETHOD_END 81 }; 82 83 DEFINE_CLASS_1(armada38x_gen_clknode, armada38x_gen_clknode_class, 84 armada38x_gen_clknode_methods, 0, clknode_class); 85 86 int 87 armada38x_gen_register(struct clkdom *clkdom, const struct armada38x_gen_clknode_def *clkdef) 88 { 89 struct clknode *clk; 90 91 clk = clknode_create(clkdom, &armada38x_gen_clknode_class, &clkdef->def); 92 if (clk == NULL) 93 return (1); 94 95 clknode_register(clkdom, clk); 96 97 return(0); 98 } 99