1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2018 Rubicon Communications, LLC (Netgate) 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/rman.h> 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 43 #include <machine/bus.h> 44 #include <machine/resource.h> 45 #include <machine/intr.h> 46 47 #include <dev/fdt/simplebus.h> 48 49 #include <dev/ofw/ofw_bus.h> 50 #include <dev/ofw/ofw_bus_subr.h> 51 52 #include <dev/extres/clk/clk_fixed.h> 53 54 static struct clk_fixed_def ap806_clk_cluster_0 = { 55 .clkdef.id = 0, 56 .clkdef.name = "ap806-cpu-cluster-0", 57 .freq = 0, 58 }; 59 60 static struct clk_fixed_def ap806_clk_cluster_1 = { 61 .clkdef.id = 1, 62 .clkdef.name = "ap806-cpu-cluster-1", 63 .freq = 0, 64 }; 65 66 static struct clk_fixed_def ap806_clk_fixed = { 67 .clkdef.id = 2, 68 .clkdef.name = "ap806-fixed", 69 .freq = 1200000000, 70 }; 71 72 /* Thoses are the only exported clocks AFAICT */ 73 74 static const char *mss_parents[] = {"ap806-fixed"}; 75 static struct clk_fixed_def ap806_clk_mss = { 76 .clkdef.id = 3, 77 .clkdef.name = "ap806-mss", 78 .clkdef.parent_names = mss_parents, 79 .clkdef.parent_cnt = 1, 80 .mult = 1, 81 .div = 6, 82 }; 83 84 static const char *sdio_parents[] = {"ap806-fixed"}; 85 static struct clk_fixed_def ap806_clk_sdio = { 86 .clkdef.id = 4, 87 .clkdef.name = "ap806-sdio", 88 .clkdef.parent_names = sdio_parents, 89 .clkdef.parent_cnt = 1, 90 .mult = 1, 91 .div = 3, 92 }; 93 94 struct mv_ap806_clock_softc { 95 struct simplebus_softc simplebus_sc; 96 device_t dev; 97 struct resource *res; 98 }; 99 100 static struct resource_spec mv_ap806_clock_res_spec[] = { 101 { SYS_RES_MEMORY, 0, RF_ACTIVE | RF_SHAREABLE }, 102 { -1, 0 } 103 }; 104 105 static struct ofw_compat_data compat_data[] = { 106 {"marvell,ap806-clock", 1}, 107 {NULL, 0} 108 }; 109 110 #define RD4(sc, reg) bus_read_4((sc)->res, (reg)) 111 #define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val)) 112 113 static int 114 mv_ap806_clock_probe(device_t dev) 115 { 116 117 if (!ofw_bus_status_okay(dev)) 118 return (ENXIO); 119 120 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 121 return (ENXIO); 122 123 device_set_desc(dev, "Marvell AP806 Clock Controller"); 124 return (BUS_PROBE_DEFAULT); 125 } 126 127 static int 128 mv_ap806_clock_attach(device_t dev) 129 { 130 struct mv_ap806_clock_softc *sc; 131 struct clkdom *clkdom; 132 uint64_t clock_freq; 133 uint32_t reg; 134 135 sc = device_get_softc(dev); 136 sc->dev = dev; 137 138 if (bus_alloc_resources(dev, mv_ap806_clock_res_spec, &sc->res) != 0) { 139 device_printf(dev, "cannot allocate resources for device\n"); 140 return (ENXIO); 141 } 142 143 /* 144 * We might miss some combinations 145 * Those are the only possible ones on the mcbin 146 */ 147 reg = RD4(sc, 0x400); 148 switch (reg & 0x1f) { 149 case 0x0: 150 case 0x1: 151 clock_freq = 2000000000; 152 break; 153 case 0x6: 154 clock_freq = 1800000000; 155 break; 156 case 0xd: 157 clock_freq = 1600000000; 158 break; 159 case 0x14: 160 clock_freq = 1333000000; 161 break; 162 default: 163 device_printf(dev, "Cannot guess clock freq with reg %x\n", reg & 0x1f); 164 return (ENXIO); 165 break; 166 }; 167 168 ap806_clk_cluster_0.freq = clock_freq; 169 ap806_clk_cluster_1.freq = clock_freq; 170 clkdom = clkdom_create(dev); 171 172 clknode_fixed_register(clkdom, &ap806_clk_cluster_0); 173 clknode_fixed_register(clkdom, &ap806_clk_cluster_1); 174 clknode_fixed_register(clkdom, &ap806_clk_fixed); 175 clknode_fixed_register(clkdom, &ap806_clk_mss); 176 clknode_fixed_register(clkdom, &ap806_clk_sdio); 177 178 clkdom_finit(clkdom); 179 180 if (bootverbose) 181 clkdom_dump(clkdom); 182 return (0); 183 } 184 185 static int 186 mv_ap806_clock_detach(device_t dev) 187 { 188 189 return (EBUSY); 190 } 191 192 static device_method_t mv_ap806_clock_methods[] = { 193 /* Device interface */ 194 DEVMETHOD(device_probe, mv_ap806_clock_probe), 195 DEVMETHOD(device_attach, mv_ap806_clock_attach), 196 DEVMETHOD(device_detach, mv_ap806_clock_detach), 197 198 DEVMETHOD_END 199 }; 200 201 static devclass_t mv_ap806_clock_devclass; 202 203 static driver_t mv_ap806_clock_driver = { 204 "mv_ap806_clock", 205 mv_ap806_clock_methods, 206 sizeof(struct mv_ap806_clock_softc), 207 }; 208 209 EARLY_DRIVER_MODULE(mv_ap806_clock, simplebus, mv_ap806_clock_driver, 210 mv_ap806_clock_devclass, 0, 0, BUS_PASS_RESOURCE + BUS_PASS_ORDER_LATE); 211