xref: /freebsd/sys/arm/nvidia/as3722.c (revision b2f0caf1)
1ef2ee5d0SMichal Meloun /*-
2ef2ee5d0SMichal Meloun  * Copyright (c) 2016 Michal Meloun <mmel@FreeBSD.org>
3ef2ee5d0SMichal Meloun  * All rights reserved.
4ef2ee5d0SMichal Meloun  *
5ef2ee5d0SMichal Meloun  * Redistribution and use in source and binary forms, with or without
6ef2ee5d0SMichal Meloun  * modification, are permitted provided that the following conditions
7ef2ee5d0SMichal Meloun  * are met:
8ef2ee5d0SMichal Meloun  * 1. Redistributions of source code must retain the above copyright
9ef2ee5d0SMichal Meloun  *    notice, this list of conditions and the following disclaimer.
10ef2ee5d0SMichal Meloun  * 2. Redistributions in binary form must reproduce the above copyright
11ef2ee5d0SMichal Meloun  *    notice, this list of conditions and the following disclaimer in the
12ef2ee5d0SMichal Meloun  *    documentation and/or other materials provided with the distribution.
13ef2ee5d0SMichal Meloun  *
14ef2ee5d0SMichal Meloun  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15ef2ee5d0SMichal Meloun  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16ef2ee5d0SMichal Meloun  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17ef2ee5d0SMichal Meloun  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18ef2ee5d0SMichal Meloun  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19ef2ee5d0SMichal Meloun  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20ef2ee5d0SMichal Meloun  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21ef2ee5d0SMichal Meloun  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22ef2ee5d0SMichal Meloun  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23ef2ee5d0SMichal Meloun  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24ef2ee5d0SMichal Meloun  * SUCH DAMAGE.
25ef2ee5d0SMichal Meloun  */
26ef2ee5d0SMichal Meloun 
27ef2ee5d0SMichal Meloun #include <sys/cdefs.h>
28ef2ee5d0SMichal Meloun /*
29ef2ee5d0SMichal Meloun  * AS3722 PMIC driver
30ef2ee5d0SMichal Meloun  */
31ef2ee5d0SMichal Meloun 
32ef2ee5d0SMichal Meloun #include <sys/param.h>
33ef2ee5d0SMichal Meloun #include <sys/systm.h>
34ef2ee5d0SMichal Meloun #include <sys/bus.h>
35ef2ee5d0SMichal Meloun #include <sys/gpio.h>
36ef2ee5d0SMichal Meloun #include <sys/kernel.h>
37ef2ee5d0SMichal Meloun #include <sys/module.h>
38ef2ee5d0SMichal Meloun #include <sys/malloc.h>
39ef2ee5d0SMichal Meloun #include <sys/rman.h>
40ef2ee5d0SMichal Meloun #include <sys/sx.h>
41ef2ee5d0SMichal Meloun 
42ef2ee5d0SMichal Meloun #include <machine/bus.h>
43ef2ee5d0SMichal Meloun 
44*b2f0caf1SEmmanuel Vadot #include <dev/regulator/regulator.h>
45ef2ee5d0SMichal Meloun #include <dev/fdt/fdt_pinctrl.h>
46ef2ee5d0SMichal Meloun #include <dev/gpio/gpiobusvar.h>
47ef2ee5d0SMichal Meloun #include <dev/iicbus/iiconf.h>
48ef2ee5d0SMichal Meloun #include <dev/iicbus/iicbus.h>
49ef2ee5d0SMichal Meloun #include <dev/ofw/ofw_bus.h>
50ef2ee5d0SMichal Meloun #include <dev/ofw/ofw_bus_subr.h>
51ef2ee5d0SMichal Meloun 
528a7a4683SEmmanuel Vadot #include <dt-bindings/mfd/as3722.h>
53ef2ee5d0SMichal Meloun 
54ef2ee5d0SMichal Meloun #include "clock_if.h"
55ef2ee5d0SMichal Meloun #include "regdev_if.h"
56ef2ee5d0SMichal Meloun 
57ef2ee5d0SMichal Meloun #include "as3722.h"
58ef2ee5d0SMichal Meloun 
59ef2ee5d0SMichal Meloun static struct ofw_compat_data compat_data[] = {
60ef2ee5d0SMichal Meloun 	{"ams,as3722",		1},
61ef2ee5d0SMichal Meloun 	{NULL,			0},
62ef2ee5d0SMichal Meloun };
63ef2ee5d0SMichal Meloun 
64ef2ee5d0SMichal Meloun #define	LOCK(_sc)		sx_xlock(&(_sc)->lock)
65ef2ee5d0SMichal Meloun #define	UNLOCK(_sc)		sx_xunlock(&(_sc)->lock)
66ef2ee5d0SMichal Meloun #define	LOCK_INIT(_sc)		sx_init(&(_sc)->lock, "as3722")
67ef2ee5d0SMichal Meloun #define	LOCK_DESTROY(_sc)	sx_destroy(&(_sc)->lock);
68ef2ee5d0SMichal Meloun #define	ASSERT_LOCKED(_sc)	sx_assert(&(_sc)->lock, SA_XLOCKED);
69ef2ee5d0SMichal Meloun #define	ASSERT_UNLOCKED(_sc)	sx_assert(&(_sc)->lock, SA_UNLOCKED);
70ef2ee5d0SMichal Meloun 
71ef2ee5d0SMichal Meloun #define	AS3722_DEVICE_ID	0x0C
72ef2ee5d0SMichal Meloun 
73ef2ee5d0SMichal Meloun /*
74ef2ee5d0SMichal Meloun  * Raw register access function.
75ef2ee5d0SMichal Meloun  */
76ef2ee5d0SMichal Meloun int
as3722_read(struct as3722_softc * sc,uint8_t reg,uint8_t * val)77ef2ee5d0SMichal Meloun as3722_read(struct as3722_softc *sc, uint8_t reg, uint8_t *val)
78ef2ee5d0SMichal Meloun {
79ef2ee5d0SMichal Meloun 	uint8_t addr;
80ef2ee5d0SMichal Meloun 	int rv;
81ef2ee5d0SMichal Meloun 	struct iic_msg msgs[2] = {
82ef2ee5d0SMichal Meloun 		{0, IIC_M_WR, 1, &addr},
83ef2ee5d0SMichal Meloun 		{0, IIC_M_RD, 1, val},
84ef2ee5d0SMichal Meloun 	};
85ef2ee5d0SMichal Meloun 
86ef2ee5d0SMichal Meloun 	msgs[0].slave = sc->bus_addr;
87ef2ee5d0SMichal Meloun 	msgs[1].slave = sc->bus_addr;
88ef2ee5d0SMichal Meloun 	addr = reg;
89ef2ee5d0SMichal Meloun 
90ef2ee5d0SMichal Meloun 	rv = iicbus_transfer(sc->dev, msgs, 2);
91ef2ee5d0SMichal Meloun 	if (rv != 0) {
92ef2ee5d0SMichal Meloun 		device_printf(sc->dev,
93ef2ee5d0SMichal Meloun 		    "Error when reading reg 0x%02X, rv: %d\n", reg,  rv);
94ef2ee5d0SMichal Meloun 		return (EIO);
95ef2ee5d0SMichal Meloun 	}
96ef2ee5d0SMichal Meloun 
97ef2ee5d0SMichal Meloun 	return (0);
98ef2ee5d0SMichal Meloun }
99ef2ee5d0SMichal Meloun 
as3722_read_buf(struct as3722_softc * sc,uint8_t reg,uint8_t * buf,size_t size)100ef2ee5d0SMichal Meloun int as3722_read_buf(struct as3722_softc *sc, uint8_t reg, uint8_t *buf,
101ef2ee5d0SMichal Meloun     size_t size)
102ef2ee5d0SMichal Meloun {
103ef2ee5d0SMichal Meloun 	uint8_t addr;
104ef2ee5d0SMichal Meloun 	int rv;
105ef2ee5d0SMichal Meloun 	struct iic_msg msgs[2] = {
106ef2ee5d0SMichal Meloun 		{0, IIC_M_WR, 1, &addr},
107ef2ee5d0SMichal Meloun 		{0, IIC_M_RD, size, buf},
108ef2ee5d0SMichal Meloun 	};
109ef2ee5d0SMichal Meloun 
110ef2ee5d0SMichal Meloun 	msgs[0].slave = sc->bus_addr;
111ef2ee5d0SMichal Meloun 	msgs[1].slave = sc->bus_addr;
112ef2ee5d0SMichal Meloun 	addr = reg;
113ef2ee5d0SMichal Meloun 
114ef2ee5d0SMichal Meloun 	rv = iicbus_transfer(sc->dev, msgs, 2);
115ef2ee5d0SMichal Meloun 	if (rv != 0) {
116ef2ee5d0SMichal Meloun 		device_printf(sc->dev,
117ef2ee5d0SMichal Meloun 		    "Error when reading reg 0x%02X, rv: %d\n", reg,  rv);
118ef2ee5d0SMichal Meloun 		return (EIO);
119ef2ee5d0SMichal Meloun 	}
120ef2ee5d0SMichal Meloun 
121ef2ee5d0SMichal Meloun 	return (0);
122ef2ee5d0SMichal Meloun }
123ef2ee5d0SMichal Meloun 
124ef2ee5d0SMichal Meloun int
as3722_write(struct as3722_softc * sc,uint8_t reg,uint8_t val)125ef2ee5d0SMichal Meloun as3722_write(struct as3722_softc *sc, uint8_t reg, uint8_t val)
126ef2ee5d0SMichal Meloun {
127ef2ee5d0SMichal Meloun 	uint8_t data[2];
128ef2ee5d0SMichal Meloun 	int rv;
129ef2ee5d0SMichal Meloun 
130ef2ee5d0SMichal Meloun 	struct iic_msg msgs[1] = {
131ef2ee5d0SMichal Meloun 		{0, IIC_M_WR, 2, data},
132ef2ee5d0SMichal Meloun 	};
133ef2ee5d0SMichal Meloun 
134ef2ee5d0SMichal Meloun 	msgs[0].slave = sc->bus_addr;
135ef2ee5d0SMichal Meloun 	data[0] = reg;
136ef2ee5d0SMichal Meloun 	data[1] = val;
137ef2ee5d0SMichal Meloun 
138ef2ee5d0SMichal Meloun 	rv = iicbus_transfer(sc->dev, msgs, 1);
139ef2ee5d0SMichal Meloun 	if (rv != 0) {
140ef2ee5d0SMichal Meloun 		device_printf(sc->dev,
141ef2ee5d0SMichal Meloun 		    "Error when writing reg 0x%02X, rv: %d\n", reg, rv);
142ef2ee5d0SMichal Meloun 		return (EIO);
143ef2ee5d0SMichal Meloun 	}
144ef2ee5d0SMichal Meloun 	return (0);
145ef2ee5d0SMichal Meloun }
146ef2ee5d0SMichal Meloun 
as3722_write_buf(struct as3722_softc * sc,uint8_t reg,uint8_t * buf,size_t size)147ef2ee5d0SMichal Meloun int as3722_write_buf(struct as3722_softc *sc, uint8_t reg, uint8_t *buf,
148ef2ee5d0SMichal Meloun     size_t size)
149ef2ee5d0SMichal Meloun {
150ef2ee5d0SMichal Meloun 	uint8_t data[1];
151ef2ee5d0SMichal Meloun 	int rv;
152ef2ee5d0SMichal Meloun 	struct iic_msg msgs[2] = {
153ef2ee5d0SMichal Meloun 		{0, IIC_M_WR, 1, data},
154ef2ee5d0SMichal Meloun 		{0, IIC_M_WR | IIC_M_NOSTART, size, buf},
155ef2ee5d0SMichal Meloun 	};
156ef2ee5d0SMichal Meloun 
157ef2ee5d0SMichal Meloun 	msgs[0].slave = sc->bus_addr;
158ef2ee5d0SMichal Meloun 	msgs[1].slave = sc->bus_addr;
159ef2ee5d0SMichal Meloun 	data[0] = reg;
160ef2ee5d0SMichal Meloun 
161ef2ee5d0SMichal Meloun 	rv = iicbus_transfer(sc->dev, msgs, 2);
162ef2ee5d0SMichal Meloun 	if (rv != 0) {
163ef2ee5d0SMichal Meloun 		device_printf(sc->dev,
164ef2ee5d0SMichal Meloun 		    "Error when writing reg 0x%02X, rv: %d\n", reg, rv);
165ef2ee5d0SMichal Meloun 		return (EIO);
166ef2ee5d0SMichal Meloun 	}
167ef2ee5d0SMichal Meloun 	return (0);
168ef2ee5d0SMichal Meloun }
169ef2ee5d0SMichal Meloun 
170ef2ee5d0SMichal Meloun int
as3722_modify(struct as3722_softc * sc,uint8_t reg,uint8_t clear,uint8_t set)171ef2ee5d0SMichal Meloun as3722_modify(struct as3722_softc *sc, uint8_t reg, uint8_t clear, uint8_t set)
172ef2ee5d0SMichal Meloun {
173ef2ee5d0SMichal Meloun 	uint8_t val;
174ef2ee5d0SMichal Meloun 	int rv;
175ef2ee5d0SMichal Meloun 
176ef2ee5d0SMichal Meloun 	rv = as3722_read(sc, reg, &val);
177ef2ee5d0SMichal Meloun 	if (rv != 0)
178ef2ee5d0SMichal Meloun 		return (rv);
179ef2ee5d0SMichal Meloun 
180ef2ee5d0SMichal Meloun 	val &= ~clear;
181ef2ee5d0SMichal Meloun 	val |= set;
182ef2ee5d0SMichal Meloun 
183ef2ee5d0SMichal Meloun 	rv = as3722_write(sc, reg, val);
184ef2ee5d0SMichal Meloun 	if (rv != 0)
185ef2ee5d0SMichal Meloun 		return (rv);
186ef2ee5d0SMichal Meloun 
187ef2ee5d0SMichal Meloun 	return (0);
188ef2ee5d0SMichal Meloun }
189ef2ee5d0SMichal Meloun 
190ef2ee5d0SMichal Meloun static int
as3722_get_version(struct as3722_softc * sc)191ef2ee5d0SMichal Meloun as3722_get_version(struct as3722_softc *sc)
192ef2ee5d0SMichal Meloun {
193ef2ee5d0SMichal Meloun 	uint8_t reg;
194ef2ee5d0SMichal Meloun 	int rv;
195ef2ee5d0SMichal Meloun 
196ef2ee5d0SMichal Meloun 	/* Verify AS3722 ID and version. */
197ef2ee5d0SMichal Meloun 	rv = RD1(sc, AS3722_ASIC_ID1, &reg);
198ef2ee5d0SMichal Meloun 	if (rv != 0)
199ef2ee5d0SMichal Meloun 		return (ENXIO);
200ef2ee5d0SMichal Meloun 
201ef2ee5d0SMichal Meloun 	if (reg != AS3722_DEVICE_ID) {
202ef2ee5d0SMichal Meloun 		device_printf(sc->dev, "Invalid chip ID is 0x%x\n", reg);
203ef2ee5d0SMichal Meloun 		return (ENXIO);
204ef2ee5d0SMichal Meloun 	}
205ef2ee5d0SMichal Meloun 
206ef2ee5d0SMichal Meloun 	rv = RD1(sc, AS3722_ASIC_ID2, &sc->chip_rev);
207ef2ee5d0SMichal Meloun 	if (rv != 0)
208ef2ee5d0SMichal Meloun 		return (ENXIO);
209ef2ee5d0SMichal Meloun 
210ef2ee5d0SMichal Meloun 	if (bootverbose)
211ef2ee5d0SMichal Meloun 		device_printf(sc->dev, "AS3722 rev: 0x%x\n", sc->chip_rev);
212ef2ee5d0SMichal Meloun 	return (0);
213ef2ee5d0SMichal Meloun }
214ef2ee5d0SMichal Meloun 
215ef2ee5d0SMichal Meloun static int
as3722_init(struct as3722_softc * sc)216ef2ee5d0SMichal Meloun as3722_init(struct as3722_softc *sc)
217ef2ee5d0SMichal Meloun {
218ef2ee5d0SMichal Meloun 	uint32_t reg;
219ef2ee5d0SMichal Meloun 	int rv;
220ef2ee5d0SMichal Meloun 
221ef2ee5d0SMichal Meloun 	reg = 0;
222ef2ee5d0SMichal Meloun 	if (sc->int_pullup)
223ef2ee5d0SMichal Meloun 		reg |= AS3722_INT_PULL_UP;
224ef2ee5d0SMichal Meloun 	if (sc->i2c_pullup)
225ef2ee5d0SMichal Meloun 		reg |= AS3722_I2C_PULL_UP;
226ef2ee5d0SMichal Meloun 
227ef2ee5d0SMichal Meloun 	rv = RM1(sc, AS3722_IO_VOLTAGE,
228ef2ee5d0SMichal Meloun 	    AS3722_INT_PULL_UP | AS3722_I2C_PULL_UP, reg);
229ef2ee5d0SMichal Meloun 	if (rv != 0)
230ef2ee5d0SMichal Meloun 		return (ENXIO);
231ef2ee5d0SMichal Meloun 
232ef2ee5d0SMichal Meloun 	/* mask interrupts */
233ef2ee5d0SMichal Meloun 	rv = WR1(sc, AS3722_INTERRUPT_MASK1, 0);
234ef2ee5d0SMichal Meloun 	if (rv != 0)
235ef2ee5d0SMichal Meloun 		return (ENXIO);
236ef2ee5d0SMichal Meloun 	rv = WR1(sc, AS3722_INTERRUPT_MASK2, 0);
237ef2ee5d0SMichal Meloun 	if (rv != 0)
238ef2ee5d0SMichal Meloun 		return (ENXIO);
239ef2ee5d0SMichal Meloun 	rv = WR1(sc, AS3722_INTERRUPT_MASK3, 0);
240ef2ee5d0SMichal Meloun 	if (rv != 0)
241ef2ee5d0SMichal Meloun 		return (ENXIO);
242ef2ee5d0SMichal Meloun 	rv = WR1(sc, AS3722_INTERRUPT_MASK4, 0);
243ef2ee5d0SMichal Meloun 	if (rv != 0)
244ef2ee5d0SMichal Meloun 		return (ENXIO);
245ef2ee5d0SMichal Meloun 	return (0);
246ef2ee5d0SMichal Meloun }
247ef2ee5d0SMichal Meloun 
248ef2ee5d0SMichal Meloun static int
as3722_parse_fdt(struct as3722_softc * sc,phandle_t node)249ef2ee5d0SMichal Meloun as3722_parse_fdt(struct as3722_softc *sc, phandle_t node)
250ef2ee5d0SMichal Meloun {
251ef2ee5d0SMichal Meloun 
252ef2ee5d0SMichal Meloun 	sc->int_pullup =
253ef2ee5d0SMichal Meloun 	    OF_hasprop(node, "ams,enable-internal-int-pullup") ? 1 : 0;
254ef2ee5d0SMichal Meloun 	sc->i2c_pullup =
255ef2ee5d0SMichal Meloun 	    OF_hasprop(node, "ams,enable-internal-i2c-pullup") ? 1 : 0;
256ef2ee5d0SMichal Meloun 	return 0;
257ef2ee5d0SMichal Meloun }
258ef2ee5d0SMichal Meloun 
259ef2ee5d0SMichal Meloun static void
as3722_intr(void * arg)260ef2ee5d0SMichal Meloun as3722_intr(void *arg)
261ef2ee5d0SMichal Meloun {
262ef2ee5d0SMichal Meloun 	/* XXX Finish temperature alarms. */
263ef2ee5d0SMichal Meloun }
264ef2ee5d0SMichal Meloun 
265ef2ee5d0SMichal Meloun static int
as3722_probe(device_t dev)266ef2ee5d0SMichal Meloun as3722_probe(device_t dev)
267ef2ee5d0SMichal Meloun {
268ef2ee5d0SMichal Meloun 
269ef2ee5d0SMichal Meloun 	if (!ofw_bus_status_okay(dev))
270ef2ee5d0SMichal Meloun 		return (ENXIO);
271ef2ee5d0SMichal Meloun 
272ef2ee5d0SMichal Meloun 	if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
273ef2ee5d0SMichal Meloun 		return (ENXIO);
274ef2ee5d0SMichal Meloun 
275ef2ee5d0SMichal Meloun 	device_set_desc(dev, "AS3722 PMIC");
276ef2ee5d0SMichal Meloun 	return (BUS_PROBE_DEFAULT);
277ef2ee5d0SMichal Meloun }
278ef2ee5d0SMichal Meloun 
279ef2ee5d0SMichal Meloun static int
as3722_attach(device_t dev)280ef2ee5d0SMichal Meloun as3722_attach(device_t dev)
281ef2ee5d0SMichal Meloun {
282ef2ee5d0SMichal Meloun 	struct as3722_softc *sc;
2834b9b6a50SJohn Baldwin 	int rv, rid;
284ef2ee5d0SMichal Meloun 	phandle_t node;
285ef2ee5d0SMichal Meloun 
286ef2ee5d0SMichal Meloun 	sc = device_get_softc(dev);
287ef2ee5d0SMichal Meloun 	sc->dev = dev;
288ef2ee5d0SMichal Meloun 	sc->bus_addr = iicbus_get_addr(dev);
289ef2ee5d0SMichal Meloun 	node = ofw_bus_get_node(sc->dev);
290ef2ee5d0SMichal Meloun 	rv = 0;
291ef2ee5d0SMichal Meloun 	LOCK_INIT(sc);
292ef2ee5d0SMichal Meloun 
293ef2ee5d0SMichal Meloun 	rid = 0;
294ef2ee5d0SMichal Meloun 	sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
295ef2ee5d0SMichal Meloun 	    RF_ACTIVE);
296ef2ee5d0SMichal Meloun 	if (sc->irq_res == NULL) {
297ef2ee5d0SMichal Meloun 		device_printf(dev, "Cannot allocate interrupt.\n");
298ef2ee5d0SMichal Meloun 		rv = ENXIO;
299ef2ee5d0SMichal Meloun 		goto fail;
300ef2ee5d0SMichal Meloun 	}
301ef2ee5d0SMichal Meloun 
302ef2ee5d0SMichal Meloun 	rv = as3722_parse_fdt(sc, node);
303ef2ee5d0SMichal Meloun 	if (rv != 0)
304ef2ee5d0SMichal Meloun 		goto fail;
305ef2ee5d0SMichal Meloun 	rv = as3722_get_version(sc);
306ef2ee5d0SMichal Meloun 	if (rv != 0)
307ef2ee5d0SMichal Meloun 		goto fail;
308ef2ee5d0SMichal Meloun 	rv = as3722_init(sc);
309ef2ee5d0SMichal Meloun 	if (rv != 0)
310ef2ee5d0SMichal Meloun 		goto fail;
311ef2ee5d0SMichal Meloun 	rv = as3722_regulator_attach(sc, node);
312ef2ee5d0SMichal Meloun 	if (rv != 0)
313ef2ee5d0SMichal Meloun 		goto fail;
314ef2ee5d0SMichal Meloun 	rv = as3722_gpio_attach(sc, node);
315ef2ee5d0SMichal Meloun 	if (rv != 0)
316ef2ee5d0SMichal Meloun 		goto fail;
317ef2ee5d0SMichal Meloun 	rv = as3722_rtc_attach(sc, node);
318ef2ee5d0SMichal Meloun 	if (rv != 0)
319ef2ee5d0SMichal Meloun 		goto fail;
320ef2ee5d0SMichal Meloun 
321ef2ee5d0SMichal Meloun 	fdt_pinctrl_register(dev, NULL);
322ef2ee5d0SMichal Meloun 	fdt_pinctrl_configure_by_name(dev, "default");
323ef2ee5d0SMichal Meloun 
324ef2ee5d0SMichal Meloun 	/* Setup  interrupt. */
325ef2ee5d0SMichal Meloun 	rv = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
326ef2ee5d0SMichal Meloun 	    NULL, as3722_intr, sc, &sc->irq_h);
327ef2ee5d0SMichal Meloun 	if (rv) {
328ef2ee5d0SMichal Meloun 		device_printf(dev, "Cannot setup interrupt.\n");
329ef2ee5d0SMichal Meloun 		goto fail;
330ef2ee5d0SMichal Meloun 	}
331ef2ee5d0SMichal Meloun 	return (bus_generic_attach(dev));
332ef2ee5d0SMichal Meloun 
333ef2ee5d0SMichal Meloun fail:
334ef2ee5d0SMichal Meloun 	if (sc->irq_h != NULL)
335ef2ee5d0SMichal Meloun 		bus_teardown_intr(dev, sc->irq_res, sc->irq_h);
336ef2ee5d0SMichal Meloun 	if (sc->irq_res != NULL)
337ef2ee5d0SMichal Meloun 		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
338ef2ee5d0SMichal Meloun 	LOCK_DESTROY(sc);
339ef2ee5d0SMichal Meloun 	return (rv);
340ef2ee5d0SMichal Meloun }
341ef2ee5d0SMichal Meloun 
342ef2ee5d0SMichal Meloun static int
as3722_detach(device_t dev)343ef2ee5d0SMichal Meloun as3722_detach(device_t dev)
344ef2ee5d0SMichal Meloun {
345ef2ee5d0SMichal Meloun 	struct as3722_softc *sc;
346ef2ee5d0SMichal Meloun 
347ef2ee5d0SMichal Meloun 	sc = device_get_softc(dev);
348ef2ee5d0SMichal Meloun 	if (sc->irq_h != NULL)
349ef2ee5d0SMichal Meloun 		bus_teardown_intr(dev, sc->irq_res, sc->irq_h);
350ef2ee5d0SMichal Meloun 	if (sc->irq_res != NULL)
351ef2ee5d0SMichal Meloun 		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
352ef2ee5d0SMichal Meloun 	LOCK_DESTROY(sc);
353ef2ee5d0SMichal Meloun 
354ef2ee5d0SMichal Meloun 	return (bus_generic_detach(dev));
355ef2ee5d0SMichal Meloun }
356ef2ee5d0SMichal Meloun 
357ef2ee5d0SMichal Meloun static phandle_t
as3722_gpio_get_node(device_t bus,device_t dev)358ef2ee5d0SMichal Meloun as3722_gpio_get_node(device_t bus, device_t dev)
359ef2ee5d0SMichal Meloun {
360ef2ee5d0SMichal Meloun 
361ef2ee5d0SMichal Meloun 	/* We only have one child, the GPIO bus, which needs our own node. */
362ef2ee5d0SMichal Meloun 	return (ofw_bus_get_node(bus));
363ef2ee5d0SMichal Meloun }
364ef2ee5d0SMichal Meloun 
365ef2ee5d0SMichal Meloun static device_method_t as3722_methods[] = {
366ef2ee5d0SMichal Meloun 	/* Device interface */
367ef2ee5d0SMichal Meloun 	DEVMETHOD(device_probe,		as3722_probe),
368ef2ee5d0SMichal Meloun 	DEVMETHOD(device_attach,	as3722_attach),
369ef2ee5d0SMichal Meloun 	DEVMETHOD(device_detach,	as3722_detach),
370ef2ee5d0SMichal Meloun 
371ef2ee5d0SMichal Meloun 	/* Regdev interface */
372ef2ee5d0SMichal Meloun 	DEVMETHOD(regdev_map,		as3722_regulator_map),
373ef2ee5d0SMichal Meloun 
374ef2ee5d0SMichal Meloun 	/* RTC interface */
375ef2ee5d0SMichal Meloun 	DEVMETHOD(clock_gettime,	as3722_rtc_gettime),
376ef2ee5d0SMichal Meloun 	DEVMETHOD(clock_settime,	as3722_rtc_settime),
377ef2ee5d0SMichal Meloun 
378ef2ee5d0SMichal Meloun 	/* GPIO protocol interface */
379ef2ee5d0SMichal Meloun 	DEVMETHOD(gpio_get_bus,		as3722_gpio_get_bus),
380ef2ee5d0SMichal Meloun 	DEVMETHOD(gpio_pin_max,		as3722_gpio_pin_max),
381ef2ee5d0SMichal Meloun 	DEVMETHOD(gpio_pin_getname,	as3722_gpio_pin_getname),
382ef2ee5d0SMichal Meloun 	DEVMETHOD(gpio_pin_getflags,	as3722_gpio_pin_getflags),
383ef2ee5d0SMichal Meloun 	DEVMETHOD(gpio_pin_getcaps,	as3722_gpio_pin_getcaps),
384ef2ee5d0SMichal Meloun 	DEVMETHOD(gpio_pin_setflags,	as3722_gpio_pin_setflags),
385ef2ee5d0SMichal Meloun 	DEVMETHOD(gpio_pin_get,		as3722_gpio_pin_get),
386ef2ee5d0SMichal Meloun 	DEVMETHOD(gpio_pin_set,		as3722_gpio_pin_set),
387ef2ee5d0SMichal Meloun 	DEVMETHOD(gpio_pin_toggle,	as3722_gpio_pin_toggle),
388ef2ee5d0SMichal Meloun 	DEVMETHOD(gpio_map_gpios,	as3722_gpio_map_gpios),
389ef2ee5d0SMichal Meloun 
390ef2ee5d0SMichal Meloun 	/* fdt_pinctrl interface */
391ef2ee5d0SMichal Meloun 	DEVMETHOD(fdt_pinctrl_configure, as3722_pinmux_configure),
392ef2ee5d0SMichal Meloun 
393ef2ee5d0SMichal Meloun 	/* ofw_bus interface */
394ef2ee5d0SMichal Meloun 	DEVMETHOD(ofw_bus_get_node,	as3722_gpio_get_node),
395ef2ee5d0SMichal Meloun 
396ef2ee5d0SMichal Meloun 	DEVMETHOD_END
397ef2ee5d0SMichal Meloun };
398ef2ee5d0SMichal Meloun 
3994bda238aSMichal Meloun static DEFINE_CLASS_0(gpio, as3722_driver, as3722_methods,
400ef2ee5d0SMichal Meloun     sizeof(struct as3722_softc));
401289f133bSJohn Baldwin EARLY_DRIVER_MODULE(as3722, iicbus, as3722_driver, NULL, NULL, 74);
402