1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #ifndef	__QCOM_SCM_LEGACY_DEFS_H__
29 #define	__QCOM_SCM_LEGACY_DEFS_H__
30 
31 /*
32  * These definitions are specific to the 32 bit legacy SCM interface
33  * used by the IPQ806x and IPQ401x SoCs.
34  */
35 
36 /*
37  * Mapping of the SCM service/command fields into the a0 argument
38  * in an SMC instruction call.
39  *
40  * This is particular to the legacy SCM interface, and is not the
41  * same as the non-legacy 32/64 bit FNID mapping layout.
42  */
43 #define	QCOM_SCM_LEGACY_SMC_FNID(s, c)		(((s) << 10) | ((c) & 0x3ff))
44 
45 /*
46  * There are two kinds of SCM calls in this legacy path.
47  *
48  * The first kind are the normal ones - up to a defined max of arguments,
49  * a defined max of responses and some identifiers for all of it.
50  * They can be issues in parallel on different cores, can be interrupted,
51  * etc.
52  *
53  * The second kind are what are termed "atomic" SCM calls -
54  * up to 5 argument DWORDs, up to 3 response DWORDs, done atomically,
55  * not interruptable/parallel.
56  *
57  * The former use the structures below to represent the request and response
58  * in memory.  The latter use defines and a direct SMC call with the
59  * arguments in registers.
60  */
61 
62 struct qcom_scm_legacy_smc_args {
63 	uint32_t args[8];
64 };
65 
66 /*
67  * Atomic SCM call command/response buffer definitions.
68  */
69 #define	QCOM_SCM_LEGACY_ATOMIC_MAX_ARGCOUNT		5
70 #define	QCOM_SCM_LEGACY_CLASS_REGISTER			(0x2 << 8)
71 #define	QCOM_SCM_LEGACY_MASK_IRQS			(1U << 5)
72 
73 /*
74  * Mapping an SCM service/command/argcount into the a0 register
75  * for an SMC instruction call.
76  */
77 #define	QCOM_SCM_LEGACY_ATOMIC_ID(svc, cmd, n) \
78 	    ((QCOM_SCM_LEGACY_SMC_FNID((svc), cmd) << 12) | \
79 	    QCOM_SCM_LEGACY_CLASS_REGISTER | \
80 	    QCOM_SCM_LEGACY_MASK_IRQS | \
81 	    ((n) & 0xf))
82 
83 /*
84  * Legacy command/response buffer definitions.
85  *
86  * The legacy path contains up to the defined maximum arguments
87  * but only a single command/response pair per call.
88  *
89  * A command and response buffer is laid out in memory as such:
90  *
91  * | command header     |
92  * | (buffer payload)   |
93  * | response header    |
94  * | (response payload) |
95  */
96 
97 /*
98  * The command header.
99  *
100  * len - the length of the total command and response, including
101  *       the headers.
102  *
103  * buf_offset - the offset inside the buffer, starting at the
104  *       beginning of this command header, where the command buffer
105  *       is found.  The end is the byte before the response_header_offset.
106  *
107  * response_header_offset - the offset inside the buffer where
108  *       the response header is found.
109  *
110  * id - the QCOM_SCM_LEGACY_SMC_FNID() - service/command ids
111  */
112 struct qcom_scm_legacy_command_header {
113 	uint32_t len;
114 	uint32_t buf_offset;
115 	uint32_t response_header_offset;
116 	uint32_t id;
117 };
118 
119 /*
120  * The response header.
121  *
122  * This is found immediately after the command header and command
123  * buffer payload.
124  *
125  * len - the total amount of memory available for the response.
126  *       Linux doesn't set this; it always passes in a response
127  *       buffer large enough to store MAX_QCOM_SCM_RETS * DWORD
128  *       bytes.
129  *
130  *       It's also possible this is set by the firmware.
131  *
132  * buf_offset - start of response buffer, relative to the beginning
133  *       of the command header.  This also isn't set in Linux before
134  *       calling the SMC instruction, but it is checked afterwards
135  *       to assemble a pointer to the response data.  The firmware
136  *       likely sets this.
137  *
138  * is_complete - true if complete.  Linux loops over DMA sync to
139  *       check if this is complete even after the SMC call returns.
140  */
141 struct qcom_scm_legacy_response_header {
142 	uint32_t len;
143 	uint32_t buf_offset;
144 	uint32_t is_complete;
145 };
146 
147 #endif	/* __QCOM_SCM_LEGACY_DEFS_H__ */
148