1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/bus.h> 32 #include <sys/kernel.h> 33 #include <sys/module.h> 34 #include <sys/malloc.h> 35 #include <sys/rman.h> 36 #include <sys/timeet.h> 37 #include <sys/timetc.h> 38 #include <machine/bus.h> 39 40 #include <machine/machdep.h> /* For arm_set_delay */ 41 42 #include <dev/extres/clk/clk.h> 43 44 #include <dev/ofw/openfirm.h> 45 #include <dev/ofw/ofw_bus.h> 46 #include <dev/ofw/ofw_bus_subr.h> 47 48 #include <arm/ti/ti_sysc.h> 49 50 #include "am335x_dmtreg.h" 51 52 struct am335x_dmtimer_softc { 53 device_t dev; 54 int tmr_mem_rid; 55 struct resource * tmr_mem_res; 56 int tmr_irq_rid; 57 struct resource * tmr_irq_res; 58 void *tmr_irq_handler; 59 clk_t clk_fck; 60 uint64_t sysclk_freq; 61 uint32_t tclr; /* Cached TCLR register. */ 62 union { 63 struct timecounter tc; 64 struct eventtimer et; 65 } func; 66 int tmr_num; /* Hardware unit number. */ 67 char tmr_name[12]; /* "DMTimerN", N = tmr_num */ 68 }; 69 70 static struct am335x_dmtimer_softc *am335x_dmtimer_et_sc = NULL; 71 static struct am335x_dmtimer_softc *am335x_dmtimer_tc_sc = NULL; 72 73 static void am335x_dmtimer_delay(int, void *); 74 75 /* 76 * We use dmtimer2 for eventtimer and dmtimer3 for timecounter. 77 */ 78 #define ET_TMR_NUM 2 79 #define TC_TMR_NUM 3 80 81 /* List of compatible strings for FDT tree */ 82 static struct ofw_compat_data compat_data[] = { 83 {"ti,am335x-timer", 1}, 84 {"ti,am335x-timer-1ms", 1}, 85 {NULL, 0}, 86 }; 87 88 #define DMTIMER_READ4(sc, reg) bus_read_4((sc)->tmr_mem_res, (reg)) 89 #define DMTIMER_WRITE4(sc, reg, val) bus_write_4((sc)->tmr_mem_res, (reg), (val)) 90 91 static int 92 am335x_dmtimer_et_start(struct eventtimer *et, sbintime_t first, sbintime_t period) 93 { 94 struct am335x_dmtimer_softc *sc; 95 uint32_t initial_count, reload_count; 96 97 sc = et->et_priv; 98 99 /* 100 * Stop the timer before changing it. This routine will often be called 101 * while the timer is still running, to either lengthen or shorten the 102 * current event time. We need to ensure the timer doesn't expire while 103 * we're working with it. 104 * 105 * Also clear any pending interrupt status, because it's at least 106 * theoretically possible that we're running in a primary interrupt 107 * context now, and a timer interrupt could be pending even before we 108 * stopped the timer. The more likely case is that we're being called 109 * from the et_event_cb() routine dispatched from our own handler, but 110 * it's not clear to me that that's the only case possible. 111 */ 112 sc->tclr &= ~(DMT_TCLR_START | DMT_TCLR_AUTOLOAD); 113 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); 114 DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); 115 116 if (period != 0) { 117 reload_count = ((uint32_t)et->et_frequency * period) >> 32; 118 sc->tclr |= DMT_TCLR_AUTOLOAD; 119 } else { 120 reload_count = 0; 121 } 122 123 if (first != 0) 124 initial_count = ((uint32_t)et->et_frequency * first) >> 32; 125 else 126 initial_count = reload_count; 127 128 /* 129 * Set auto-reload and current-count values. This timer hardware counts 130 * up from the initial/reload value and interrupts on the zero rollover. 131 */ 132 DMTIMER_WRITE4(sc, DMT_TLDR, 0xFFFFFFFF - reload_count); 133 DMTIMER_WRITE4(sc, DMT_TCRR, 0xFFFFFFFF - initial_count); 134 135 /* Enable overflow interrupt, and start the timer. */ 136 DMTIMER_WRITE4(sc, DMT_IRQENABLE_SET, DMT_IRQ_OVF); 137 sc->tclr |= DMT_TCLR_START; 138 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); 139 140 return (0); 141 } 142 143 static int 144 am335x_dmtimer_et_stop(struct eventtimer *et) 145 { 146 struct am335x_dmtimer_softc *sc; 147 148 sc = et->et_priv; 149 150 /* Stop timer, disable and clear interrupt. */ 151 sc->tclr &= ~(DMT_TCLR_START | DMT_TCLR_AUTOLOAD); 152 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); 153 DMTIMER_WRITE4(sc, DMT_IRQENABLE_CLR, DMT_IRQ_OVF); 154 DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); 155 return (0); 156 } 157 158 static int 159 am335x_dmtimer_et_intr(void *arg) 160 { 161 struct am335x_dmtimer_softc *sc; 162 163 sc = arg; 164 165 /* Ack the interrupt, and invoke the callback if it's still enabled. */ 166 DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); 167 if (sc->func.et.et_active) 168 sc->func.et.et_event_cb(&sc->func.et, sc->func.et.et_arg); 169 170 return (FILTER_HANDLED); 171 } 172 173 static int 174 am335x_dmtimer_et_init(struct am335x_dmtimer_softc *sc) 175 { 176 KASSERT(am335x_dmtimer_et_sc == NULL, ("already have an eventtimer")); 177 178 /* 179 * Setup eventtimer interrupt handling. Panic if anything goes wrong, 180 * because the system just isn't going to run without an eventtimer. 181 */ 182 sc->tmr_irq_res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, 183 &sc->tmr_irq_rid, RF_ACTIVE); 184 if (sc->tmr_irq_res == NULL) 185 panic("am335x_dmtimer: could not allocate irq resources"); 186 if (bus_setup_intr(sc->dev, sc->tmr_irq_res, INTR_TYPE_CLK, 187 am335x_dmtimer_et_intr, NULL, sc, &sc->tmr_irq_handler) != 0) 188 panic("am335x_dmtimer: count not setup irq handler"); 189 190 sc->func.et.et_name = sc->tmr_name; 191 sc->func.et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT; 192 sc->func.et.et_quality = 500; 193 sc->func.et.et_frequency = sc->sysclk_freq; 194 sc->func.et.et_min_period = 195 ((0x00000005LLU << 32) / sc->func.et.et_frequency); 196 sc->func.et.et_max_period = 197 (0xfffffffeLLU << 32) / sc->func.et.et_frequency; 198 sc->func.et.et_start = am335x_dmtimer_et_start; 199 sc->func.et.et_stop = am335x_dmtimer_et_stop; 200 sc->func.et.et_priv = sc; 201 202 am335x_dmtimer_et_sc = sc; 203 et_register(&sc->func.et); 204 205 return (0); 206 } 207 208 static unsigned 209 am335x_dmtimer_tc_get_timecount(struct timecounter *tc) 210 { 211 struct am335x_dmtimer_softc *sc; 212 213 sc = tc->tc_priv; 214 215 return (DMTIMER_READ4(sc, DMT_TCRR)); 216 } 217 218 static int 219 am335x_dmtimer_tc_init(struct am335x_dmtimer_softc *sc) 220 { 221 KASSERT(am335x_dmtimer_tc_sc == NULL, ("already have a timecounter")); 222 223 /* Set up timecounter, start it, register it. */ 224 DMTIMER_WRITE4(sc, DMT_TSICR, DMT_TSICR_RESET); 225 while (DMTIMER_READ4(sc, DMT_TIOCP_CFG) & DMT_TIOCP_RESET) 226 continue; 227 228 sc->tclr |= DMT_TCLR_START | DMT_TCLR_AUTOLOAD; 229 DMTIMER_WRITE4(sc, DMT_TLDR, 0); 230 DMTIMER_WRITE4(sc, DMT_TCRR, 0); 231 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); 232 233 sc->func.tc.tc_name = sc->tmr_name; 234 sc->func.tc.tc_get_timecount = am335x_dmtimer_tc_get_timecount; 235 sc->func.tc.tc_counter_mask = ~0u; 236 sc->func.tc.tc_frequency = sc->sysclk_freq; 237 sc->func.tc.tc_quality = 500; 238 sc->func.tc.tc_priv = sc; 239 240 am335x_dmtimer_tc_sc = sc; 241 tc_init(&sc->func.tc); 242 243 arm_set_delay(am335x_dmtimer_delay, sc); 244 245 return (0); 246 } 247 248 static int 249 am335x_dmtimer_probe(device_t dev) 250 { 251 char strbuf[32]; 252 int tmr_num; 253 uint64_t rev_address; 254 255 if (!ofw_bus_status_okay(dev)) 256 return (ENXIO); 257 258 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 259 return (ENXIO); 260 261 /* 262 * Get the hardware unit number from address of rev register. 263 * If this isn't the hardware unit we're going to use for either the 264 * eventtimer or the timecounter, no point in instantiating the device. 265 */ 266 rev_address = ti_sysc_get_rev_address(device_get_parent(dev)); 267 switch (rev_address) { 268 case DMTIMER2_REV: 269 tmr_num = 2; 270 break; 271 case DMTIMER3_REV: 272 tmr_num = 3; 273 break; 274 default: 275 /* Not DMTIMER2 or DMTIMER3 */ 276 return (ENXIO); 277 } 278 279 snprintf(strbuf, sizeof(strbuf), "AM335x DMTimer%d", tmr_num); 280 device_set_desc_copy(dev, strbuf); 281 282 return(BUS_PROBE_DEFAULT); 283 } 284 285 static int 286 am335x_dmtimer_attach(device_t dev) 287 { 288 struct am335x_dmtimer_softc *sc; 289 int err; 290 uint64_t rev_address; 291 clk_t sys_clkin; 292 293 sc = device_get_softc(dev); 294 sc->dev = dev; 295 296 /* expect one clock */ 297 err = clk_get_by_ofw_index(dev, 0, 0, &sc->clk_fck); 298 if (err != 0) { 299 device_printf(dev, "Cant find clock index 0. err: %d\n", err); 300 return (ENXIO); 301 } 302 303 err = clk_get_by_name(dev, "sys_clkin_ck@40", &sys_clkin); 304 if (err != 0) { 305 device_printf(dev, "Cant find sys_clkin_ck@40 err: %d\n", err); 306 return (ENXIO); 307 } 308 309 /* Select M_OSC as DPLL parent */ 310 err = clk_set_parent_by_clk(sc->clk_fck, sys_clkin); 311 if (err != 0) { 312 device_printf(dev, "Cant set mux to CLK_M_OSC\n"); 313 return (ENXIO); 314 } 315 316 /* Enable clocks and power on the device. */ 317 err = ti_sysc_clock_enable(device_get_parent(dev)); 318 if (err != 0) { 319 device_printf(dev, "Cant enable sysc clkctrl, err %d\n", err); 320 return (ENXIO); 321 } 322 323 /* Get the base clock frequency. */ 324 err = clk_get_freq(sc->clk_fck, &sc->sysclk_freq); 325 if (err != 0) { 326 device_printf(dev, "Cant get sysclk frequency, err %d\n", err); 327 return (ENXIO); 328 } 329 330 /* Request the memory resources. */ 331 sc->tmr_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 332 &sc->tmr_mem_rid, RF_ACTIVE); 333 if (sc->tmr_mem_res == NULL) { 334 return (ENXIO); 335 } 336 337 rev_address = ti_sysc_get_rev_address(device_get_parent(dev)); 338 switch (rev_address) { 339 case DMTIMER2_REV: 340 sc->tmr_num = 2; 341 break; 342 case DMTIMER3_REV: 343 sc->tmr_num = 3; 344 break; 345 default: 346 device_printf(dev, "Not timer 2 or 3! %#jx\n", 347 rev_address); 348 return (ENXIO); 349 } 350 351 snprintf(sc->tmr_name, sizeof(sc->tmr_name), "DMTimer%d", sc->tmr_num); 352 353 /* 354 * Go set up either a timecounter or eventtimer. We wouldn't have 355 * attached if we weren't one or the other. 356 */ 357 if (sc->tmr_num == ET_TMR_NUM) 358 am335x_dmtimer_et_init(sc); 359 else if (sc->tmr_num == TC_TMR_NUM) 360 am335x_dmtimer_tc_init(sc); 361 else 362 panic("am335x_dmtimer: bad timer number %d", sc->tmr_num); 363 364 return (0); 365 } 366 367 static device_method_t am335x_dmtimer_methods[] = { 368 DEVMETHOD(device_probe, am335x_dmtimer_probe), 369 DEVMETHOD(device_attach, am335x_dmtimer_attach), 370 { 0, 0 } 371 }; 372 373 static driver_t am335x_dmtimer_driver = { 374 "am335x_dmtimer", 375 am335x_dmtimer_methods, 376 sizeof(struct am335x_dmtimer_softc), 377 }; 378 379 DRIVER_MODULE(am335x_dmtimer, simplebus, am335x_dmtimer_driver, 0, 0); 380 MODULE_DEPEND(am335x_dmtimer, ti_sysc, 1, 1, 1); 381 382 static void 383 am335x_dmtimer_delay(int usec, void *arg) 384 { 385 struct am335x_dmtimer_softc *sc = arg; 386 int32_t counts; 387 uint32_t first, last; 388 389 /* Get the number of times to count */ 390 counts = (usec + 1) * (sc->sysclk_freq / 1000000); 391 392 first = DMTIMER_READ4(sc, DMT_TCRR); 393 394 while (counts > 0) { 395 last = DMTIMER_READ4(sc, DMT_TCRR); 396 if (last > first) { 397 counts -= (int32_t)(last - first); 398 } else { 399 counts -= (int32_t)((0xFFFFFFFF - first) + last); 400 } 401 first = last; 402 } 403 } 404