xref: /freebsd/sys/arm/ti/clk/ti_mux_clock.c (revision 4e8d558c)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  */
29 
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32 
33 #include <sys/param.h>
34 #include <sys/conf.h>
35 #include <sys/bus.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
38 #include <sys/systm.h>
39 #include <sys/libkern.h>
40 #include <sys/types.h>
41 #include <sys/malloc.h>
42 
43 #include <machine/bus.h>
44 #include <dev/fdt/simplebus.h>
45 
46 #include <dev/extres/clk/clk_mux.h>
47 #include <dev/ofw/ofw_bus.h>
48 #include <dev/ofw/ofw_bus_subr.h>
49 
50 #include "clock_common.h"
51 
52 #if 0
53 #define DPRINTF(dev, msg...) device_printf(dev, msg)
54 #else
55 #define DPRINTF(dev, msg...)
56 #endif
57 
58 /*
59  * Devicetree description
60  * Documentation/devicetree/bindings/clock/ti/mux.txt
61  */
62 
63 struct ti_mux_softc {
64 	device_t		sc_dev;
65 	bool			attach_done;
66 
67 	struct clk_mux_def	mux_def;
68 	struct clock_cell_info	clock_cell;
69 	struct clkdom 		*clkdom;
70 };
71 
72 static int ti_mux_probe(device_t dev);
73 static int ti_mux_attach(device_t dev);
74 static int ti_mux_detach(device_t dev);
75 
76 #define TI_MUX_CLOCK			2
77 #define TI_COMPOSITE_MUX_CLOCK		1
78 #define TI_MUX_END			0
79 
80 static struct ofw_compat_data compat_data[] = {
81 	{ "ti,mux-clock",		TI_MUX_CLOCK },
82 	{ "ti,composite-mux-clock",	TI_COMPOSITE_MUX_CLOCK },
83 	{ NULL,				TI_MUX_END }
84 };
85 
86 static int
87 ti_mux_probe(device_t dev)
88 {
89 	if (!ofw_bus_status_okay(dev))
90 		return (ENXIO);
91 
92 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
93 		return (ENXIO);
94 
95 	device_set_desc(dev, "TI Mux Clock");
96 
97 	return (BUS_PROBE_DEFAULT);
98 }
99 
100 static int
101 register_clk(struct ti_mux_softc *sc) {
102 	int err;
103 
104 	sc->clkdom = clkdom_create(sc->sc_dev);
105 	if (sc->clkdom == NULL) {
106 		DPRINTF(sc->sc_dev, "Failed to create clkdom\n");
107 		return ENXIO;
108 	}
109 
110 	err = clknode_mux_register(sc->clkdom, &sc->mux_def);
111 	if (err) {
112 		DPRINTF(sc->sc_dev, "clknode_mux_register failed %x\n", err);
113 		return ENXIO;
114 	}
115 
116 	err = clkdom_finit(sc->clkdom);
117 	if (err) {
118 		DPRINTF(sc->sc_dev, "Clk domain finit fails %x.\n", err);
119 		return ENXIO;
120 	}
121 
122 	return 0;
123 }
124 
125 static int
126 ti_mux_attach(device_t dev)
127 {
128 	struct ti_mux_softc *sc;
129 	phandle_t node;
130 	int err;
131 	cell_t value;
132 
133 	sc = device_get_softc(dev);
134 	sc->sc_dev = dev;
135 	node = ofw_bus_get_node(dev);
136 
137 	/* Grab the content of reg properties */
138 	OF_getencprop(node, "reg", &value, sizeof(value));
139 	sc->mux_def.offset = value;
140 
141 	if (OF_hasprop(node, "ti,bit-shift")) {
142 		OF_getencprop(node, "ti,bit-shift", &value, sizeof(value));
143 		sc->mux_def.shift = value;
144 		DPRINTF(sc->sc_dev, "ti,bit-shift => shift %x\n", sc->mux_def.shift);
145 	}
146 	if (OF_hasprop(node, "ti,index-starts-at-one")) {
147 		/* FIXME: Add support in dev/extres/clk */
148 		/*sc->mux_def.mux_flags =  ... */
149 		device_printf(sc->sc_dev, "ti,index-starts-at-one - Not implemented\n");
150 	}
151 
152 	if (OF_hasprop(node, "ti,set-rate-parent"))
153 		device_printf(sc->sc_dev, "ti,set-rate-parent - Not implemented\n");
154 	if (OF_hasprop(node, "ti,latch-bit"))
155 		device_printf(sc->sc_dev, "ti,latch-bit - Not implemented\n");
156 
157 	read_clock_cells(sc->sc_dev, &sc->clock_cell);
158 
159 	create_clkdef(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef);
160 
161 	/* Figure out the width from ti_max_div */
162 	if (sc->mux_def.mux_flags)
163 		sc->mux_def.width = fls(sc->clock_cell.num_real_clocks-1);
164 	else
165 		sc->mux_def.width = fls(sc->clock_cell.num_real_clocks);
166 
167 	DPRINTF(sc->sc_dev, "sc->clock_cell.num_real_clocks %x def.width %x\n",
168 		sc->clock_cell.num_real_clocks, sc->mux_def.width);
169 
170 	err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef);
171 
172 	if (err) {
173 		/* free_clkdef will be called in ti_mux_new_pass */
174 		DPRINTF(sc->sc_dev, "find_parent_clock_names failed\n");
175 		return (bus_generic_attach(sc->sc_dev));
176 	}
177 
178 	err = register_clk(sc);
179 
180 	if (err) {
181 		/* free_clkdef will be called in ti_mux_new_pass */
182 		DPRINTF(sc->sc_dev, "register_clk failed\n");
183 		return (bus_generic_attach(sc->sc_dev));
184 	}
185 
186 	sc->attach_done = true;
187 
188 	free_clkdef(&sc->mux_def.clkdef);
189 
190 	return (bus_generic_attach(sc->sc_dev));
191 }
192 
193 static void
194 ti_mux_new_pass(device_t dev)
195 {
196 	struct ti_mux_softc *sc;
197 	int err;
198 
199 	sc = device_get_softc(dev);
200 
201 	if (sc->attach_done) {
202 		return;
203 	}
204 
205 	err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef);
206 	if (err) {
207 		/* free_clkdef will be called in later call to ti_mux_new_pass */
208 		DPRINTF(sc->sc_dev, "ti_mux_new_pass find_parent_clock_names failed\n");
209 		return;
210 	}
211 
212 	err = register_clk(sc);
213 	if (err) {
214 		/* free_clkdef will be called in later call to ti_mux_new_pass */
215 		DPRINTF(sc->sc_dev, "ti_mux_new_pass register_clk failed\n");
216 		return;
217 	}
218 
219 	sc->attach_done = true;
220 
221 	free_clkdef(&sc->mux_def.clkdef);
222 }
223 
224 static int
225 ti_mux_detach(device_t dev)
226 {
227 	return (EBUSY);
228 }
229 
230 static device_method_t ti_mux_methods[] = {
231 	/* Device interface */
232 	DEVMETHOD(device_probe,		ti_mux_probe),
233 	DEVMETHOD(device_attach,	ti_mux_attach),
234 	DEVMETHOD(device_detach,	ti_mux_detach),
235 
236 	/* Bus interface */
237 	DEVMETHOD(bus_new_pass,		ti_mux_new_pass),
238 
239 	DEVMETHOD_END
240 };
241 
242 DEFINE_CLASS_0(ti_mux, ti_mux_driver, ti_mux_methods,
243 	sizeof(struct ti_mux_softc));
244 
245 EARLY_DRIVER_MODULE(ti_mux, simplebus, ti_mux_driver, 0, 0,
246     BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
247 MODULE_VERSION(ti_mux, 1);
248