1 /*- 2 * Copyright (c) 2015 The FreeBSD Foundation 3 * 4 * This software was developed by Semihalf under 5 * the sponsorship of the FreeBSD Foundation. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/bitstring.h> 32 #include <sys/bus.h> 33 #include <sys/kernel.h> 34 #include <sys/module.h> 35 #include <sys/rman.h> 36 37 #include <machine/intr.h> 38 #include <machine/resource.h> 39 40 #include <dev/ofw/openfirm.h> 41 #include <dev/ofw/ofw_bus.h> 42 #include <dev/ofw/ofw_bus_subr.h> 43 44 #include <arm/arm/gic_common.h> 45 #include "gic_v3_reg.h" 46 #include "gic_v3_var.h" 47 48 /* 49 * FDT glue. 50 */ 51 static int gic_v3_fdt_probe(device_t); 52 static int gic_v3_fdt_attach(device_t); 53 54 static const struct ofw_bus_devinfo *gic_v3_ofw_get_devinfo(device_t, device_t); 55 static bus_get_resource_list_t gic_v3_fdt_get_resource_list; 56 57 static device_method_t gic_v3_fdt_methods[] = { 58 /* Device interface */ 59 DEVMETHOD(device_probe, gic_v3_fdt_probe), 60 DEVMETHOD(device_attach, gic_v3_fdt_attach), 61 62 /* Bus interface */ 63 DEVMETHOD(bus_get_resource_list, gic_v3_fdt_get_resource_list), 64 DEVMETHOD(bus_get_device_path, ofw_bus_gen_get_device_path), 65 66 /* ofw_bus interface */ 67 DEVMETHOD(ofw_bus_get_devinfo, gic_v3_ofw_get_devinfo), 68 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 69 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 70 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 71 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 72 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 73 74 /* End */ 75 DEVMETHOD_END 76 }; 77 78 DEFINE_CLASS_1(gic, gic_v3_fdt_driver, gic_v3_fdt_methods, 79 sizeof(struct gic_v3_softc), gic_v3_driver); 80 81 EARLY_DRIVER_MODULE(gic_v3, simplebus, gic_v3_fdt_driver, 0, 0, 82 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); 83 EARLY_DRIVER_MODULE(gic_v3, ofwbus, gic_v3_fdt_driver, 0, 0, 84 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); 85 86 /* 87 * Helper functions declarations. 88 */ 89 static int gic_v3_ofw_bus_attach(device_t); 90 91 /* 92 * Device interface. 93 */ 94 static int 95 gic_v3_fdt_probe(device_t dev) 96 { 97 98 if (!ofw_bus_status_okay(dev)) 99 return (ENXIO); 100 101 if (!ofw_bus_is_compatible(dev, "arm,gic-v3")) 102 return (ENXIO); 103 104 device_set_desc(dev, GIC_V3_DEVSTR); 105 return (BUS_PROBE_DEFAULT); 106 } 107 108 static int 109 gic_v3_fdt_attach(device_t dev) 110 { 111 struct gic_v3_softc *sc; 112 pcell_t redist_regions; 113 intptr_t xref; 114 int err; 115 uint32_t *mbi_ranges; 116 ssize_t ret; 117 118 sc = device_get_softc(dev); 119 sc->dev = dev; 120 sc->gic_bus = GIC_BUS_FDT; 121 122 /* 123 * Recover number of the Re-Distributor regions. 124 */ 125 if (OF_getencprop(ofw_bus_get_node(dev), "#redistributor-regions", 126 &redist_regions, sizeof(redist_regions)) <= 0) 127 sc->gic_redists.nregions = 1; 128 else 129 sc->gic_redists.nregions = redist_regions; 130 131 /* Add Message Based Interrupts using SPIs. */ 132 ret = OF_getencprop_alloc_multi(ofw_bus_get_node(dev), "mbi-ranges", 133 sizeof(*mbi_ranges), (void **)&mbi_ranges); 134 if (ret > 0) { 135 if (ret % 2 == 0) { 136 /* Limit to a single range for now. */ 137 sc->gic_mbi_start = mbi_ranges[0]; 138 sc->gic_mbi_end = mbi_ranges[0] + mbi_ranges[1]; 139 } else { 140 if (bootverbose) 141 device_printf(dev, "Malformed mbi-ranges property\n"); 142 } 143 free(mbi_ranges, M_OFWPROP); 144 } 145 146 err = gic_v3_attach(dev); 147 if (err != 0) 148 goto error; 149 150 xref = OF_xref_from_node(ofw_bus_get_node(dev)); 151 sc->gic_pic = intr_pic_register(dev, xref); 152 if (sc->gic_pic == NULL) { 153 device_printf(dev, "could not register PIC\n"); 154 err = ENXIO; 155 goto error; 156 } 157 158 if (sc->gic_mbi_start > 0) 159 intr_msi_register(dev, xref); 160 161 /* Register xref */ 162 OF_device_register_xref(xref, dev); 163 164 if (intr_pic_claim_root(dev, xref, arm_gic_v3_intr, sc) != 0) { 165 err = ENXIO; 166 goto error; 167 } 168 169 #ifdef SMP 170 err = intr_ipi_pic_register(dev, 0); 171 if (err != 0) { 172 device_printf(dev, "could not register for IPIs\n"); 173 goto error; 174 } 175 #endif 176 177 /* 178 * Try to register ITS to this GIC. 179 * GIC will act as a bus in that case. 180 * Failure here will not affect main GIC functionality. 181 */ 182 if (gic_v3_ofw_bus_attach(dev) != 0) { 183 if (bootverbose) { 184 device_printf(dev, 185 "Failed to attach ITS to this GIC\n"); 186 } 187 } 188 189 if (device_get_children(dev, &sc->gic_children, &sc->gic_nchildren) != 0) 190 sc->gic_nchildren = 0; 191 192 return (err); 193 194 error: 195 if (bootverbose) { 196 device_printf(dev, 197 "Failed to attach. Error %d\n", err); 198 } 199 /* Failure so free resources */ 200 gic_v3_detach(dev); 201 202 return (err); 203 } 204 205 /* OFW bus interface */ 206 struct gic_v3_ofw_devinfo { 207 struct gic_v3_devinfo di_gic_dinfo; 208 struct ofw_bus_devinfo di_dinfo; 209 struct resource_list di_rl; 210 }; 211 212 static const struct ofw_bus_devinfo * 213 gic_v3_ofw_get_devinfo(device_t bus __unused, device_t child) 214 { 215 struct gic_v3_ofw_devinfo *di; 216 217 di = device_get_ivars(child); 218 if (di->di_gic_dinfo.is_vgic) 219 return (NULL); 220 return (&di->di_dinfo); 221 } 222 223 /* Helper functions */ 224 static int 225 gic_v3_ofw_fill_ranges(phandle_t parent, struct gic_v3_softc *sc, 226 pcell_t *addr_cellsp, pcell_t *size_cellsp) 227 { 228 pcell_t addr_cells, host_cells, size_cells; 229 cell_t *base_ranges; 230 ssize_t nbase_ranges; 231 int i, j, k; 232 233 host_cells = 1; 234 OF_getencprop(OF_parent(parent), "#address-cells", &host_cells, 235 sizeof(host_cells)); 236 addr_cells = 2; 237 OF_getencprop(parent, "#address-cells", &addr_cells, 238 sizeof(addr_cells)); 239 size_cells = 2; 240 OF_getencprop(parent, "#size-cells", &size_cells, 241 sizeof(size_cells)); 242 243 *addr_cellsp = addr_cells; 244 *size_cellsp = size_cells; 245 246 nbase_ranges = OF_getproplen(parent, "ranges"); 247 if (nbase_ranges < 0) 248 return (EINVAL); 249 250 sc->nranges = nbase_ranges / sizeof(cell_t) / 251 (addr_cells + host_cells + size_cells); 252 if (sc->nranges == 0) 253 return (0); 254 255 sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]), M_GIC_V3, 256 M_WAITOK); 257 base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK); 258 OF_getencprop(parent, "ranges", base_ranges, nbase_ranges); 259 260 for (i = 0, j = 0; i < sc->nranges; i++) { 261 sc->ranges[i].bus = 0; 262 for (k = 0; k < addr_cells; k++) { 263 sc->ranges[i].bus <<= 32; 264 sc->ranges[i].bus |= base_ranges[j++]; 265 } 266 sc->ranges[i].host = 0; 267 for (k = 0; k < host_cells; k++) { 268 sc->ranges[i].host <<= 32; 269 sc->ranges[i].host |= base_ranges[j++]; 270 } 271 sc->ranges[i].size = 0; 272 for (k = 0; k < size_cells; k++) { 273 sc->ranges[i].size <<= 32; 274 sc->ranges[i].size |= base_ranges[j++]; 275 } 276 } 277 278 free(base_ranges, M_DEVBUF); 279 return (0); 280 } 281 282 /* 283 * Bus capability support for GICv3. 284 * Collects and configures device informations and finally 285 * adds ITS device as a child of GICv3 in Newbus hierarchy. 286 */ 287 static int 288 gic_v3_ofw_bus_attach(device_t dev) 289 { 290 struct gic_v3_ofw_devinfo *di; 291 struct gic_v3_softc *sc; 292 device_t child; 293 phandle_t parent, node; 294 pcell_t addr_cells, size_cells; 295 int rv; 296 297 sc = device_get_softc(dev); 298 parent = ofw_bus_get_node(dev); 299 if (parent > 0) { 300 rv = gic_v3_ofw_fill_ranges(parent, sc, &addr_cells, 301 &size_cells); 302 if (rv != 0) 303 return (rv); 304 305 /* Iterate through all GIC subordinates */ 306 for (node = OF_child(parent); node > 0; node = OF_peer(node)) { 307 /* 308 * Ignore children that lack a compatible property. 309 * Some of them may be for configuration, for example 310 * ppi-partitions. 311 */ 312 if (!OF_hasprop(node, "compatible")) 313 continue; 314 315 /* Allocate and populate devinfo. */ 316 di = malloc(sizeof(*di), M_GIC_V3, M_WAITOK | M_ZERO); 317 318 /* Read the numa node, or -1 if there is none */ 319 if (OF_getencprop(node, "numa-node-id", 320 &di->di_gic_dinfo.gic_domain, 321 sizeof(di->di_gic_dinfo.gic_domain)) <= 0) { 322 di->di_gic_dinfo.gic_domain = -1; 323 } 324 325 if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node)) { 326 if (bootverbose) { 327 device_printf(dev, 328 "Could not set up devinfo for ITS\n"); 329 } 330 free(di, M_GIC_V3); 331 continue; 332 } 333 334 /* Initialize and populate resource list. */ 335 resource_list_init(&di->di_rl); 336 ofw_bus_reg_to_rl(dev, node, addr_cells, size_cells, 337 &di->di_rl); 338 339 /* Should not have any interrupts, so don't add any */ 340 341 /* Add newbus device for this FDT node */ 342 child = device_add_child(dev, NULL, -1); 343 if (!child) { 344 if (bootverbose) { 345 device_printf(dev, 346 "Could not add child: %s\n", 347 di->di_dinfo.obd_name); 348 } 349 resource_list_free(&di->di_rl); 350 ofw_bus_gen_destroy_devinfo(&di->di_dinfo); 351 free(di, M_GIC_V3); 352 continue; 353 } 354 355 sc->gic_nchildren++; 356 device_set_ivars(child, di); 357 } 358 } 359 360 /* 361 * If there is a vgic maintanance interrupt add a virtual gic 362 * child so we can use this in the vmm module for bhyve. 363 */ 364 if (OF_hasprop(parent, "interrupts")) { 365 child = device_add_child(dev, "vgic", -1); 366 if (child == NULL) { 367 device_printf(dev, "Could not add vgic child\n"); 368 } else { 369 di = malloc(sizeof(*di), M_GIC_V3, M_WAITOK | M_ZERO); 370 resource_list_init(&di->di_rl); 371 di->di_gic_dinfo.gic_domain = -1; 372 di->di_gic_dinfo.is_vgic = 1; 373 device_set_ivars(child, di); 374 sc->gic_nchildren++; 375 } 376 } 377 378 return (bus_generic_attach(dev)); 379 } 380 381 static struct resource_list * 382 gic_v3_fdt_get_resource_list(device_t bus, device_t child) 383 { 384 struct gic_v3_ofw_devinfo *di; 385 386 di = device_get_ivars(child); 387 KASSERT(di != NULL, ("%s: No devinfo", __func__)); 388 389 return (&di->di_rl); 390 } 391