xref: /freebsd/sys/arm64/arm64/gic_v3_fdt.c (revision 271171e0)
1 /*-
2  * Copyright (c) 2015 The FreeBSD Foundation
3  *
4  * This software was developed by Semihalf under
5  * the sponsorship of the FreeBSD Foundation.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bitstring.h>
35 #include <sys/bus.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
38 #include <sys/rman.h>
39 
40 #include <machine/intr.h>
41 #include <machine/resource.h>
42 
43 #include <dev/ofw/openfirm.h>
44 #include <dev/ofw/ofw_bus.h>
45 #include <dev/ofw/ofw_bus_subr.h>
46 
47 #include <arm/arm/gic_common.h>
48 #include "gic_v3_reg.h"
49 #include "gic_v3_var.h"
50 
51 /*
52  * FDT glue.
53  */
54 static int gic_v3_fdt_probe(device_t);
55 static int gic_v3_fdt_attach(device_t);
56 static int gic_v3_fdt_print_child(device_t, device_t);
57 
58 static struct resource *gic_v3_ofw_bus_alloc_res(device_t, device_t, int, int *,
59     rman_res_t, rman_res_t, rman_res_t, u_int);
60 static const struct ofw_bus_devinfo *gic_v3_ofw_get_devinfo(device_t, device_t);
61 
62 static device_method_t gic_v3_fdt_methods[] = {
63 	/* Device interface */
64 	DEVMETHOD(device_probe,		gic_v3_fdt_probe),
65 	DEVMETHOD(device_attach,	gic_v3_fdt_attach),
66 
67 	/* Bus interface */
68 	DEVMETHOD(bus_print_child,		gic_v3_fdt_print_child),
69 	DEVMETHOD(bus_alloc_resource,		gic_v3_ofw_bus_alloc_res),
70 	DEVMETHOD(bus_activate_resource,	bus_generic_activate_resource),
71 
72 	/* ofw_bus interface */
73 	DEVMETHOD(ofw_bus_get_devinfo,	gic_v3_ofw_get_devinfo),
74 	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
75 	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
76 	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
77 	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
78 	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
79 
80 	/* End */
81 	DEVMETHOD_END
82 };
83 
84 DEFINE_CLASS_1(gic, gic_v3_fdt_driver, gic_v3_fdt_methods,
85     sizeof(struct gic_v3_softc), gic_v3_driver);
86 
87 EARLY_DRIVER_MODULE(gic_v3, simplebus, gic_v3_fdt_driver, 0, 0,
88     BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
89 EARLY_DRIVER_MODULE(gic_v3, ofwbus, gic_v3_fdt_driver, 0, 0,
90     BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
91 
92 /*
93  * Helper functions declarations.
94  */
95 static int gic_v3_ofw_bus_attach(device_t);
96 
97 /*
98  * Device interface.
99  */
100 static int
101 gic_v3_fdt_probe(device_t dev)
102 {
103 
104 	if (!ofw_bus_status_okay(dev))
105 		return (ENXIO);
106 
107 	if (!ofw_bus_is_compatible(dev, "arm,gic-v3"))
108 		return (ENXIO);
109 
110 	device_set_desc(dev, GIC_V3_DEVSTR);
111 	return (BUS_PROBE_DEFAULT);
112 }
113 
114 static int
115 gic_v3_fdt_attach(device_t dev)
116 {
117 	struct gic_v3_softc *sc;
118 	pcell_t redist_regions;
119 	intptr_t xref;
120 	int err;
121 	uint32_t *mbi_ranges;
122 	ssize_t ret;
123 
124 	sc = device_get_softc(dev);
125 	sc->dev = dev;
126 	sc->gic_bus = GIC_BUS_FDT;
127 
128 	/*
129 	 * Recover number of the Re-Distributor regions.
130 	 */
131 	if (OF_getencprop(ofw_bus_get_node(dev), "#redistributor-regions",
132 	    &redist_regions, sizeof(redist_regions)) <= 0)
133 		sc->gic_redists.nregions = 1;
134 	else
135 		sc->gic_redists.nregions = redist_regions;
136 
137 	/* Add Message Based Interrupts using SPIs. */
138 	ret = OF_getencprop_alloc_multi(ofw_bus_get_node(dev), "mbi-ranges",
139 	    sizeof(*mbi_ranges), (void **)&mbi_ranges);
140 	if (ret > 0) {
141 		if (ret % 2 == 0) {
142 			/* Limit to a single range for now. */
143 			sc->gic_mbi_start = mbi_ranges[0];
144 			sc->gic_mbi_end = mbi_ranges[0] + mbi_ranges[1];
145 		} else {
146 			if (bootverbose)
147 				device_printf(dev, "Malformed mbi-ranges property\n");
148 		}
149 		free(mbi_ranges, M_OFWPROP);
150 	}
151 
152 	err = gic_v3_attach(dev);
153 	if (err != 0)
154 		goto error;
155 
156 	xref = OF_xref_from_node(ofw_bus_get_node(dev));
157 	sc->gic_pic = intr_pic_register(dev, xref);
158 	if (sc->gic_pic == NULL) {
159 		device_printf(dev, "could not register PIC\n");
160 		err = ENXIO;
161 		goto error;
162 	}
163 
164 	if (sc->gic_mbi_start > 0)
165 		intr_msi_register(dev, xref);
166 
167 	/* Register xref */
168 	OF_device_register_xref(xref, dev);
169 
170 	if (intr_pic_claim_root(dev, xref, arm_gic_v3_intr, sc,
171 	    GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {
172 		err = ENXIO;
173 		goto error;
174 	}
175 
176 	/*
177 	 * Try to register ITS to this GIC.
178 	 * GIC will act as a bus in that case.
179 	 * Failure here will not affect main GIC functionality.
180 	 */
181 	if (gic_v3_ofw_bus_attach(dev) != 0) {
182 		if (bootverbose) {
183 			device_printf(dev,
184 			    "Failed to attach ITS to this GIC\n");
185 		}
186 	}
187 
188 	if (device_get_children(dev, &sc->gic_children, &sc->gic_nchildren) != 0)
189 		sc->gic_nchildren = 0;
190 
191 	return (err);
192 
193 error:
194 	if (bootverbose) {
195 		device_printf(dev,
196 		    "Failed to attach. Error %d\n", err);
197 	}
198 	/* Failure so free resources */
199 	gic_v3_detach(dev);
200 
201 	return (err);
202 }
203 
204 /* OFW bus interface */
205 struct gic_v3_ofw_devinfo {
206 	struct gic_v3_devinfo	di_gic_dinfo;
207 	struct ofw_bus_devinfo	di_dinfo;
208 	struct resource_list	di_rl;
209 };
210 
211 static int
212 gic_v3_fdt_print_child(device_t bus, device_t child)
213 {
214 	struct gic_v3_ofw_devinfo *di = device_get_ivars(child);
215 	struct resource_list *rl = &di->di_rl;
216 	int retval = 0;
217 
218 	retval += bus_print_child_header(bus, child);
219 	retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx");
220 	retval += bus_print_child_footer(bus, child);
221 
222 	return (retval);
223 }
224 
225 static const struct ofw_bus_devinfo *
226 gic_v3_ofw_get_devinfo(device_t bus __unused, device_t child)
227 {
228 	struct gic_v3_ofw_devinfo *di;
229 
230 	di = device_get_ivars(child);
231 	return (&di->di_dinfo);
232 }
233 
234 static struct resource *
235 gic_v3_ofw_bus_alloc_res(device_t bus, device_t child, int type, int *rid,
236     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
237 {
238 	struct gic_v3_ofw_devinfo *di;
239 	struct resource_list_entry *rle;
240 	int ranges_len;
241 
242 	if (RMAN_IS_DEFAULT_RANGE(start, end)) {
243 		if ((di = device_get_ivars(child)) == NULL)
244 			return (NULL);
245 		if (type != SYS_RES_MEMORY)
246 			return (NULL);
247 
248 		/* Find defaults for this rid */
249 		rle = resource_list_find(&di->di_rl, type, *rid);
250 		if (rle == NULL)
251 			return (NULL);
252 
253 		start = rle->start;
254 		end = rle->end;
255 		count = rle->count;
256 	}
257 	/*
258 	 * XXX: No ranges remap!
259 	 *	Absolute address is expected.
260 	 */
261 	if (ofw_bus_has_prop(bus, "ranges")) {
262 		ranges_len = OF_getproplen(ofw_bus_get_node(bus), "ranges");
263 		if (ranges_len != 0) {
264 			if (bootverbose) {
265 				device_printf(child,
266 				    "Ranges remap not supported\n");
267 			}
268 			return (NULL);
269 		}
270 	}
271 	return (bus_generic_alloc_resource(bus, child, type, rid, start, end,
272 	    count, flags));
273 }
274 
275 /* Helper functions */
276 
277 /*
278  * Bus capability support for GICv3.
279  * Collects and configures device informations and finally
280  * adds ITS device as a child of GICv3 in Newbus hierarchy.
281  */
282 static int
283 gic_v3_ofw_bus_attach(device_t dev)
284 {
285 	struct gic_v3_ofw_devinfo *di;
286 	struct gic_v3_softc *sc;
287 	device_t child;
288 	phandle_t parent, node;
289 	pcell_t addr_cells, size_cells;
290 
291 	sc = device_get_softc(dev);
292 	parent = ofw_bus_get_node(dev);
293 	if (parent > 0) {
294 		addr_cells = 2;
295 		OF_getencprop(parent, "#address-cells", &addr_cells,
296 		    sizeof(addr_cells));
297 		size_cells = 2;
298 		OF_getencprop(parent, "#size-cells", &size_cells,
299 		    sizeof(size_cells));
300 		/* Iterate through all GIC subordinates */
301 		for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
302 			/*
303 			 * Ignore children that lack a compatible property.
304 			 * Some of them may be for configuration, for example
305 			 * ppi-partitions.
306 			 */
307 			if (!OF_hasprop(node, "compatible"))
308 				continue;
309 
310 			/* Allocate and populate devinfo. */
311 			di = malloc(sizeof(*di), M_GIC_V3, M_WAITOK | M_ZERO);
312 
313 			/* Read the numa node, or -1 if there is none */
314 			if (OF_getencprop(node, "numa-node-id",
315 			    &di->di_gic_dinfo.gic_domain,
316 			    sizeof(di->di_gic_dinfo.gic_domain)) <= 0) {
317 				di->di_gic_dinfo.gic_domain = -1;
318 			}
319 
320 			if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node)) {
321 				if (bootverbose) {
322 					device_printf(dev,
323 					    "Could not set up devinfo for ITS\n");
324 				}
325 				free(di, M_GIC_V3);
326 				continue;
327 			}
328 
329 			/* Initialize and populate resource list. */
330 			resource_list_init(&di->di_rl);
331 			ofw_bus_reg_to_rl(dev, node, addr_cells, size_cells,
332 			    &di->di_rl);
333 
334 			/* Should not have any interrupts, so don't add any */
335 
336 			/* Add newbus device for this FDT node */
337 			child = device_add_child(dev, NULL, -1);
338 			if (!child) {
339 				if (bootverbose) {
340 					device_printf(dev,
341 					    "Could not add child: %s\n",
342 					    di->di_dinfo.obd_name);
343 				}
344 				resource_list_free(&di->di_rl);
345 				ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
346 				free(di, M_GIC_V3);
347 				continue;
348 			}
349 
350 			sc->gic_nchildren++;
351 			device_set_ivars(child, di);
352 		}
353 	}
354 
355 	return (bus_generic_attach(dev));
356 }
357