xref: /freebsd/sys/arm64/arm64/gic_v3_fdt.c (revision 4b9d6057)
1 /*-
2  * Copyright (c) 2015 The FreeBSD Foundation
3  *
4  * This software was developed by Semihalf under
5  * the sponsorship of the FreeBSD Foundation.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/bitstring.h>
32 #include <sys/bus.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/rman.h>
36 
37 #include <machine/intr.h>
38 #include <machine/resource.h>
39 
40 #include <dev/ofw/openfirm.h>
41 #include <dev/ofw/ofw_bus.h>
42 #include <dev/ofw/ofw_bus_subr.h>
43 
44 #include <arm/arm/gic_common.h>
45 #include "gic_v3_reg.h"
46 #include "gic_v3_var.h"
47 
48 /*
49  * FDT glue.
50  */
51 static int gic_v3_fdt_probe(device_t);
52 static int gic_v3_fdt_attach(device_t);
53 
54 static const struct ofw_bus_devinfo *gic_v3_ofw_get_devinfo(device_t, device_t);
55 static bus_get_resource_list_t gic_v3_fdt_get_resource_list;
56 
57 static device_method_t gic_v3_fdt_methods[] = {
58 	/* Device interface */
59 	DEVMETHOD(device_probe,		gic_v3_fdt_probe),
60 	DEVMETHOD(device_attach,	gic_v3_fdt_attach),
61 
62 	/* Bus interface */
63 	DEVMETHOD(bus_get_resource_list,	gic_v3_fdt_get_resource_list),
64 	DEVMETHOD(bus_get_device_path,  ofw_bus_gen_get_device_path),
65 
66 	/* ofw_bus interface */
67 	DEVMETHOD(ofw_bus_get_devinfo,	gic_v3_ofw_get_devinfo),
68 	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
69 	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
70 	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
71 	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
72 	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
73 
74 	/* End */
75 	DEVMETHOD_END
76 };
77 
78 DEFINE_CLASS_1(gic, gic_v3_fdt_driver, gic_v3_fdt_methods,
79     sizeof(struct gic_v3_softc), gic_v3_driver);
80 
81 EARLY_DRIVER_MODULE(gic_v3, simplebus, gic_v3_fdt_driver, 0, 0,
82     BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
83 EARLY_DRIVER_MODULE(gic_v3, ofwbus, gic_v3_fdt_driver, 0, 0,
84     BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
85 
86 /*
87  * Helper functions declarations.
88  */
89 static int gic_v3_ofw_bus_attach(device_t);
90 
91 /*
92  * Device interface.
93  */
94 static int
95 gic_v3_fdt_probe(device_t dev)
96 {
97 
98 	if (!ofw_bus_status_okay(dev))
99 		return (ENXIO);
100 
101 	if (!ofw_bus_is_compatible(dev, "arm,gic-v3"))
102 		return (ENXIO);
103 
104 	device_set_desc(dev, GIC_V3_DEVSTR);
105 	return (BUS_PROBE_DEFAULT);
106 }
107 
108 static int
109 gic_v3_fdt_attach(device_t dev)
110 {
111 	struct gic_v3_softc *sc;
112 	pcell_t redist_regions;
113 	intptr_t xref;
114 	int err;
115 	uint32_t *mbi_ranges;
116 	ssize_t ret;
117 
118 	sc = device_get_softc(dev);
119 	sc->dev = dev;
120 	sc->gic_bus = GIC_BUS_FDT;
121 
122 	/*
123 	 * Recover number of the Re-Distributor regions.
124 	 */
125 	if (OF_getencprop(ofw_bus_get_node(dev), "#redistributor-regions",
126 	    &redist_regions, sizeof(redist_regions)) <= 0)
127 		sc->gic_redists.nregions = 1;
128 	else
129 		sc->gic_redists.nregions = redist_regions;
130 
131 	/* Add Message Based Interrupts using SPIs. */
132 	ret = OF_getencprop_alloc_multi(ofw_bus_get_node(dev), "mbi-ranges",
133 	    sizeof(*mbi_ranges), (void **)&mbi_ranges);
134 	if (ret > 0) {
135 		if (ret % 2 == 0) {
136 			/* Limit to a single range for now. */
137 			sc->gic_mbi_start = mbi_ranges[0];
138 			sc->gic_mbi_end = mbi_ranges[0] + mbi_ranges[1];
139 		} else {
140 			if (bootverbose)
141 				device_printf(dev, "Malformed mbi-ranges property\n");
142 		}
143 		free(mbi_ranges, M_OFWPROP);
144 	}
145 
146 	err = gic_v3_attach(dev);
147 	if (err != 0)
148 		goto error;
149 
150 	xref = OF_xref_from_node(ofw_bus_get_node(dev));
151 	sc->gic_pic = intr_pic_register(dev, xref);
152 	if (sc->gic_pic == NULL) {
153 		device_printf(dev, "could not register PIC\n");
154 		err = ENXIO;
155 		goto error;
156 	}
157 
158 	if (sc->gic_mbi_start > 0)
159 		intr_msi_register(dev, xref);
160 
161 	/* Register xref */
162 	OF_device_register_xref(xref, dev);
163 
164 	if (intr_pic_claim_root(dev, xref, arm_gic_v3_intr, sc,
165 	    GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {
166 		err = ENXIO;
167 		goto error;
168 	}
169 
170 	/*
171 	 * Try to register ITS to this GIC.
172 	 * GIC will act as a bus in that case.
173 	 * Failure here will not affect main GIC functionality.
174 	 */
175 	if (gic_v3_ofw_bus_attach(dev) != 0) {
176 		if (bootverbose) {
177 			device_printf(dev,
178 			    "Failed to attach ITS to this GIC\n");
179 		}
180 	}
181 
182 	if (device_get_children(dev, &sc->gic_children, &sc->gic_nchildren) != 0)
183 		sc->gic_nchildren = 0;
184 
185 	return (err);
186 
187 error:
188 	if (bootverbose) {
189 		device_printf(dev,
190 		    "Failed to attach. Error %d\n", err);
191 	}
192 	/* Failure so free resources */
193 	gic_v3_detach(dev);
194 
195 	return (err);
196 }
197 
198 /* OFW bus interface */
199 struct gic_v3_ofw_devinfo {
200 	struct gic_v3_devinfo	di_gic_dinfo;
201 	struct ofw_bus_devinfo	di_dinfo;
202 	struct resource_list	di_rl;
203 };
204 
205 static const struct ofw_bus_devinfo *
206 gic_v3_ofw_get_devinfo(device_t bus __unused, device_t child)
207 {
208 	struct gic_v3_ofw_devinfo *di;
209 
210 	di = device_get_ivars(child);
211 	if (di->di_gic_dinfo.is_vgic)
212 		return (NULL);
213 	return (&di->di_dinfo);
214 }
215 
216 /* Helper functions */
217 static int
218 gic_v3_ofw_fill_ranges(phandle_t parent, struct gic_v3_softc *sc,
219     pcell_t *addr_cellsp, pcell_t *size_cellsp)
220 {
221 	pcell_t addr_cells, host_cells, size_cells;
222 	cell_t *base_ranges;
223 	ssize_t nbase_ranges;
224 	int i, j, k;
225 
226 	host_cells = 1;
227 	OF_getencprop(OF_parent(parent), "#address-cells", &host_cells,
228 	    sizeof(host_cells));
229 	addr_cells = 2;
230 	OF_getencprop(parent, "#address-cells", &addr_cells,
231 	    sizeof(addr_cells));
232 	size_cells = 2;
233 	OF_getencprop(parent, "#size-cells", &size_cells,
234 	    sizeof(size_cells));
235 
236 	*addr_cellsp = addr_cells;
237 	*size_cellsp = size_cells;
238 
239 	nbase_ranges = OF_getproplen(parent, "ranges");
240 	if (nbase_ranges < 0)
241 		return (EINVAL);
242 
243 	sc->nranges = nbase_ranges / sizeof(cell_t) /
244 	    (addr_cells + host_cells + size_cells);
245 	if (sc->nranges == 0)
246 		return (0);
247 
248 	sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]), M_GIC_V3,
249 	    M_WAITOK);
250 	base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
251 	OF_getencprop(parent, "ranges", base_ranges, nbase_ranges);
252 
253 	for (i = 0, j = 0; i < sc->nranges; i++) {
254 		sc->ranges[i].bus = 0;
255 		for (k = 0; k < addr_cells; k++) {
256 			sc->ranges[i].bus <<= 32;
257 			sc->ranges[i].bus |= base_ranges[j++];
258 		}
259 		sc->ranges[i].host = 0;
260 		for (k = 0; k < host_cells; k++) {
261 			sc->ranges[i].host <<= 32;
262 			sc->ranges[i].host |= base_ranges[j++];
263 		}
264 		sc->ranges[i].size = 0;
265 		for (k = 0; k < size_cells; k++) {
266 			sc->ranges[i].size <<= 32;
267 			sc->ranges[i].size |= base_ranges[j++];
268 		}
269 	}
270 
271 	free(base_ranges, M_DEVBUF);
272 	return (0);
273 }
274 
275 /*
276  * Bus capability support for GICv3.
277  * Collects and configures device informations and finally
278  * adds ITS device as a child of GICv3 in Newbus hierarchy.
279  */
280 static int
281 gic_v3_ofw_bus_attach(device_t dev)
282 {
283 	struct gic_v3_ofw_devinfo *di;
284 	struct gic_v3_softc *sc;
285 	device_t child;
286 	phandle_t parent, node;
287 	pcell_t addr_cells, size_cells;
288 	int rv;
289 
290 	sc = device_get_softc(dev);
291 	parent = ofw_bus_get_node(dev);
292 	if (parent > 0) {
293 		rv = gic_v3_ofw_fill_ranges(parent, sc, &addr_cells,
294 		    &size_cells);
295 		if (rv != 0)
296 			return (rv);
297 
298 		/* Iterate through all GIC subordinates */
299 		for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
300 			/*
301 			 * Ignore children that lack a compatible property.
302 			 * Some of them may be for configuration, for example
303 			 * ppi-partitions.
304 			 */
305 			if (!OF_hasprop(node, "compatible"))
306 				continue;
307 
308 			/* Allocate and populate devinfo. */
309 			di = malloc(sizeof(*di), M_GIC_V3, M_WAITOK | M_ZERO);
310 
311 			/* Read the numa node, or -1 if there is none */
312 			if (OF_getencprop(node, "numa-node-id",
313 			    &di->di_gic_dinfo.gic_domain,
314 			    sizeof(di->di_gic_dinfo.gic_domain)) <= 0) {
315 				di->di_gic_dinfo.gic_domain = -1;
316 			}
317 
318 			if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node)) {
319 				if (bootverbose) {
320 					device_printf(dev,
321 					    "Could not set up devinfo for ITS\n");
322 				}
323 				free(di, M_GIC_V3);
324 				continue;
325 			}
326 
327 			/* Initialize and populate resource list. */
328 			resource_list_init(&di->di_rl);
329 			ofw_bus_reg_to_rl(dev, node, addr_cells, size_cells,
330 			    &di->di_rl);
331 
332 			/* Should not have any interrupts, so don't add any */
333 
334 			/* Add newbus device for this FDT node */
335 			child = device_add_child(dev, NULL, -1);
336 			if (!child) {
337 				if (bootverbose) {
338 					device_printf(dev,
339 					    "Could not add child: %s\n",
340 					    di->di_dinfo.obd_name);
341 				}
342 				resource_list_free(&di->di_rl);
343 				ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
344 				free(di, M_GIC_V3);
345 				continue;
346 			}
347 
348 			sc->gic_nchildren++;
349 			device_set_ivars(child, di);
350 		}
351 	}
352 
353 	/*
354 	 * If there is a vgic maintanance interrupt add a virtual gic
355 	 * child so we can use this in the vmm module for bhyve.
356 	 */
357 	if (OF_hasprop(parent, "interrupts")) {
358 		child = device_add_child(dev, "vgic", -1);
359 		if (child == NULL) {
360 			device_printf(dev, "Could not add vgic child\n");
361 		} else {
362 			di = malloc(sizeof(*di), M_GIC_V3, M_WAITOK | M_ZERO);
363 			resource_list_init(&di->di_rl);
364 			di->di_gic_dinfo.gic_domain = -1;
365 			di->di_gic_dinfo.is_vgic = 1;
366 			device_set_ivars(child, di);
367 			sc->gic_nchildren++;
368 		}
369 	}
370 
371 	return (bus_generic_attach(dev));
372 }
373 
374 static struct resource_list *
375 gic_v3_fdt_get_resource_list(device_t bus, device_t child)
376 {
377 	struct gic_v3_ofw_devinfo *di;
378 
379 	di = device_get_ivars(child);
380 	KASSERT(di != NULL, ("%s: No devinfo", __func__));
381 
382 	return (&di->di_rl);
383 }
384