1 /*- 2 * Copyright (c) 2015 The FreeBSD Foundation 3 * All rights reserved. 4 * 5 * This software was developed by Semihalf under 6 * the sponsorship of the FreeBSD Foundation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/bitstring.h> 36 #include <sys/bus.h> 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/rman.h> 40 41 #include <machine/intr.h> 42 #include <machine/resource.h> 43 44 #include <dev/ofw/openfirm.h> 45 #include <dev/ofw/ofw_bus.h> 46 #include <dev/ofw/ofw_bus_subr.h> 47 48 #include <arm/arm/gic_common.h> 49 #include "gic_v3_reg.h" 50 #include "gic_v3_var.h" 51 52 /* 53 * FDT glue. 54 */ 55 static int gic_v3_fdt_probe(device_t); 56 static int gic_v3_fdt_attach(device_t); 57 static int gic_v3_fdt_print_child(device_t, device_t); 58 59 static struct resource *gic_v3_ofw_bus_alloc_res(device_t, device_t, int, int *, 60 rman_res_t, rman_res_t, rman_res_t, u_int); 61 static const struct ofw_bus_devinfo *gic_v3_ofw_get_devinfo(device_t, device_t); 62 63 static device_method_t gic_v3_fdt_methods[] = { 64 /* Device interface */ 65 DEVMETHOD(device_probe, gic_v3_fdt_probe), 66 DEVMETHOD(device_attach, gic_v3_fdt_attach), 67 68 /* Bus interface */ 69 DEVMETHOD(bus_print_child, gic_v3_fdt_print_child), 70 DEVMETHOD(bus_alloc_resource, gic_v3_ofw_bus_alloc_res), 71 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 72 73 /* ofw_bus interface */ 74 DEVMETHOD(ofw_bus_get_devinfo, gic_v3_ofw_get_devinfo), 75 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 76 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 77 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 78 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 79 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 80 81 /* End */ 82 DEVMETHOD_END 83 }; 84 85 DEFINE_CLASS_1(gic, gic_v3_fdt_driver, gic_v3_fdt_methods, 86 sizeof(struct gic_v3_softc), gic_v3_driver); 87 88 static devclass_t gic_v3_fdt_devclass; 89 90 EARLY_DRIVER_MODULE(gic_v3, simplebus, gic_v3_fdt_driver, gic_v3_fdt_devclass, 91 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); 92 EARLY_DRIVER_MODULE(gic_v3, ofwbus, gic_v3_fdt_driver, gic_v3_fdt_devclass, 93 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); 94 95 /* 96 * Helper functions declarations. 97 */ 98 static int gic_v3_ofw_bus_attach(device_t); 99 100 /* 101 * Device interface. 102 */ 103 static int 104 gic_v3_fdt_probe(device_t dev) 105 { 106 107 if (!ofw_bus_status_okay(dev)) 108 return (ENXIO); 109 110 if (!ofw_bus_is_compatible(dev, "arm,gic-v3")) 111 return (ENXIO); 112 113 device_set_desc(dev, GIC_V3_DEVSTR); 114 return (BUS_PROBE_DEFAULT); 115 } 116 117 static int 118 gic_v3_fdt_attach(device_t dev) 119 { 120 struct gic_v3_softc *sc; 121 pcell_t redist_regions; 122 intptr_t xref; 123 int err; 124 125 sc = device_get_softc(dev); 126 sc->dev = dev; 127 sc->gic_bus = GIC_BUS_FDT; 128 129 /* 130 * Recover number of the Re-Distributor regions. 131 */ 132 if (OF_getencprop(ofw_bus_get_node(dev), "#redistributor-regions", 133 &redist_regions, sizeof(redist_regions)) <= 0) 134 sc->gic_redists.nregions = 1; 135 else 136 sc->gic_redists.nregions = redist_regions; 137 138 err = gic_v3_attach(dev); 139 if (err != 0) 140 goto error; 141 142 xref = OF_xref_from_node(ofw_bus_get_node(dev)); 143 sc->gic_pic = intr_pic_register(dev, xref); 144 if (sc->gic_pic == NULL) { 145 device_printf(dev, "could not register PIC\n"); 146 err = ENXIO; 147 goto error; 148 } 149 150 /* Register xref */ 151 OF_device_register_xref(xref, dev); 152 153 if (intr_pic_claim_root(dev, xref, arm_gic_v3_intr, sc, 154 GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) { 155 err = ENXIO; 156 goto error; 157 } 158 159 /* 160 * Try to register ITS to this GIC. 161 * GIC will act as a bus in that case. 162 * Failure here will not affect main GIC functionality. 163 */ 164 if (gic_v3_ofw_bus_attach(dev) != 0) { 165 if (bootverbose) { 166 device_printf(dev, 167 "Failed to attach ITS to this GIC\n"); 168 } 169 } 170 171 if (device_get_children(dev, &sc->gic_children, &sc->gic_nchildren) != 0) 172 sc->gic_nchildren = 0; 173 174 return (err); 175 176 error: 177 if (bootverbose) { 178 device_printf(dev, 179 "Failed to attach. Error %d\n", err); 180 } 181 /* Failure so free resources */ 182 gic_v3_detach(dev); 183 184 return (err); 185 } 186 187 /* OFW bus interface */ 188 struct gic_v3_ofw_devinfo { 189 struct gic_v3_devinfo di_gic_dinfo; 190 struct ofw_bus_devinfo di_dinfo; 191 struct resource_list di_rl; 192 }; 193 194 static int 195 gic_v3_fdt_print_child(device_t bus, device_t child) 196 { 197 struct gic_v3_ofw_devinfo *di = device_get_ivars(child); 198 struct resource_list *rl = &di->di_rl; 199 int retval = 0; 200 201 retval += bus_print_child_header(bus, child); 202 retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); 203 retval += bus_print_child_footer(bus, child); 204 205 return (retval); 206 } 207 208 static const struct ofw_bus_devinfo * 209 gic_v3_ofw_get_devinfo(device_t bus __unused, device_t child) 210 { 211 struct gic_v3_ofw_devinfo *di; 212 213 di = device_get_ivars(child); 214 return (&di->di_dinfo); 215 } 216 217 static struct resource * 218 gic_v3_ofw_bus_alloc_res(device_t bus, device_t child, int type, int *rid, 219 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 220 { 221 struct gic_v3_ofw_devinfo *di; 222 struct resource_list_entry *rle; 223 int ranges_len; 224 225 if (RMAN_IS_DEFAULT_RANGE(start, end)) { 226 if ((di = device_get_ivars(child)) == NULL) 227 return (NULL); 228 if (type != SYS_RES_MEMORY) 229 return (NULL); 230 231 /* Find defaults for this rid */ 232 rle = resource_list_find(&di->di_rl, type, *rid); 233 if (rle == NULL) 234 return (NULL); 235 236 start = rle->start; 237 end = rle->end; 238 count = rle->count; 239 } 240 /* 241 * XXX: No ranges remap! 242 * Absolute address is expected. 243 */ 244 if (ofw_bus_has_prop(bus, "ranges")) { 245 ranges_len = OF_getproplen(ofw_bus_get_node(bus), "ranges"); 246 if (ranges_len != 0) { 247 if (bootverbose) { 248 device_printf(child, 249 "Ranges remap not supported\n"); 250 } 251 return (NULL); 252 } 253 } 254 return (bus_generic_alloc_resource(bus, child, type, rid, start, end, 255 count, flags)); 256 } 257 258 /* Helper functions */ 259 260 /* 261 * Bus capability support for GICv3. 262 * Collects and configures device informations and finally 263 * adds ITS device as a child of GICv3 in Newbus hierarchy. 264 */ 265 static int 266 gic_v3_ofw_bus_attach(device_t dev) 267 { 268 struct gic_v3_ofw_devinfo *di; 269 struct gic_v3_softc *sc; 270 device_t child; 271 phandle_t parent, node; 272 pcell_t addr_cells, size_cells; 273 274 sc = device_get_softc(dev); 275 parent = ofw_bus_get_node(dev); 276 if (parent > 0) { 277 addr_cells = 2; 278 OF_getencprop(parent, "#address-cells", &addr_cells, 279 sizeof(addr_cells)); 280 size_cells = 2; 281 OF_getencprop(parent, "#size-cells", &size_cells, 282 sizeof(size_cells)); 283 /* Iterate through all GIC subordinates */ 284 for (node = OF_child(parent); node > 0; node = OF_peer(node)) { 285 /* Allocate and populate devinfo. */ 286 di = malloc(sizeof(*di), M_GIC_V3, M_WAITOK | M_ZERO); 287 288 /* Read the numa node, or -1 if there is none */ 289 if (OF_getencprop(node, "numa-node-id", 290 &di->di_gic_dinfo.gic_domain, 291 sizeof(di->di_gic_dinfo.gic_domain)) <= 0) { 292 di->di_gic_dinfo.gic_domain = -1; 293 } 294 295 if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node)) { 296 if (bootverbose) { 297 device_printf(dev, 298 "Could not set up devinfo for ITS\n"); 299 } 300 free(di, M_GIC_V3); 301 continue; 302 } 303 304 /* Initialize and populate resource list. */ 305 resource_list_init(&di->di_rl); 306 ofw_bus_reg_to_rl(dev, node, addr_cells, size_cells, 307 &di->di_rl); 308 309 /* Should not have any interrupts, so don't add any */ 310 311 /* Add newbus device for this FDT node */ 312 child = device_add_child(dev, NULL, -1); 313 if (!child) { 314 if (bootverbose) { 315 device_printf(dev, 316 "Could not add child: %s\n", 317 di->di_dinfo.obd_name); 318 } 319 resource_list_free(&di->di_rl); 320 ofw_bus_gen_destroy_devinfo(&di->di_dinfo); 321 free(di, M_GIC_V3); 322 continue; 323 } 324 325 sc->gic_nchildren++; 326 device_set_ivars(child, di); 327 } 328 } 329 330 return (bus_generic_attach(dev)); 331 } 332