18a2adde1SAndrew Turner/* 28a2adde1SAndrew Turner * Copyright (c) 2017 Alexandru Elisei <alexandru.elisei@gmail.com> 38a2adde1SAndrew Turner * All rights reserved. 48a2adde1SAndrew Turner * 58a2adde1SAndrew Turner * Redistribution and use in source and binary forms, with or without 68a2adde1SAndrew Turner * modification, are permitted provided that the following conditions 78a2adde1SAndrew Turner * are met: 88a2adde1SAndrew Turner * 1. Redistributions of source code must retain the above copyright 98a2adde1SAndrew Turner * notice, this list of conditions and the following disclaimer. 108a2adde1SAndrew Turner * 2. Redistributions in binary form must reproduce the above copyright 118a2adde1SAndrew Turner * notice, this list of conditions and the following disclaimer in the 128a2adde1SAndrew Turner * documentation and/or other materials provided with the distribution. 138a2adde1SAndrew Turner * 148a2adde1SAndrew Turner * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 158a2adde1SAndrew Turner * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 168a2adde1SAndrew Turner * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 178a2adde1SAndrew Turner * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 188a2adde1SAndrew Turner * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 198a2adde1SAndrew Turner * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 208a2adde1SAndrew Turner * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 218a2adde1SAndrew Turner * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 228a2adde1SAndrew Turner * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 238a2adde1SAndrew Turner * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 248a2adde1SAndrew Turner * SUCH DAMAGE. 258a2adde1SAndrew Turner */ 268a2adde1SAndrew Turner 27*c2e0d56fSAndrew Turner#include <sys/elf_common.h> 28*c2e0d56fSAndrew Turner 298a2adde1SAndrew Turner#include <machine/asm.h> 308a2adde1SAndrew Turner 318a2adde1SAndrew Turner.macro vempty 328a2adde1SAndrew Turner .align 7 338a2adde1SAndrew Turner 1: b 1b 348a2adde1SAndrew Turner.endm 358a2adde1SAndrew Turner 368a2adde1SAndrew Turner/* 378a2adde1SAndrew Turner * Install a new exception vector table with the base address supplied by the 388a2adde1SAndrew Turner * parameter in register x0. 398a2adde1SAndrew Turner */ 408a2adde1SAndrew Turner.macro vector_stub_el1h_sync 418a2adde1SAndrew Turner .align 7 428a2adde1SAndrew Turner msr vbar_el2, x0 438a2adde1SAndrew Turner ERET 448a2adde1SAndrew Turner.endm 458a2adde1SAndrew Turner 468a2adde1SAndrew Turner .align 11 478a2adde1SAndrew Turner .globl hyp_stub_vectors 488a2adde1SAndrew Turnerhyp_stub_vectors: 498a2adde1SAndrew Turner vempty /* Synchronous EL2t */ 508a2adde1SAndrew Turner vempty /* IRQ EL2t */ 518a2adde1SAndrew Turner vempty /* FIQ EL2t */ 528a2adde1SAndrew Turner vempty /* SError EL2t */ 538a2adde1SAndrew Turner 548a2adde1SAndrew Turner vempty /* Synchronous EL2h */ 558a2adde1SAndrew Turner vempty /* IRQ EL2h */ 568a2adde1SAndrew Turner vempty /* FIQ EL2h */ 578a2adde1SAndrew Turner vempty /* SError EL2h */ 588a2adde1SAndrew Turner 598a2adde1SAndrew Turner vector_stub_el1h_sync /* Synchronous 64-bit EL1 */ 608a2adde1SAndrew Turner vempty /* IRQ 64-bit EL1 */ 618a2adde1SAndrew Turner vempty /* FIQ 64-bit EL1 */ 628a2adde1SAndrew Turner vempty /* SError 64-bit EL1 */ 638a2adde1SAndrew Turner 648a2adde1SAndrew Turner vempty /* Synchronous 32-bit EL1 */ 658a2adde1SAndrew Turner vempty /* IRQ 32-bit EL1 */ 668a2adde1SAndrew Turner vempty /* FIQ 32-bit EL1 */ 678a2adde1SAndrew Turner vempty /* SError 32-bit EL1 */ 68*c2e0d56fSAndrew Turner 69*c2e0d56fSAndrew TurnerGNU_PROPERTY_AARCH64_FEATURE_1_NOTE(GNU_PROPERTY_AARCH64_FEATURE_1_VAL) 70