1/* 2 * Copyright (c) 2017 Alexandru Elisei <alexandru.elisei@gmail.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <machine/asm.h> 28 29.macro vempty 30 .align 7 31 1: b 1b 32.endm 33 34/* 35 * Install a new exception vector table with the base address supplied by the 36 * parameter in register x0. 37 */ 38.macro vector_stub_el1h_sync 39 .align 7 40 msr vbar_el2, x0 41 ERET 42.endm 43 44 .align 11 45 .globl hyp_stub_vectors 46hyp_stub_vectors: 47 vempty /* Synchronous EL2t */ 48 vempty /* IRQ EL2t */ 49 vempty /* FIQ EL2t */ 50 vempty /* SError EL2t */ 51 52 vempty /* Synchronous EL2h */ 53 vempty /* IRQ EL2h */ 54 vempty /* FIQ EL2h */ 55 vempty /* SError EL2h */ 56 57 vector_stub_el1h_sync /* Synchronous 64-bit EL1 */ 58 vempty /* IRQ 64-bit EL1 */ 59 vempty /* FIQ 64-bit EL1 */ 60 vempty /* SError 64-bit EL1 */ 61 62 vempty /* Synchronous 32-bit EL1 */ 63 vempty /* IRQ 32-bit EL1 */ 64 vempty /* FIQ 32-bit EL1 */ 65 vempty /* SError 32-bit EL1 */ 66