xref: /freebsd/sys/arm64/arm64/undefined.c (revision 85732ac8)
1 /*-
2  * Copyright (c) 2017 Andrew Turner
3  * All rights reserved.
4  *
5  * This software was developed by SRI International and the University of
6  * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
7  * ("CTSRD"), as part of the DARPA CRASH research programme.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/malloc.h>
38 #include <sys/queue.h>
39 
40 #include <machine/frame.h>
41 #include <machine/undefined.h>
42 
43 MALLOC_DEFINE(M_UNDEF, "undefhandler", "Undefined instruction handler data");
44 
45 struct undef_handler {
46 	LIST_ENTRY(undef_handler) uh_link;
47 	undef_handler_t		uh_handler;
48 };
49 
50 /*
51  * Create two undefined instruction handler lists, one for userspace, one for
52  * the kernel. This allows us to handle instructions that will trap
53  */
54 LIST_HEAD(, undef_handler) undef_handlers[2];
55 
56 /*
57  * Work around a bug in QEMU prior to 2.5.1 where reading unknown ID
58  * registers would raise an exception when they should return 0.
59  */
60 static int
61 id_aa64mmfr2_handler(vm_offset_t va, uint32_t insn, struct trapframe *frame,
62     uint32_t esr)
63 {
64 	int reg;
65 
66 #define	 MRS_ID_AA64MMFR2_EL0_MASK	(MRS_MASK | 0x000fffe0)
67 #define	 MRS_ID_AA64MMFR2_EL0_VALUE	(MRS_VALUE | 0x00080740)
68 
69 	/* mrs xn, id_aa64mfr2_el1 */
70 	if ((insn & MRS_ID_AA64MMFR2_EL0_MASK) == MRS_ID_AA64MMFR2_EL0_VALUE) {
71 		reg = MRS_REGISTER(insn);
72 
73 		frame->tf_elr += INSN_SIZE;
74 		if (reg < nitems(frame->tf_x)) {
75 			frame->tf_x[reg] = 0;
76 		} else if (reg == 30) {
77 			frame->tf_lr = 0;
78 		}
79 		/* If reg is 32 then write to xzr, i.e. do nothing */
80 
81 		return (1);
82 	}
83 	return (0);
84 }
85 
86 void
87 undef_init(void)
88 {
89 
90 	LIST_INIT(&undef_handlers[0]);
91 	LIST_INIT(&undef_handlers[1]);
92 
93 	install_undef_handler(false, id_aa64mmfr2_handler);
94 }
95 
96 void *
97 install_undef_handler(bool user, undef_handler_t func)
98 {
99 	struct undef_handler *uh;
100 
101 	uh = malloc(sizeof(*uh), M_UNDEF, M_WAITOK);
102 	uh->uh_handler = func;
103 	LIST_INSERT_HEAD(&undef_handlers[user ? 0 : 1], uh, uh_link);
104 
105 	return (uh);
106 }
107 
108 void
109 remove_undef_handler(void *handle)
110 {
111 	struct undef_handler *uh;
112 
113 	uh = handle;
114 	LIST_REMOVE(uh, uh_link);
115 	free(handle, M_UNDEF);
116 }
117 
118 int
119 undef_insn(u_int el, struct trapframe *frame)
120 {
121 	struct undef_handler *uh;
122 	uint32_t insn;
123 	int ret;
124 
125 	KASSERT(el < 2, ("Invalid exception level %u", el));
126 
127 	if (el == 0) {
128 		ret = fueword32((uint32_t *)frame->tf_elr, &insn);
129 		if (ret != 0)
130 			panic("Unable to read userspace faulting instruction");
131 	} else {
132 		insn = *(uint32_t *)frame->tf_elr;
133 	}
134 
135 	LIST_FOREACH(uh, &undef_handlers[el], uh_link) {
136 		ret = uh->uh_handler(frame->tf_elr, insn, frame, frame->tf_esr);
137 		if (ret)
138 			return (1);
139 	}
140 
141 	return (0);
142 }
143