xref: /freebsd/sys/arm64/coresight/coresight.c (revision b00ab754)
1 /*-
2  * Copyright (c) 2018 Ruslan Bukin <br@bsdpad.com>
3  * All rights reserved.
4  *
5  * This software was developed by SRI International and the University of
6  * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
7  * ("CTSRD"), as part of the DARPA CRASH research programme.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/bus.h>
37 #include <sys/rman.h>
38 #include <sys/kernel.h>
39 #include <sys/module.h>
40 #include <machine/bus.h>
41 
42 #include <dev/ofw/ofw_bus.h>
43 #include <dev/ofw/ofw_bus_subr.h>
44 
45 #include <arm64/coresight/coresight.h>
46 
47 MALLOC_DEFINE(M_CORESIGHT, "coresight", "ARM Coresight");
48 static struct mtx cs_mtx;
49 
50 struct coresight_device_list cs_devs;
51 
52 static int
53 coresight_get_ports(phandle_t dev_node,
54     struct coresight_platform_data *pdata)
55 {
56 	phandle_t node, child;
57 	pcell_t port_reg;
58 	phandle_t xref;
59 	char *name;
60 	int ret;
61 	phandle_t endpoint_child;
62 	struct endpoint *endp;
63 
64 	child = ofw_bus_find_child(dev_node, "ports");
65 	if (child)
66 		node = child;
67 	else
68 		node = dev_node;
69 
70 	for (child = OF_child(node); child != 0; child = OF_peer(child)) {
71 		ret = OF_getprop_alloc(child, "name", (void **)&name);
72 		if (ret == -1)
73 			continue;
74 
75 		if (strcasecmp(name, "port") ||
76 		    strncasecmp(name, "port@", 6)) {
77 
78 			port_reg = -1;
79 			OF_getencprop(child, "reg", (void *)&port_reg, sizeof(port_reg));
80 
81 			endpoint_child = ofw_bus_find_child(child, "endpoint");
82 			if (endpoint_child) {
83 				if (OF_getencprop(endpoint_child, "remote-endpoint", &xref,
84 				    sizeof(xref)) == -1) {
85 					printf("failed\n");
86 					continue;
87 				}
88 				endp = malloc(sizeof(struct endpoint), M_CORESIGHT,
89 				    M_WAITOK | M_ZERO);
90 				endp->my_node = endpoint_child;
91 				endp->their_node = OF_node_from_xref(xref);
92 				endp->dev_node = dev_node;
93 				endp->reg = port_reg;
94 				if (OF_getproplen(endpoint_child, "slave-mode") >= 0) {
95 					pdata->in_ports++;
96 					endp->slave = 1;
97 				} else {
98 					pdata->out_ports++;
99 				}
100 
101 				mtx_lock(&pdata->mtx_lock);
102 				TAILQ_INSERT_TAIL(&pdata->endpoints, endp, link);
103 				mtx_unlock(&pdata->mtx_lock);
104 			}
105 		}
106 	}
107 
108 	return (0);
109 }
110 
111 int
112 coresight_register(struct coresight_desc *desc)
113 {
114 	struct coresight_device *cs_dev;
115 
116 	cs_dev = malloc(sizeof(struct coresight_device),
117 	    M_CORESIGHT, M_WAITOK | M_ZERO);
118 	cs_dev->dev = desc->dev;
119 	cs_dev->node = ofw_bus_get_node(desc->dev);
120 	cs_dev->pdata = desc->pdata;
121 	cs_dev->dev_type = desc->dev_type;
122 
123 	mtx_lock(&cs_mtx);
124 	TAILQ_INSERT_TAIL(&cs_devs, cs_dev, link);
125 	mtx_unlock(&cs_mtx);
126 
127 	return (0);
128 }
129 
130 struct endpoint *
131 coresight_get_output_endpoint(struct coresight_platform_data *pdata)
132 {
133 	struct endpoint *endp;
134 
135 	if (pdata->out_ports != 1)
136 		return (NULL);
137 
138 	TAILQ_FOREACH(endp, &pdata->endpoints, link) {
139 		if (endp->slave == 0)
140 			return (endp);
141 	}
142 
143 	return (NULL);
144 }
145 
146 struct coresight_device *
147 coresight_get_output_device(struct endpoint *endp, struct endpoint **out_endp)
148 {
149 	struct coresight_device *cs_dev;
150 	struct endpoint *endp2;
151 
152 	TAILQ_FOREACH(cs_dev, &cs_devs, link) {
153 		TAILQ_FOREACH(endp2, &cs_dev->pdata->endpoints, link) {
154 			if (endp->their_node == endp2->my_node) {
155 				*out_endp = endp2;
156 				return (cs_dev);
157 			}
158 		}
159 	}
160 
161 	return (NULL);
162 }
163 
164 static int
165 coresight_get_cpu(phandle_t node,
166     struct coresight_platform_data *pdata)
167 {
168 	phandle_t cpu_node;
169 	pcell_t xref;
170 	pcell_t cpu_reg;
171 
172 	if (OF_getencprop(node, "cpu", &xref, sizeof(xref)) != -1) {
173 		cpu_node = OF_node_from_xref(xref);
174 		if (OF_getencprop(cpu_node, "reg", (void *)&cpu_reg,
175 			sizeof(cpu_reg)) > 0) {
176 			pdata->cpu = cpu_reg;
177 			return (0);
178 		}
179 	}
180 
181 	return (-1);
182 }
183 
184 struct coresight_platform_data *
185 coresight_get_platform_data(device_t dev)
186 {
187 	struct coresight_platform_data *pdata;
188 	phandle_t node;
189 
190 	node = ofw_bus_get_node(dev);
191 
192 	pdata = malloc(sizeof(struct coresight_platform_data),
193 	    M_CORESIGHT, M_WAITOK | M_ZERO);
194 	mtx_init(&pdata->mtx_lock, "Coresight Platform Data", NULL, MTX_DEF);
195 	TAILQ_INIT(&pdata->endpoints);
196 
197 	coresight_get_cpu(node, pdata);
198 	coresight_get_ports(node, pdata);
199 
200 	if (bootverbose)
201 		printf("Total ports: in %d out %d\n",
202 		    pdata->in_ports, pdata->out_ports);
203 
204 	return (pdata);
205 }
206 
207 static void
208 coresight_init(void)
209 {
210 
211 	mtx_init(&cs_mtx, "ARM Coresight", NULL, MTX_DEF);
212 	TAILQ_INIT(&cs_devs);
213 }
214 
215 SYSINIT(coresight, SI_SUB_DRIVERS, SI_ORDER_FIRST, coresight_init, NULL);
216