1 /*- 2 * Copyright (c) 2017 Andrew Turner 3 * All rights reserved. 4 * 5 * This software was developed by SRI International and the University of 6 * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 7 * ("CTSRD"), as part of the DARPA CRASH research programme. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD$ 31 */ 32 33 #ifndef _MACHINE__UNDEFINED_H_ 34 #define _MACHINE__UNDEFINED_H_ 35 36 typedef int (*undef_handler_t)(vm_offset_t, uint32_t, struct trapframe *, 37 uint32_t); 38 39 #define MRS_MASK 0xfff00000 40 #define MRS_VALUE 0xd5300000 41 #define MRS_SPECIAL(insn) ((insn) & 0x000fffe0) 42 #define MRS_REGISTER(insn) ((insn) & 0x0000001f) 43 #define MRS_Op0_SHIFT 19 44 #define MRS_Op0_MASK 0x00080000 45 #define MRS_Op1_SHIFT 16 46 #define MRS_Op1_MASK 0x00070000 47 #define MRS_CRn_SHIFT 12 48 #define MRS_CRn_MASK 0x0000f000 49 #define MRS_CRm_SHIFT 8 50 #define MRS_CRm_MASK 0x00000f00 51 #define MRS_Op2_SHIFT 5 52 #define MRS_Op2_MASK 0x000000e0 53 #define MRS_Rt_SHIFT 0 54 #define MRS_Rt_MASK 0x0000001f 55 56 static inline int 57 mrs_Op0(uint32_t insn) 58 { 59 60 /* op0 is encoded without the top bit in a mrs instruction */ 61 return (2 | ((insn & MRS_Op0_MASK) >> MRS_Op0_SHIFT)); 62 } 63 64 #define MRS_GET(op) \ 65 static inline int \ 66 mrs_##op(uint32_t insn) \ 67 { \ 68 \ 69 return ((insn & MRS_##op##_MASK) >> MRS_##op##_SHIFT); \ 70 } 71 MRS_GET(Op1) 72 MRS_GET(CRn) 73 MRS_GET(CRm) 74 MRS_GET(Op2) 75 76 void undef_init(void); 77 void *install_undef_handler(bool, undef_handler_t); 78 void remove_undef_handler(void *); 79 int undef_insn(u_int, struct trapframe *); 80 81 #endif 82