1 /*- 2 * Copyright (c) 2015 The FreeBSD Foundation 3 * All rights reserved. 4 * 5 * This software was developed by Andrew Turner under 6 * sponsorship from the FreeBSD Foundation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD$ 30 */ 31 32 #ifndef _MACHINE_VFP_H_ 33 #define _MACHINE_VFP_H_ 34 35 /* VFPCR */ 36 #define VFPCR_AHP (0x04000000) /* alt. half-precision: */ 37 #define VFPCR_DN (0x02000000) /* default NaN enable */ 38 #define VFPCR_FZ (0x01000000) /* flush to zero enabled */ 39 #define VFPCR_INIT VFPCR_DN /* Default fpcr after exec */ 40 41 #define VFPCR_RMODE_OFF 22 /* rounding mode offset */ 42 #define VFPCR_RMODE_MASK (0x00c00000) /* rounding mode mask */ 43 #define VFPCR_RMODE_RN (0x00000000) /* round nearest */ 44 #define VFPCR_RMODE_RPI (0x00400000) /* round to plus infinity */ 45 #define VFPCR_RMODE_RNI (0x00800000) /* round to neg infinity */ 46 #define VFPCR_RMODE_RM (0x00c00000) /* round to zero */ 47 48 #define VFPCR_STRIDE_OFF 20 /* vector stride -1 */ 49 #define VFPCR_STRIDE_MASK (0x00300000) 50 #define VFPCR_LEN_OFF 16 /* vector length -1 */ 51 #define VFPCR_LEN_MASK (0x00070000) 52 #define VFPCR_IDE (0x00008000) /* input subnormal exc enable */ 53 #define VFPCR_IXE (0x00001000) /* inexact exception enable */ 54 #define VFPCR_UFE (0x00000800) /* underflow exception enable */ 55 #define VFPCR_OFE (0x00000400) /* overflow exception enable */ 56 #define VFPCR_DZE (0x00000200) /* div by zero exception en */ 57 #define VFPCR_IOE (0x00000100) /* invalid op exec enable */ 58 59 #ifndef LOCORE 60 struct vfpstate { 61 __uint128_t vfp_regs[32]; 62 uint32_t vfp_fpcr; 63 uint32_t vfp_fpsr; 64 }; 65 66 #ifdef _KERNEL 67 struct pcb; 68 struct thread; 69 70 void vfp_init(void); 71 void vfp_discard(struct thread *); 72 void vfp_reset_state(struct thread *, struct pcb *); 73 void vfp_restore_state(void); 74 void vfp_save_state(struct thread *, struct pcb *); 75 76 struct fpu_kern_ctx; 77 78 /* 79 * Flags for fpu_kern_alloc_ctx(), fpu_kern_enter() and fpu_kern_thread(). 80 */ 81 #define FPU_KERN_NORMAL 0x0000 82 #define FPU_KERN_NOWAIT 0x0001 83 #define FPU_KERN_KTHR 0x0002 84 #define FPU_KERN_NOCTX 0x0004 85 86 struct fpu_kern_ctx *fpu_kern_alloc_ctx(u_int); 87 void fpu_kern_free_ctx(struct fpu_kern_ctx *); 88 void fpu_kern_enter(struct thread *, struct fpu_kern_ctx *, u_int); 89 int fpu_kern_leave(struct thread *, struct fpu_kern_ctx *); 90 int fpu_kern_thread(u_int); 91 int is_fpu_kern_thread(u_int); 92 93 /* Convert to and from Aarch32 FPSCR to Aarch64 FPCR/FPSR */ 94 #define VFP_FPSCR_FROM_SRCR(vpsr, vpcr) ((vpsr) | ((vpcr) & 0x7c00000)) 95 #define VFP_FPSR_FROM_FPSCR(vpscr) ((vpscr) &~ 0x7c00000) 96 #define VFP_FPCR_FROM_FPSCR(vpsrc) ((vpsrc) & 0x7c00000) 97 98 #endif 99 100 #endif 101 102 #endif /* !_MACHINE_VFP_H_ */ 103