1 /*- 2 * Copyright (c) 2015 The FreeBSD Foundation 3 * 4 * This software was developed by Andrew Turner under 5 * sponsorship from the FreeBSD Foundation. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #ifndef _MACHINE_VFP_H_ 32 #define _MACHINE_VFP_H_ 33 34 /* VFPCR */ 35 #define VFPCR_AHP (0x04000000) /* alt. half-precision: */ 36 #define VFPCR_DN (0x02000000) /* default NaN enable */ 37 #define VFPCR_FZ (0x01000000) /* flush to zero enabled */ 38 #define VFPCR_INIT 0 /* Default fpcr after exec */ 39 40 #define VFPCR_RMODE_OFF 22 /* rounding mode offset */ 41 #define VFPCR_RMODE_MASK (0x00c00000) /* rounding mode mask */ 42 #define VFPCR_RMODE_RN (0x00000000) /* round nearest */ 43 #define VFPCR_RMODE_RPI (0x00400000) /* round to plus infinity */ 44 #define VFPCR_RMODE_RNI (0x00800000) /* round to neg infinity */ 45 #define VFPCR_RMODE_RM (0x00c00000) /* round to zero */ 46 47 #define VFPCR_STRIDE_OFF 20 /* vector stride -1 */ 48 #define VFPCR_STRIDE_MASK (0x00300000) 49 #define VFPCR_LEN_OFF 16 /* vector length -1 */ 50 #define VFPCR_LEN_MASK (0x00070000) 51 #define VFPCR_IDE (0x00008000) /* input subnormal exc enable */ 52 #define VFPCR_IXE (0x00001000) /* inexact exception enable */ 53 #define VFPCR_UFE (0x00000800) /* underflow exception enable */ 54 #define VFPCR_OFE (0x00000400) /* overflow exception enable */ 55 #define VFPCR_DZE (0x00000200) /* div by zero exception en */ 56 #define VFPCR_IOE (0x00000100) /* invalid op exec enable */ 57 58 #ifndef LOCORE 59 struct vfpstate { 60 __uint128_t vfp_regs[32]; 61 uint32_t vfp_fpcr; 62 uint32_t vfp_fpsr; 63 }; 64 65 #ifdef _KERNEL 66 struct pcb; 67 struct thread; 68 69 void vfp_init(void); 70 void vfp_discard(struct thread *); 71 void vfp_reset_state(struct thread *, struct pcb *); 72 void vfp_restore_state(void); 73 void vfp_save_state(struct thread *, struct pcb *); 74 75 struct fpu_kern_ctx; 76 77 /* 78 * Flags for fpu_kern_alloc_ctx(), fpu_kern_enter() and fpu_kern_thread(). 79 */ 80 #define FPU_KERN_NORMAL 0x0000 81 #define FPU_KERN_NOWAIT 0x0001 82 #define FPU_KERN_KTHR 0x0002 83 #define FPU_KERN_NOCTX 0x0004 84 85 struct fpu_kern_ctx *fpu_kern_alloc_ctx(u_int); 86 void fpu_kern_free_ctx(struct fpu_kern_ctx *); 87 void fpu_kern_enter(struct thread *, struct fpu_kern_ctx *, u_int); 88 int fpu_kern_leave(struct thread *, struct fpu_kern_ctx *); 89 int fpu_kern_thread(u_int); 90 int is_fpu_kern_thread(u_int); 91 92 /* Convert to and from Aarch32 FPSCR to Aarch64 FPCR/FPSR */ 93 #define VFP_FPSCR_FROM_SRCR(vpsr, vpcr) ((vpsr) | ((vpcr) & 0x7c00000)) 94 #define VFP_FPSR_FROM_FPSCR(vpscr) ((vpscr) &~ 0x7c00000) 95 #define VFP_FPCR_FROM_FPSCR(vpsrc) ((vpsrc) & 0x7c00000) 96 97 #endif 98 99 #endif 100 101 #endif /* !_MACHINE_VFP_H_ */ 102