1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2006 Bernd Walter <tisco@FreeBSD.org> All rights reserved. 5 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> All rights reserved. 6 * Copyright (c) 2015-2017 Ilya Bakulin <kibab@FreeBSD.org> All rights reserved. 7 * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org> 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer, 14 * without modification, immediately at the beginning of the file. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 * 30 * Some code derived from the sys/dev/mmc and sys/cam/ata 31 * Thanks to Warner Losh <imp@FreeBSD.org>, Alexander Motin <mav@FreeBSD.org> 32 * Bernd Walter <tisco@FreeBSD.org>, and other authors. 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 //#include "opt_sdda.h" 39 40 #include <sys/param.h> 41 42 #ifdef _KERNEL 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/bio.h> 46 #include <sys/endian.h> 47 #include <sys/taskqueue.h> 48 #include <sys/lock.h> 49 #include <sys/mutex.h> 50 #include <sys/conf.h> 51 #include <sys/devicestat.h> 52 #include <sys/eventhandler.h> 53 #include <sys/malloc.h> 54 #include <sys/cons.h> 55 #include <sys/proc.h> 56 #include <sys/reboot.h> 57 #include <geom/geom_disk.h> 58 #include <machine/_inttypes.h> /* for PRIu64 */ 59 #endif /* _KERNEL */ 60 61 #ifndef _KERNEL 62 #include <stdio.h> 63 #include <string.h> 64 #endif /* _KERNEL */ 65 66 #include <cam/cam.h> 67 #include <cam/cam_ccb.h> 68 #include <cam/cam_queue.h> 69 #include <cam/cam_periph.h> 70 #include <cam/cam_sim.h> 71 #include <cam/cam_xpt.h> 72 #include <cam/cam_xpt_sim.h> 73 #include <cam/cam_xpt_periph.h> 74 #include <cam/cam_xpt_internal.h> 75 #include <cam/cam_debug.h> 76 77 78 #include <cam/mmc/mmc_all.h> 79 80 #include <machine/md_var.h> /* geometry translation */ 81 82 #ifdef _KERNEL 83 84 typedef enum { 85 SDDA_FLAG_OPEN = 0x0002, 86 SDDA_FLAG_DIRTY = 0x0004 87 } sdda_flags; 88 89 typedef enum { 90 SDDA_STATE_INIT, 91 SDDA_STATE_INVALID, 92 SDDA_STATE_NORMAL, 93 SDDA_STATE_PART_SWITCH, 94 } sdda_state; 95 96 #define SDDA_FMT_BOOT "sdda%dboot" 97 #define SDDA_FMT_GP "sdda%dgp" 98 #define SDDA_FMT_RPMB "sdda%drpmb" 99 #define SDDA_LABEL_ENH "enh" 100 101 #define SDDA_PART_NAMELEN (16 + 1) 102 103 struct sdda_softc; 104 105 struct sdda_part { 106 struct disk *disk; 107 struct bio_queue_head bio_queue; 108 sdda_flags flags; 109 struct sdda_softc *sc; 110 u_int cnt; 111 u_int type; 112 bool ro; 113 char name[SDDA_PART_NAMELEN]; 114 }; 115 116 struct sdda_softc { 117 int outstanding_cmds; /* Number of active commands */ 118 int refcount; /* Active xpt_action() calls */ 119 sdda_state state; 120 struct mmc_data *mmcdata; 121 struct cam_periph *periph; 122 // sdda_quirks quirks; 123 struct task start_init_task; 124 uint32_t raw_csd[4]; 125 uint8_t raw_ext_csd[512]; /* MMC only? */ 126 struct mmc_csd csd; 127 struct mmc_cid cid; 128 struct mmc_scr scr; 129 /* Calculated from CSD */ 130 uint64_t sector_count; 131 uint64_t mediasize; 132 133 /* Calculated from CID */ 134 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ 135 char card_sn_string[16];/* Formatted serial # for disk->d_ident */ 136 /* Determined from CSD + is highspeed card*/ 137 uint32_t card_f_max; 138 139 /* Generic switch timeout */ 140 uint32_t cmd6_time; 141 /* MMC partitions support */ 142 struct sdda_part *part[MMC_PART_MAX]; 143 uint8_t part_curr; /* Partition currently switched to */ 144 uint8_t part_requested; /* What partition we're currently switching to */ 145 uint32_t part_time; /* Partition switch timeout [us] */ 146 off_t enh_base; /* Enhanced user data area slice base ... */ 147 off_t enh_size; /* ... and size [bytes] */ 148 int log_count; 149 struct timeval log_time; 150 }; 151 152 static const char *mmc_errmsg[] = 153 { 154 "None", 155 "Timeout", 156 "Bad CRC", 157 "Fifo", 158 "Failed", 159 "Invalid", 160 "NO MEMORY" 161 }; 162 163 #define ccb_bp ppriv_ptr1 164 165 static disk_strategy_t sddastrategy; 166 static periph_init_t sddainit; 167 static void sddaasync(void *callback_arg, u_int32_t code, 168 struct cam_path *path, void *arg); 169 static periph_ctor_t sddaregister; 170 static periph_dtor_t sddacleanup; 171 static periph_start_t sddastart; 172 static periph_oninv_t sddaoninvalidate; 173 static void sddadone(struct cam_periph *periph, 174 union ccb *done_ccb); 175 static int sddaerror(union ccb *ccb, u_int32_t cam_flags, 176 u_int32_t sense_flags); 177 178 static int mmc_handle_reply(union ccb *ccb); 179 static uint16_t get_rca(struct cam_periph *periph); 180 static void sdda_start_init(void *context, union ccb *start_ccb); 181 static void sdda_start_init_task(void *context, int pending); 182 static void sdda_process_mmc_partitions(struct cam_periph *periph, union ccb *start_ccb); 183 static uint32_t sdda_get_host_caps(struct cam_periph *periph, union ccb *ccb); 184 static void sdda_init_switch_part(struct cam_periph *periph, union ccb *start_ccb, u_int part); 185 static int mmc_select_card(struct cam_periph *periph, union ccb *ccb, uint32_t rca); 186 static inline uint32_t mmc_get_sector_size(struct cam_periph *periph) {return MMC_SECTOR_SIZE;} 187 188 /* TODO: actually issue GET_TRAN_SETTINGS to get R/O status */ 189 static inline bool sdda_get_read_only(struct cam_periph *periph, union ccb *start_ccb) 190 { 191 192 return (false); 193 } 194 195 static uint32_t mmc_get_spec_vers(struct cam_periph *periph); 196 static uint64_t mmc_get_media_size(struct cam_periph *periph); 197 static uint32_t mmc_get_cmd6_timeout(struct cam_periph *periph); 198 static void sdda_add_part(struct cam_periph *periph, u_int type, 199 const char *name, u_int cnt, off_t media_size, bool ro); 200 201 static struct periph_driver sddadriver = 202 { 203 sddainit, "sdda", 204 TAILQ_HEAD_INITIALIZER(sddadriver.units), /* generation */ 0 205 }; 206 207 PERIPHDRIVER_DECLARE(sdda, sddadriver); 208 209 static MALLOC_DEFINE(M_SDDA, "sd_da", "sd_da buffers"); 210 211 static const int exp[8] = { 212 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000 213 }; 214 215 static const int mant[16] = { 216 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 217 }; 218 219 static const int cur_min[8] = { 220 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000 221 }; 222 223 static const int cur_max[8] = { 224 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000 225 }; 226 227 static uint16_t 228 get_rca(struct cam_periph *periph) { 229 return periph->path->device->mmc_ident_data.card_rca; 230 } 231 232 /* 233 * Figure out if CCB execution resulted in error. 234 * Look at both CAM-level errors and on MMC protocol errors. 235 */ 236 static int 237 mmc_handle_reply(union ccb *ccb) 238 { 239 240 KASSERT(ccb->ccb_h.func_code == XPT_MMC_IO, 241 ("ccb %p: cannot handle non-XPT_MMC_IO errors, got func_code=%d", 242 ccb, ccb->ccb_h.func_code)); 243 244 /* TODO: maybe put MMC-specific handling into cam.c/cam_error_print altogether */ 245 if (((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP)) { 246 if (ccb->mmcio.cmd.error != 0) { 247 xpt_print_path(ccb->ccb_h.path); 248 printf("CMD%d failed, err %d (%s)\n", 249 ccb->mmcio.cmd.opcode, 250 ccb->mmcio.cmd.error, 251 mmc_errmsg[ccb->mmcio.cmd.error]); 252 return (EIO); 253 } 254 } else { 255 cam_error_print(ccb, CAM_ESF_ALL, CAM_EPF_ALL); 256 return (EIO); 257 } 258 259 return (0); /* Normal return */ 260 } 261 262 263 static uint32_t 264 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size) 265 { 266 const int i = (bit_len / 32) - (start / 32) - 1; 267 const int shift = start & 31; 268 uint32_t retval = bits[i] >> shift; 269 if (size + shift > 32) 270 retval |= bits[i - 1] << (32 - shift); 271 return (retval & ((1llu << size) - 1)); 272 } 273 274 275 static void 276 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd) 277 { 278 int v; 279 int m; 280 int e; 281 282 memset(csd, 0, sizeof(*csd)); 283 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2); 284 if (v == 0) { 285 m = mmc_get_bits(raw_csd, 128, 115, 4); 286 e = mmc_get_bits(raw_csd, 128, 112, 3); 287 csd->tacc = (exp[e] * mant[m] + 9) / 10; 288 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 289 m = mmc_get_bits(raw_csd, 128, 99, 4); 290 e = mmc_get_bits(raw_csd, 128, 96, 3); 291 csd->tran_speed = exp[e] * 10000 * mant[m]; 292 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 293 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 294 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 295 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 296 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 297 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 298 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 299 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 300 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 301 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 302 m = mmc_get_bits(raw_csd, 128, 62, 12); 303 e = mmc_get_bits(raw_csd, 128, 47, 3); 304 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 305 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 306 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 307 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 308 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 309 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 310 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 311 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 312 } else if (v == 1) { 313 m = mmc_get_bits(raw_csd, 128, 115, 4); 314 e = mmc_get_bits(raw_csd, 128, 112, 3); 315 csd->tacc = (exp[e] * mant[m] + 9) / 10; 316 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 317 m = mmc_get_bits(raw_csd, 128, 99, 4); 318 e = mmc_get_bits(raw_csd, 128, 96, 3); 319 csd->tran_speed = exp[e] * 10000 * mant[m]; 320 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 321 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 322 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 323 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 324 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 325 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 326 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1) * 327 512 * 1024; 328 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 329 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 330 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 331 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 332 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 333 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 334 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 335 } else 336 panic("unknown SD CSD version"); 337 } 338 339 static void 340 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd) 341 { 342 int m; 343 int e; 344 345 memset(csd, 0, sizeof(*csd)); 346 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2); 347 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4); 348 m = mmc_get_bits(raw_csd, 128, 115, 4); 349 e = mmc_get_bits(raw_csd, 128, 112, 3); 350 csd->tacc = exp[e] * mant[m] + 9 / 10; 351 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 352 m = mmc_get_bits(raw_csd, 128, 99, 4); 353 e = mmc_get_bits(raw_csd, 128, 96, 3); 354 csd->tran_speed = exp[e] * 10000 * mant[m]; 355 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 356 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 357 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 358 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 359 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 360 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 361 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 362 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 363 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 364 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 365 m = mmc_get_bits(raw_csd, 128, 62, 12); 366 e = mmc_get_bits(raw_csd, 128, 47, 3); 367 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 368 csd->erase_blk_en = 0; 369 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) * 370 (mmc_get_bits(raw_csd, 128, 37, 5) + 1); 371 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5); 372 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 373 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 374 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 375 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 376 } 377 378 static void 379 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid) 380 { 381 int i; 382 383 /* There's no version info, so we take it on faith */ 384 memset(cid, 0, sizeof(*cid)); 385 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 386 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16); 387 for (i = 0; i < 5; i++) 388 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 389 cid->pnm[5] = 0; 390 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8); 391 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32); 392 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000; 393 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4); 394 } 395 396 static void 397 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid) 398 { 399 int i; 400 401 /* There's no version info, so we take it on faith */ 402 memset(cid, 0, sizeof(*cid)); 403 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 404 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8); 405 for (i = 0; i < 6; i++) 406 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 407 cid->pnm[6] = 0; 408 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8); 409 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32); 410 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4); 411 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4) + 1997; 412 } 413 414 static void 415 mmc_format_card_id_string(struct sdda_softc *sc, struct mmc_params *mmcp) 416 { 417 char oidstr[8]; 418 uint8_t c1; 419 uint8_t c2; 420 421 /* 422 * Format a card ID string for use by the mmcsd driver, it's what 423 * appears between the <> in the following: 424 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 Mfg 08/2008 by 3 TN> at mmc0 425 * 22.5MHz/4bit/128-block 426 * 427 * Also format just the card serial number, which the mmcsd driver will 428 * use as the disk->d_ident string. 429 * 430 * The card_id_string in mmc_ivars is currently allocated as 64 bytes, 431 * and our max formatted length is currently 55 bytes if every field 432 * contains the largest value. 433 * 434 * Sometimes the oid is two printable ascii chars; when it's not, 435 * format it as 0xnnnn instead. 436 */ 437 c1 = (sc->cid.oid >> 8) & 0x0ff; 438 c2 = sc->cid.oid & 0x0ff; 439 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f) 440 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2); 441 else 442 snprintf(oidstr, sizeof(oidstr), "0x%04x", sc->cid.oid); 443 snprintf(sc->card_sn_string, sizeof(sc->card_sn_string), 444 "%08X", sc->cid.psn); 445 snprintf(sc->card_id_string, sizeof(sc->card_id_string), 446 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s", 447 mmcp->card_features & CARD_FEATURE_MMC ? "MMC" : "SD", 448 mmcp->card_features & CARD_FEATURE_SDHC ? "HC" : "", 449 sc->cid.pnm, sc->cid.prv >> 4, sc->cid.prv & 0x0f, 450 sc->cid.psn, sc->cid.mdt_month, sc->cid.mdt_year, 451 sc->cid.mid, oidstr); 452 } 453 454 static int 455 sddaopen(struct disk *dp) 456 { 457 struct sdda_part *part; 458 struct cam_periph *periph; 459 struct sdda_softc *softc; 460 int error; 461 462 part = (struct sdda_part *)dp->d_drv1; 463 softc = part->sc; 464 periph = softc->periph; 465 if (cam_periph_acquire(periph) != 0) { 466 return(ENXIO); 467 } 468 469 cam_periph_lock(periph); 470 if ((error = cam_periph_hold(periph, PRIBIO|PCATCH)) != 0) { 471 cam_periph_unlock(periph); 472 cam_periph_release(periph); 473 return (error); 474 } 475 476 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaopen\n")); 477 478 part->flags |= SDDA_FLAG_OPEN; 479 480 cam_periph_unhold(periph); 481 cam_periph_unlock(periph); 482 return (0); 483 } 484 485 static int 486 sddaclose(struct disk *dp) 487 { 488 struct sdda_part *part; 489 struct cam_periph *periph; 490 struct sdda_softc *softc; 491 492 part = (struct sdda_part *)dp->d_drv1; 493 softc = part->sc; 494 periph = softc->periph; 495 part->flags &= ~SDDA_FLAG_OPEN; 496 497 cam_periph_lock(periph); 498 499 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaclose\n")); 500 501 while (softc->refcount != 0) 502 cam_periph_sleep(periph, &softc->refcount, PRIBIO, "sddaclose", 1); 503 cam_periph_unlock(periph); 504 cam_periph_release(periph); 505 return (0); 506 } 507 508 static void 509 sddaschedule(struct cam_periph *periph) 510 { 511 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 512 struct sdda_part *part; 513 struct bio *bp; 514 int i; 515 516 /* Check if we have more work to do. */ 517 /* Find partition that has outstanding commands. Prefer current partition. */ 518 bp = bioq_first(&softc->part[softc->part_curr]->bio_queue); 519 if (bp == NULL) { 520 for (i = 0; i < MMC_PART_MAX; i++) { 521 if ((part = softc->part[i]) != NULL && 522 (bp = bioq_first(&softc->part[i]->bio_queue)) != NULL) 523 break; 524 } 525 } 526 if (bp != NULL) { 527 xpt_schedule(periph, CAM_PRIORITY_NORMAL); 528 } 529 } 530 531 /* 532 * Actually translate the requested transfer into one the physical driver 533 * can understand. The transfer is described by a buf and will include 534 * only one physical transfer. 535 */ 536 static void 537 sddastrategy(struct bio *bp) 538 { 539 struct cam_periph *periph; 540 struct sdda_part *part; 541 struct sdda_softc *softc; 542 543 part = (struct sdda_part *)bp->bio_disk->d_drv1; 544 softc = part->sc; 545 periph = softc->periph; 546 547 cam_periph_lock(periph); 548 549 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastrategy(%p)\n", bp)); 550 551 /* 552 * If the device has been made invalid, error out 553 */ 554 if ((periph->flags & CAM_PERIPH_INVALID) != 0) { 555 cam_periph_unlock(periph); 556 biofinish(bp, NULL, ENXIO); 557 return; 558 } 559 560 /* 561 * Place it in the queue of disk activities for this disk 562 */ 563 bioq_disksort(&part->bio_queue, bp); 564 565 /* 566 * Schedule ourselves for performing the work. 567 */ 568 sddaschedule(periph); 569 cam_periph_unlock(periph); 570 571 return; 572 } 573 574 static void 575 sddainit(void) 576 { 577 cam_status status; 578 579 /* 580 * Install a global async callback. This callback will 581 * receive async callbacks like "new device found". 582 */ 583 status = xpt_register_async(AC_FOUND_DEVICE, sddaasync, NULL, NULL); 584 585 if (status != CAM_REQ_CMP) { 586 printf("sdda: Failed to attach master async callback " 587 "due to status 0x%x!\n", status); 588 } 589 } 590 591 /* 592 * Callback from GEOM, called when it has finished cleaning up its 593 * resources. 594 */ 595 static void 596 sddadiskgonecb(struct disk *dp) 597 { 598 struct cam_periph *periph; 599 struct sdda_part *part; 600 601 part = (struct sdda_part *)dp->d_drv1; 602 periph = part->sc->periph; 603 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddadiskgonecb\n")); 604 605 cam_periph_release(periph); 606 } 607 608 static void 609 sddaoninvalidate(struct cam_periph *periph) 610 { 611 struct sdda_softc *softc; 612 struct sdda_part *part; 613 614 softc = (struct sdda_softc *)periph->softc; 615 616 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaoninvalidate\n")); 617 618 /* 619 * De-register any async callbacks. 620 */ 621 xpt_register_async(0, sddaasync, periph, periph->path); 622 623 /* 624 * Return all queued I/O with ENXIO. 625 * XXX Handle any transactions queued to the card 626 * with XPT_ABORT_CCB. 627 */ 628 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush start\n")); 629 for (int i = 0; i < MMC_PART_MAX; i++) { 630 if ((part = softc->part[i]) != NULL) { 631 bioq_flush(&part->bio_queue, NULL, ENXIO); 632 disk_gone(part->disk); 633 } 634 } 635 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush end\n")); 636 637 } 638 639 static void 640 sddacleanup(struct cam_periph *periph) 641 { 642 struct sdda_softc *softc; 643 struct sdda_part *part; 644 int i; 645 646 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddacleanup\n")); 647 softc = (struct sdda_softc *)periph->softc; 648 649 cam_periph_unlock(periph); 650 651 for (i = 0; i < MMC_PART_MAX; i++) { 652 if ((part = softc->part[i]) != NULL) { 653 disk_destroy(part->disk); 654 free(part, M_DEVBUF); 655 softc->part[i] = NULL; 656 } 657 } 658 free(softc, M_DEVBUF); 659 cam_periph_lock(periph); 660 } 661 662 static void 663 sddaasync(void *callback_arg, u_int32_t code, 664 struct cam_path *path, void *arg) 665 { 666 struct ccb_getdev cgd; 667 struct cam_periph *periph; 668 struct sdda_softc *softc; 669 670 periph = (struct cam_periph *)callback_arg; 671 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddaasync(code=%d)\n", code)); 672 switch (code) { 673 case AC_FOUND_DEVICE: 674 { 675 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_FOUND_DEVICE\n")); 676 struct ccb_getdev *cgd; 677 cam_status status; 678 679 cgd = (struct ccb_getdev *)arg; 680 if (cgd == NULL) 681 break; 682 683 if (cgd->protocol != PROTO_MMCSD) 684 break; 685 686 if (!(path->device->mmc_ident_data.card_features & CARD_FEATURE_MEMORY)) { 687 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("No memory on the card!\n")); 688 break; 689 } 690 691 /* 692 * Allocate a peripheral instance for 693 * this device and start the probe 694 * process. 695 */ 696 status = cam_periph_alloc(sddaregister, sddaoninvalidate, 697 sddacleanup, sddastart, 698 "sdda", CAM_PERIPH_BIO, 699 path, sddaasync, 700 AC_FOUND_DEVICE, cgd); 701 702 if (status != CAM_REQ_CMP 703 && status != CAM_REQ_INPROG) 704 printf("sddaasync: Unable to attach to new device " 705 "due to status 0x%x\n", status); 706 break; 707 } 708 case AC_GETDEV_CHANGED: 709 { 710 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_GETDEV_CHANGED\n")); 711 softc = (struct sdda_softc *)periph->softc; 712 xpt_setup_ccb(&cgd.ccb_h, periph->path, CAM_PRIORITY_NORMAL); 713 cgd.ccb_h.func_code = XPT_GDEV_TYPE; 714 xpt_action((union ccb *)&cgd); 715 cam_periph_async(periph, code, path, arg); 716 break; 717 } 718 case AC_ADVINFO_CHANGED: 719 { 720 uintptr_t buftype; 721 int i; 722 723 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_ADVINFO_CHANGED\n")); 724 buftype = (uintptr_t)arg; 725 if (buftype == CDAI_TYPE_PHYS_PATH) { 726 struct sdda_softc *softc; 727 struct sdda_part *part; 728 729 softc = periph->softc; 730 for (i = 0; i < MMC_PART_MAX; i++) { 731 if ((part = softc->part[i]) != NULL) { 732 disk_attr_changed(part->disk, "GEOM::physpath", 733 M_NOWAIT); 734 } 735 } 736 } 737 break; 738 } 739 default: 740 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> default?!\n")); 741 cam_periph_async(periph, code, path, arg); 742 break; 743 } 744 } 745 746 747 static int 748 sddagetattr(struct bio *bp) 749 { 750 struct cam_periph *periph; 751 struct sdda_softc *softc; 752 struct sdda_part *part; 753 int ret; 754 755 part = (struct sdda_part *)bp->bio_disk->d_drv1; 756 softc = part->sc; 757 periph = softc->periph; 758 cam_periph_lock(periph); 759 ret = xpt_getattr(bp->bio_data, bp->bio_length, bp->bio_attribute, 760 periph->path); 761 cam_periph_unlock(periph); 762 if (ret == 0) 763 bp->bio_completed = bp->bio_length; 764 return (ret); 765 } 766 767 static cam_status 768 sddaregister(struct cam_periph *periph, void *arg) 769 { 770 struct sdda_softc *softc; 771 struct ccb_getdev *cgd; 772 union ccb *request_ccb; /* CCB representing the probe request */ 773 774 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaregister\n")); 775 cgd = (struct ccb_getdev *)arg; 776 if (cgd == NULL) { 777 printf("sddaregister: no getdev CCB, can't register device\n"); 778 return (CAM_REQ_CMP_ERR); 779 } 780 781 softc = (struct sdda_softc *)malloc(sizeof(*softc), M_DEVBUF, 782 M_NOWAIT|M_ZERO); 783 784 if (softc == NULL) { 785 printf("sddaregister: Unable to probe new device. " 786 "Unable to allocate softc\n"); 787 return (CAM_REQ_CMP_ERR); 788 } 789 790 softc->state = SDDA_STATE_INIT; 791 softc->mmcdata = 792 (struct mmc_data *)malloc(sizeof(struct mmc_data), M_DEVBUF, M_NOWAIT|M_ZERO); 793 if (softc->mmcdata == NULL) { 794 printf("sddaregister: Unable to probe new device. " 795 "Unable to allocate mmcdata\n"); 796 return (CAM_REQ_CMP_ERR); 797 } 798 periph->softc = softc; 799 softc->periph = periph; 800 801 request_ccb = (union ccb*) arg; 802 xpt_schedule(periph, CAM_PRIORITY_XPT); 803 TASK_INIT(&softc->start_init_task, 0, sdda_start_init_task, periph); 804 taskqueue_enqueue(taskqueue_thread, &softc->start_init_task); 805 806 return (CAM_REQ_CMP); 807 } 808 809 static int 810 mmc_exec_app_cmd(struct cam_periph *periph, union ccb *ccb, 811 struct mmc_command *cmd) { 812 int err; 813 814 /* Send APP_CMD first */ 815 memset(&ccb->mmcio.cmd, 0, sizeof(struct mmc_command)); 816 memset(&ccb->mmcio.stop, 0, sizeof(struct mmc_command)); 817 cam_fill_mmcio(&ccb->mmcio, 818 /*retries*/ 0, 819 /*cbfcnp*/ NULL, 820 /*flags*/ CAM_DIR_NONE, 821 /*mmc_opcode*/ MMC_APP_CMD, 822 /*mmc_arg*/ get_rca(periph) << 16, 823 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_AC, 824 /*mmc_data*/ NULL, 825 /*timeout*/ 0); 826 827 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 828 err = mmc_handle_reply(ccb); 829 if (err != 0) 830 return (err); 831 if (!(ccb->mmcio.cmd.resp[0] & R1_APP_CMD)) 832 return (EIO); 833 834 /* Now exec actual command */ 835 int flags = 0; 836 if (cmd->data != NULL) { 837 ccb->mmcio.cmd.data = cmd->data; 838 if (cmd->data->flags & MMC_DATA_READ) 839 flags |= CAM_DIR_IN; 840 if (cmd->data->flags & MMC_DATA_WRITE) 841 flags |= CAM_DIR_OUT; 842 } else flags = CAM_DIR_NONE; 843 844 cam_fill_mmcio(&ccb->mmcio, 845 /*retries*/ 0, 846 /*cbfcnp*/ NULL, 847 /*flags*/ flags, 848 /*mmc_opcode*/ cmd->opcode, 849 /*mmc_arg*/ cmd->arg, 850 /*mmc_flags*/ cmd->flags, 851 /*mmc_data*/ cmd->data, 852 /*timeout*/ 0); 853 854 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 855 err = mmc_handle_reply(ccb); 856 if (err != 0) 857 return (err); 858 memcpy(cmd->resp, ccb->mmcio.cmd.resp, sizeof(cmd->resp)); 859 cmd->error = ccb->mmcio.cmd.error; 860 861 return (0); 862 } 863 864 static int 865 mmc_app_get_scr(struct cam_periph *periph, union ccb *ccb, uint32_t *rawscr) { 866 int err; 867 struct mmc_command cmd; 868 struct mmc_data d; 869 870 memset(&cmd, 0, sizeof(cmd)); 871 memset(&d, 0, sizeof(d)); 872 873 memset(rawscr, 0, 8); 874 cmd.opcode = ACMD_SEND_SCR; 875 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 876 cmd.arg = 0; 877 878 d.data = rawscr; 879 d.len = 8; 880 d.flags = MMC_DATA_READ; 881 cmd.data = &d; 882 883 err = mmc_exec_app_cmd(periph, ccb, &cmd); 884 rawscr[0] = be32toh(rawscr[0]); 885 rawscr[1] = be32toh(rawscr[1]); 886 return (err); 887 } 888 889 static int 890 mmc_send_ext_csd(struct cam_periph *periph, union ccb *ccb, 891 uint8_t *rawextcsd, size_t buf_len) { 892 int err; 893 struct mmc_data d; 894 895 KASSERT(buf_len == 512, ("Buffer for ext csd must be 512 bytes")); 896 memset(&d, 0, sizeof(d)); 897 d.data = rawextcsd; 898 d.len = buf_len; 899 d.flags = MMC_DATA_READ; 900 memset(d.data, 0, d.len); 901 902 cam_fill_mmcio(&ccb->mmcio, 903 /*retries*/ 0, 904 /*cbfcnp*/ NULL, 905 /*flags*/ CAM_DIR_IN, 906 /*mmc_opcode*/ MMC_SEND_EXT_CSD, 907 /*mmc_arg*/ 0, 908 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC, 909 /*mmc_data*/ &d, 910 /*timeout*/ 0); 911 912 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 913 err = mmc_handle_reply(ccb); 914 return (err); 915 } 916 917 static void 918 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr) 919 { 920 unsigned int scr_struct; 921 922 memset(scr, 0, sizeof(*scr)); 923 924 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4); 925 if (scr_struct != 0) { 926 printf("Unrecognised SCR structure version %d\n", 927 scr_struct); 928 return; 929 } 930 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4); 931 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4); 932 } 933 934 static inline void 935 mmc_switch_fill_mmcio(union ccb *ccb, 936 uint8_t set, uint8_t index, uint8_t value, u_int timeout) 937 { 938 int arg = (MMC_SWITCH_FUNC_WR << 24) | 939 (index << 16) | 940 (value << 8) | 941 set; 942 943 cam_fill_mmcio(&ccb->mmcio, 944 /*retries*/ 0, 945 /*cbfcnp*/ NULL, 946 /*flags*/ CAM_DIR_NONE, 947 /*mmc_opcode*/ MMC_SWITCH_FUNC, 948 /*mmc_arg*/ arg, 949 /*mmc_flags*/ MMC_RSP_R1B | MMC_CMD_AC, 950 /*mmc_data*/ NULL, 951 /*timeout*/ timeout); 952 } 953 954 static int 955 mmc_select_card(struct cam_periph *periph, union ccb *ccb, uint32_t rca) 956 { 957 int flags, err; 958 959 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC; 960 cam_fill_mmcio(&ccb->mmcio, 961 /*retries*/ 0, 962 /*cbfcnp*/ NULL, 963 /*flags*/ CAM_DIR_IN, 964 /*mmc_opcode*/ MMC_SELECT_CARD, 965 /*mmc_arg*/ rca << 16, 966 /*mmc_flags*/ flags, 967 /*mmc_data*/ NULL, 968 /*timeout*/ 0); 969 970 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 971 err = mmc_handle_reply(ccb); 972 return (err); 973 } 974 975 static int 976 mmc_switch(struct cam_periph *periph, union ccb *ccb, 977 uint8_t set, uint8_t index, uint8_t value, u_int timeout) 978 { 979 int err; 980 981 mmc_switch_fill_mmcio(ccb, set, index, value, timeout); 982 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 983 err = mmc_handle_reply(ccb); 984 return (err); 985 } 986 987 static uint32_t 988 mmc_get_spec_vers(struct cam_periph *periph) { 989 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 990 991 return (softc->csd.spec_vers); 992 } 993 994 static uint64_t 995 mmc_get_media_size(struct cam_periph *periph) { 996 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 997 998 return (softc->mediasize); 999 } 1000 1001 static uint32_t 1002 mmc_get_cmd6_timeout(struct cam_periph *periph) 1003 { 1004 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1005 1006 if (mmc_get_spec_vers(periph) >= 6) 1007 return (softc->raw_ext_csd[EXT_CSD_GEN_CMD6_TIME] * 10); 1008 return (500 * 1000); 1009 } 1010 1011 static int 1012 mmc_sd_switch(struct cam_periph *periph, union ccb *ccb, 1013 uint8_t mode, uint8_t grp, uint8_t value, 1014 uint8_t *res) { 1015 1016 struct mmc_data mmc_d; 1017 uint32_t arg; 1018 int err; 1019 1020 memset(res, 0, 64); 1021 memset(&mmc_d, 0, sizeof(mmc_d)); 1022 mmc_d.len = 64; 1023 mmc_d.data = res; 1024 mmc_d.flags = MMC_DATA_READ; 1025 1026 arg = mode << 31; /* 0 - check, 1 - set */ 1027 arg |= 0x00FFFFFF; 1028 arg &= ~(0xF << (grp * 4)); 1029 arg |= value << (grp * 4); 1030 1031 cam_fill_mmcio(&ccb->mmcio, 1032 /*retries*/ 0, 1033 /*cbfcnp*/ NULL, 1034 /*flags*/ CAM_DIR_IN, 1035 /*mmc_opcode*/ SD_SWITCH_FUNC, 1036 /*mmc_arg*/ arg, 1037 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC, 1038 /*mmc_data*/ &mmc_d, 1039 /*timeout*/ 0); 1040 1041 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 1042 err = mmc_handle_reply(ccb); 1043 return (err); 1044 } 1045 1046 static int 1047 mmc_set_timing(struct cam_periph *periph, 1048 union ccb *ccb, 1049 enum mmc_bus_timing timing) 1050 { 1051 u_char switch_res[64]; 1052 int err; 1053 uint8_t value; 1054 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1055 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1056 1057 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, 1058 ("mmc_set_timing(timing=%d)", timing)); 1059 switch (timing) { 1060 case bus_timing_normal: 1061 value = 0; 1062 break; 1063 case bus_timing_hs: 1064 value = 1; 1065 break; 1066 default: 1067 return (MMC_ERR_INVALID); 1068 } 1069 if (mmcp->card_features & CARD_FEATURE_MMC) { 1070 err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL, 1071 EXT_CSD_HS_TIMING, value, softc->cmd6_time); 1072 } else { 1073 err = mmc_sd_switch(periph, ccb, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1, value, switch_res); 1074 } 1075 1076 /* Set high-speed timing on the host */ 1077 struct ccb_trans_settings_mmc *cts; 1078 cts = &ccb->cts.proto_specific.mmc; 1079 ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1080 ccb->ccb_h.flags = CAM_DIR_NONE; 1081 ccb->ccb_h.retry_count = 0; 1082 ccb->ccb_h.timeout = 100; 1083 ccb->ccb_h.cbfcnp = NULL; 1084 cts->ios.timing = timing; 1085 cts->ios_valid = MMC_BT; 1086 xpt_action(ccb); 1087 1088 return (err); 1089 } 1090 1091 static void 1092 sdda_start_init_task(void *context, int pending) { 1093 union ccb *new_ccb; 1094 struct cam_periph *periph; 1095 1096 periph = (struct cam_periph *)context; 1097 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init_task\n")); 1098 new_ccb = xpt_alloc_ccb(); 1099 xpt_setup_ccb(&new_ccb->ccb_h, periph->path, 1100 CAM_PRIORITY_NONE); 1101 1102 cam_periph_lock(periph); 1103 sdda_start_init(context, new_ccb); 1104 cam_periph_unlock(periph); 1105 xpt_free_ccb(new_ccb); 1106 } 1107 1108 static void 1109 sdda_set_bus_width(struct cam_periph *periph, union ccb *ccb, int width) { 1110 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1111 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1112 int err; 1113 1114 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_set_bus_width\n")); 1115 1116 /* First set for the card, then for the host */ 1117 if (mmcp->card_features & CARD_FEATURE_MMC) { 1118 uint8_t value; 1119 switch (width) { 1120 case bus_width_1: 1121 value = EXT_CSD_BUS_WIDTH_1; 1122 break; 1123 case bus_width_4: 1124 value = EXT_CSD_BUS_WIDTH_4; 1125 break; 1126 case bus_width_8: 1127 value = EXT_CSD_BUS_WIDTH_8; 1128 break; 1129 default: 1130 panic("Invalid bus width %d", width); 1131 } 1132 err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL, 1133 EXT_CSD_BUS_WIDTH, value, softc->cmd6_time); 1134 } else { 1135 /* For SD cards we send ACMD6 with the required bus width in arg */ 1136 struct mmc_command cmd; 1137 memset(&cmd, 0, sizeof(struct mmc_command)); 1138 cmd.opcode = ACMD_SET_BUS_WIDTH; 1139 cmd.arg = width; 1140 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 1141 err = mmc_exec_app_cmd(periph, ccb, &cmd); 1142 } 1143 1144 if (err != MMC_ERR_NONE) { 1145 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Error %d when setting bus width on the card\n", err)); 1146 return; 1147 } 1148 /* Now card is done, set the host to the same width */ 1149 struct ccb_trans_settings_mmc *cts; 1150 cts = &ccb->cts.proto_specific.mmc; 1151 ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1152 ccb->ccb_h.flags = CAM_DIR_NONE; 1153 ccb->ccb_h.retry_count = 0; 1154 ccb->ccb_h.timeout = 100; 1155 ccb->ccb_h.cbfcnp = NULL; 1156 cts->ios.bus_width = width; 1157 cts->ios_valid = MMC_BW; 1158 xpt_action(ccb); 1159 } 1160 1161 static inline const char 1162 *part_type(u_int type) 1163 { 1164 1165 switch (type) { 1166 case EXT_CSD_PART_CONFIG_ACC_RPMB: 1167 return ("RPMB"); 1168 case EXT_CSD_PART_CONFIG_ACC_DEFAULT: 1169 return ("default"); 1170 case EXT_CSD_PART_CONFIG_ACC_BOOT0: 1171 return ("boot0"); 1172 case EXT_CSD_PART_CONFIG_ACC_BOOT1: 1173 return ("boot1"); 1174 case EXT_CSD_PART_CONFIG_ACC_GP0: 1175 case EXT_CSD_PART_CONFIG_ACC_GP1: 1176 case EXT_CSD_PART_CONFIG_ACC_GP2: 1177 case EXT_CSD_PART_CONFIG_ACC_GP3: 1178 return ("general purpose"); 1179 default: 1180 return ("(unknown type)"); 1181 } 1182 } 1183 1184 static inline const char 1185 *bus_width_str(enum mmc_bus_width w) 1186 { 1187 1188 switch (w) { 1189 case bus_width_1: 1190 return ("1-bit"); 1191 case bus_width_4: 1192 return ("4-bit"); 1193 case bus_width_8: 1194 return ("8-bit"); 1195 } 1196 } 1197 1198 static uint32_t 1199 sdda_get_host_caps(struct cam_periph *periph, union ccb *ccb) 1200 { 1201 struct ccb_trans_settings_mmc *cts; 1202 1203 cts = &ccb->cts.proto_specific.mmc; 1204 1205 ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS; 1206 ccb->ccb_h.flags = CAM_DIR_NONE; 1207 ccb->ccb_h.retry_count = 0; 1208 ccb->ccb_h.timeout = 100; 1209 ccb->ccb_h.cbfcnp = NULL; 1210 xpt_action(ccb); 1211 1212 if (ccb->ccb_h.status != CAM_REQ_CMP) 1213 panic("Cannot get host caps"); 1214 return (cts->host_caps); 1215 } 1216 1217 static uint32_t 1218 sdda_get_max_data(struct cam_periph *periph, union ccb *ccb) 1219 { 1220 struct ccb_trans_settings_mmc *cts; 1221 1222 cts = &ccb->cts.proto_specific.mmc; 1223 memset(cts, 0, sizeof(struct ccb_trans_settings_mmc)); 1224 1225 ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS; 1226 ccb->ccb_h.flags = CAM_DIR_NONE; 1227 ccb->ccb_h.retry_count = 0; 1228 ccb->ccb_h.timeout = 100; 1229 ccb->ccb_h.cbfcnp = NULL; 1230 xpt_action(ccb); 1231 1232 if (ccb->ccb_h.status != CAM_REQ_CMP) 1233 panic("Cannot get host max data"); 1234 KASSERT(cts->host_max_data != 0, ("host_max_data == 0?!")); 1235 return (cts->host_max_data); 1236 } 1237 1238 static void 1239 sdda_start_init(void *context, union ccb *start_ccb) 1240 { 1241 struct cam_periph *periph = (struct cam_periph *)context; 1242 struct ccb_trans_settings_mmc *cts; 1243 uint32_t host_caps; 1244 uint32_t sec_count; 1245 int err; 1246 int host_f_max; 1247 1248 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init\n")); 1249 /* periph was held for us when this task was enqueued */ 1250 if ((periph->flags & CAM_PERIPH_INVALID) != 0) { 1251 cam_periph_release(periph); 1252 return; 1253 } 1254 1255 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1256 //struct ccb_mmcio *mmcio = &start_ccb->mmcio; 1257 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1258 struct cam_ed *device = periph->path->device; 1259 1260 if (mmcp->card_features & CARD_FEATURE_MMC) { 1261 mmc_decode_csd_mmc(mmcp->card_csd, &softc->csd); 1262 mmc_decode_cid_mmc(mmcp->card_cid, &softc->cid); 1263 if (mmc_get_spec_vers(periph) >= 4) { 1264 err = mmc_send_ext_csd(periph, start_ccb, 1265 (uint8_t *)&softc->raw_ext_csd, 1266 sizeof(softc->raw_ext_csd)); 1267 if (err != 0) { 1268 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1269 ("Cannot read EXT_CSD, err %d", err)); 1270 return; 1271 } 1272 } 1273 } else { 1274 mmc_decode_csd_sd(mmcp->card_csd, &softc->csd); 1275 mmc_decode_cid_sd(mmcp->card_cid, &softc->cid); 1276 } 1277 1278 softc->sector_count = softc->csd.capacity / 512; 1279 softc->mediasize = softc->csd.capacity; 1280 softc->cmd6_time = mmc_get_cmd6_timeout(periph); 1281 1282 /* MMC >= 4.x have EXT_CSD that has its own opinion about capacity */ 1283 if (mmc_get_spec_vers(periph) >= 4) { 1284 sec_count = softc->raw_ext_csd[EXT_CSD_SEC_CNT] + 1285 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) + 1286 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) + 1287 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1288 if (sec_count != 0) { 1289 softc->sector_count = sec_count; 1290 softc->mediasize = softc->sector_count * 512; 1291 /* FIXME: there should be a better name for this option...*/ 1292 mmcp->card_features |= CARD_FEATURE_SDHC; 1293 } 1294 1295 } 1296 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1297 ("Capacity: %"PRIu64", sectors: %"PRIu64"\n", 1298 softc->mediasize, 1299 softc->sector_count)); 1300 mmc_format_card_id_string(softc, mmcp); 1301 1302 /* Update info for CAM */ 1303 device->serial_num_len = strlen(softc->card_sn_string); 1304 device->serial_num = (u_int8_t *)malloc((device->serial_num_len + 1), 1305 M_CAMXPT, M_NOWAIT); 1306 strlcpy(device->serial_num, softc->card_sn_string, device->serial_num_len); 1307 1308 device->device_id_len = strlen(softc->card_id_string); 1309 device->device_id = (u_int8_t *)malloc((device->device_id_len + 1), 1310 M_CAMXPT, M_NOWAIT); 1311 strlcpy(device->device_id, softc->card_id_string, device->device_id_len); 1312 1313 strlcpy(mmcp->model, softc->card_id_string, sizeof(mmcp->model)); 1314 1315 /* Set the clock frequency that the card can handle */ 1316 cts = &start_ccb->cts.proto_specific.mmc; 1317 1318 /* First, get the host's max freq */ 1319 start_ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS; 1320 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1321 start_ccb->ccb_h.retry_count = 0; 1322 start_ccb->ccb_h.timeout = 100; 1323 start_ccb->ccb_h.cbfcnp = NULL; 1324 xpt_action(start_ccb); 1325 1326 if (start_ccb->ccb_h.status != CAM_REQ_CMP) 1327 panic("Cannot get max host freq"); 1328 host_f_max = cts->host_f_max; 1329 host_caps = cts->host_caps; 1330 if (cts->ios.bus_width != bus_width_1) 1331 panic("Bus width in ios is not 1-bit"); 1332 1333 /* Now check if the card supports High-speed */ 1334 softc->card_f_max = softc->csd.tran_speed; 1335 1336 if (host_caps & MMC_CAP_HSPEED) { 1337 /* Find out if the card supports High speed timing */ 1338 if (mmcp->card_features & CARD_FEATURE_SD20) { 1339 /* Get and decode SCR */ 1340 uint32_t rawscr[2]; 1341 uint8_t res[64]; 1342 if (mmc_app_get_scr(periph, start_ccb, rawscr)) { 1343 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Cannot get SCR\n")); 1344 goto finish_hs_tests; 1345 } 1346 mmc_app_decode_scr(rawscr, &softc->scr); 1347 1348 if ((softc->scr.sda_vsn >= 1) && (softc->csd.ccc & (1<<10))) { 1349 mmc_sd_switch(periph, start_ccb, SD_SWITCH_MODE_CHECK, 1350 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE, res); 1351 if (res[13] & 2) { 1352 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS\n")); 1353 softc->card_f_max = SD_HS_MAX; 1354 } 1355 1356 /* 1357 * We deselect then reselect the card here. Some cards 1358 * become unselected and timeout with the above two 1359 * commands, although the state tables / diagrams in the 1360 * standard suggest they go back to the transfer state. 1361 * Other cards don't become deselected, and if we 1362 * attempt to blindly re-select them, we get timeout 1363 * errors from some controllers. So we deselect then 1364 * reselect to handle all situations. 1365 */ 1366 mmc_select_card(periph, start_ccb, 0); 1367 mmc_select_card(periph, start_ccb, get_rca(periph)); 1368 } else { 1369 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Not trying the switch\n")); 1370 goto finish_hs_tests; 1371 } 1372 } 1373 1374 if (mmcp->card_features & CARD_FEATURE_MMC && mmc_get_spec_vers(periph) >= 4) { 1375 if (softc->raw_ext_csd[EXT_CSD_CARD_TYPE] 1376 & EXT_CSD_CARD_TYPE_HS_52) 1377 softc->card_f_max = MMC_TYPE_HS_52_MAX; 1378 else if (softc->raw_ext_csd[EXT_CSD_CARD_TYPE] 1379 & EXT_CSD_CARD_TYPE_HS_26) 1380 softc->card_f_max = MMC_TYPE_HS_26_MAX; 1381 } 1382 } 1383 int f_max; 1384 finish_hs_tests: 1385 f_max = min(host_f_max, softc->card_f_max); 1386 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Set SD freq to %d MHz (min out of host f=%d MHz and card f=%d MHz)\n", f_max / 1000000, host_f_max / 1000000, softc->card_f_max / 1000000)); 1387 1388 /* Enable high-speed timing on the card */ 1389 if (f_max > 25000000) { 1390 err = mmc_set_timing(periph, start_ccb, bus_timing_hs); 1391 if (err != MMC_ERR_NONE) { 1392 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("Cannot switch card to high-speed mode")); 1393 f_max = 25000000; 1394 } 1395 } 1396 /* Set frequency on the controller */ 1397 start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1398 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1399 start_ccb->ccb_h.retry_count = 0; 1400 start_ccb->ccb_h.timeout = 100; 1401 start_ccb->ccb_h.cbfcnp = NULL; 1402 cts->ios.clock = f_max; 1403 cts->ios_valid = MMC_CLK; 1404 xpt_action(start_ccb); 1405 1406 /* Set bus width */ 1407 enum mmc_bus_width desired_bus_width = bus_width_1; 1408 enum mmc_bus_width max_host_bus_width = 1409 (host_caps & MMC_CAP_8_BIT_DATA ? bus_width_8 : 1410 host_caps & MMC_CAP_4_BIT_DATA ? bus_width_4 : bus_width_1); 1411 enum mmc_bus_width max_card_bus_width = bus_width_1; 1412 if (mmcp->card_features & CARD_FEATURE_SD20 && 1413 softc->scr.bus_widths & SD_SCR_BUS_WIDTH_4) 1414 max_card_bus_width = bus_width_4; 1415 /* 1416 * Unlike SD, MMC cards don't have any information about supported bus width... 1417 * So we need to perform read/write test to find out the width. 1418 */ 1419 /* TODO: figure out bus width for MMC; use 8-bit for now (to test on BBB) */ 1420 if (mmcp->card_features & CARD_FEATURE_MMC) 1421 max_card_bus_width = bus_width_8; 1422 1423 desired_bus_width = min(max_host_bus_width, max_card_bus_width); 1424 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1425 ("Set bus width to %s (min of host %s and card %s)\n", 1426 bus_width_str(desired_bus_width), 1427 bus_width_str(max_host_bus_width), 1428 bus_width_str(max_card_bus_width))); 1429 sdda_set_bus_width(periph, start_ccb, desired_bus_width); 1430 1431 softc->state = SDDA_STATE_NORMAL; 1432 1433 /* MMC partitions support */ 1434 if (mmcp->card_features & CARD_FEATURE_MMC && mmc_get_spec_vers(periph) >= 4) { 1435 sdda_process_mmc_partitions(periph, start_ccb); 1436 } else if (mmcp->card_features & CARD_FEATURE_SD20) { 1437 /* For SD[HC] cards, just add one partition that is the whole card */ 1438 sdda_add_part(periph, 0, "sdda", 1439 periph->unit_number, 1440 mmc_get_media_size(periph), 1441 sdda_get_read_only(periph, start_ccb)); 1442 softc->part_curr = 0; 1443 } 1444 1445 xpt_announce_periph(periph, softc->card_id_string); 1446 /* 1447 * Add async callbacks for bus reset and bus device reset calls. 1448 * I don't bother checking if this fails as, in most cases, 1449 * the system will function just fine without them and the only 1450 * alternative would be to not attach the device on failure. 1451 */ 1452 xpt_register_async(AC_LOST_DEVICE | AC_GETDEV_CHANGED | 1453 AC_ADVINFO_CHANGED, sddaasync, periph, periph->path); 1454 } 1455 1456 static void 1457 sdda_add_part(struct cam_periph *periph, u_int type, const char *name, 1458 u_int cnt, off_t media_size, bool ro) 1459 { 1460 struct sdda_softc *sc = (struct sdda_softc *)periph->softc; 1461 struct sdda_part *part; 1462 struct ccb_pathinq cpi; 1463 1464 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1465 ("Partition type '%s', size %ju %s\n", 1466 part_type(type), 1467 media_size, 1468 ro ? "(read-only)" : "")); 1469 1470 part = sc->part[type] = malloc(sizeof(*part), M_DEVBUF, 1471 M_WAITOK | M_ZERO); 1472 1473 part->cnt = cnt; 1474 part->type = type; 1475 part->ro = ro; 1476 part->sc = sc; 1477 snprintf(part->name, sizeof(part->name), name, periph->unit_number); 1478 1479 /* 1480 * Due to the nature of RPMB partition it doesn't make much sense 1481 * to add it as a disk. It would be more appropriate to create a 1482 * userland tool to operate on the partition or leverage the existing 1483 * tools from sysutils/mmc-utils. 1484 */ 1485 if (type == EXT_CSD_PART_CONFIG_ACC_RPMB) { 1486 /* TODO: Create device, assign IOCTL handler */ 1487 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1488 ("Don't know what to do with RPMB partitions yet\n")); 1489 return; 1490 } 1491 1492 bioq_init(&part->bio_queue); 1493 1494 bzero(&cpi, sizeof(cpi)); 1495 xpt_setup_ccb(&cpi.ccb_h, periph->path, CAM_PRIORITY_NONE); 1496 cpi.ccb_h.func_code = XPT_PATH_INQ; 1497 xpt_action((union ccb *)&cpi); 1498 1499 /* 1500 * Register this media as a disk 1501 */ 1502 (void)cam_periph_hold(periph, PRIBIO); 1503 cam_periph_unlock(periph); 1504 1505 part->disk = disk_alloc(); 1506 part->disk->d_rotation_rate = DISK_RR_NON_ROTATING; 1507 part->disk->d_devstat = devstat_new_entry(part->name, 1508 cnt, 512, 1509 DEVSTAT_ALL_SUPPORTED, 1510 DEVSTAT_TYPE_DIRECT | XPORT_DEVSTAT_TYPE(cpi.transport), 1511 DEVSTAT_PRIORITY_DISK); 1512 1513 part->disk->d_open = sddaopen; 1514 part->disk->d_close = sddaclose; 1515 part->disk->d_strategy = sddastrategy; 1516 part->disk->d_getattr = sddagetattr; 1517 // sc->disk->d_dump = sddadump; 1518 part->disk->d_gone = sddadiskgonecb; 1519 part->disk->d_name = part->name; 1520 part->disk->d_drv1 = part; 1521 part->disk->d_maxsize = 1522 MIN(MAXPHYS, sdda_get_max_data(periph, 1523 (union ccb *)&cpi) * mmc_get_sector_size(periph)); 1524 part->disk->d_unit = cnt; 1525 part->disk->d_flags = 0; 1526 strlcpy(part->disk->d_descr, sc->card_id_string, 1527 MIN(sizeof(part->disk->d_descr), sizeof(sc->card_id_string))); 1528 strlcpy(part->disk->d_ident, sc->card_sn_string, 1529 MIN(sizeof(part->disk->d_ident), sizeof(sc->card_sn_string))); 1530 part->disk->d_hba_vendor = cpi.hba_vendor; 1531 part->disk->d_hba_device = cpi.hba_device; 1532 part->disk->d_hba_subvendor = cpi.hba_subvendor; 1533 part->disk->d_hba_subdevice = cpi.hba_subdevice; 1534 snprintf(part->disk->d_attachment, sizeof(part->disk->d_attachment), 1535 "%s%d", cpi.dev_name, cpi.unit_number); 1536 1537 part->disk->d_sectorsize = mmc_get_sector_size(periph); 1538 part->disk->d_mediasize = media_size; 1539 part->disk->d_stripesize = 0; 1540 part->disk->d_fwsectors = 0; 1541 part->disk->d_fwheads = 0; 1542 1543 /* 1544 * Acquire a reference to the periph before we register with GEOM. 1545 * We'll release this reference once GEOM calls us back (via 1546 * sddadiskgonecb()) telling us that our provider has been freed. 1547 */ 1548 if (cam_periph_acquire(periph) != 0) { 1549 xpt_print(periph->path, "%s: lost periph during " 1550 "registration!\n", __func__); 1551 cam_periph_lock(periph); 1552 return; 1553 } 1554 disk_create(part->disk, DISK_VERSION); 1555 cam_periph_lock(periph); 1556 cam_periph_unhold(periph); 1557 } 1558 1559 /* 1560 * For MMC cards, process EXT_CSD and add partitions that are supported by 1561 * this device. 1562 */ 1563 static void 1564 sdda_process_mmc_partitions(struct cam_periph *periph, union ccb *ccb) 1565 { 1566 struct sdda_softc *sc = (struct sdda_softc *)periph->softc; 1567 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1568 off_t erase_size, sector_size, size, wp_size; 1569 int i; 1570 const uint8_t *ext_csd; 1571 uint8_t rev; 1572 bool comp, ro; 1573 1574 ext_csd = sc->raw_ext_csd; 1575 1576 /* 1577 * Enhanced user data area and general purpose partitions are only 1578 * supported in revision 1.4 (EXT_CSD_REV == 4) and later, the RPMB 1579 * partition in revision 1.5 (MMC v4.41, EXT_CSD_REV == 5) and later. 1580 */ 1581 rev = ext_csd[EXT_CSD_REV]; 1582 1583 /* 1584 * Ignore user-creatable enhanced user data area and general purpose 1585 * partitions partitions as long as partitioning hasn't been finished. 1586 */ 1587 comp = (ext_csd[EXT_CSD_PART_SET] & EXT_CSD_PART_SET_COMPLETED) != 0; 1588 1589 /* 1590 * Add enhanced user data area slice, unless it spans the entirety of 1591 * the user data area. The enhanced area is of a multiple of high 1592 * capacity write protect groups ((ERASE_GRP_SIZE + HC_WP_GRP_SIZE) * 1593 * 512 KB) and its offset given in either sectors or bytes, depending 1594 * on whether it's a high capacity device or not. 1595 * NB: The slicer and its slices need to be registered before adding 1596 * the disk for the corresponding user data area as re-tasting is 1597 * racy. 1598 */ 1599 sector_size = mmc_get_sector_size(periph); 1600 size = ext_csd[EXT_CSD_ENH_SIZE_MULT] + 1601 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) + 1602 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16); 1603 if (rev >= 4 && comp == TRUE && size > 0 && 1604 (ext_csd[EXT_CSD_PART_SUPPORT] & 1605 EXT_CSD_PART_SUPPORT_ENH_ATTR_EN) != 0 && 1606 (ext_csd[EXT_CSD_PART_ATTR] & (EXT_CSD_PART_ATTR_ENH_USR)) != 0) { 1607 erase_size = ext_csd[EXT_CSD_ERASE_GRP_SIZE] * 1024 * 1608 MMC_SECTOR_SIZE; 1609 wp_size = ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1610 size *= erase_size * wp_size; 1611 if (size != mmc_get_media_size(periph) * sector_size) { 1612 sc->enh_size = size; 1613 sc->enh_base = (ext_csd[EXT_CSD_ENH_START_ADDR] + 1614 (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) + 1615 (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) + 1616 (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24)) * 1617 ((mmcp->card_features & CARD_FEATURE_SDHC) ? 1: MMC_SECTOR_SIZE); 1618 } else 1619 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1620 ("enhanced user data area spans entire device")); 1621 } 1622 1623 /* 1624 * Add default partition. This may be the only one or the user 1625 * data area in case partitions are supported. 1626 */ 1627 ro = sdda_get_read_only(periph, ccb); 1628 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_DEFAULT, "sdda", 1629 periph->unit_number, mmc_get_media_size(periph), ro); 1630 sc->part_curr = EXT_CSD_PART_CONFIG_ACC_DEFAULT; 1631 1632 if (mmc_get_spec_vers(periph) < 3) 1633 return; 1634 1635 /* Belatedly announce enhanced user data slice. */ 1636 if (sc->enh_size != 0) { 1637 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1638 ("enhanced user data area off 0x%jx size %ju bytes\n", 1639 sc->enh_base, sc->enh_size)); 1640 } 1641 1642 /* 1643 * Determine partition switch timeout (provided in units of 10 ms) 1644 * and ensure it's at least 300 ms as some eMMC chips lie. 1645 */ 1646 sc->part_time = max(ext_csd[EXT_CSD_PART_SWITCH_TO] * 10 * 1000, 1647 300 * 1000); 1648 1649 /* Add boot partitions, which are of a fixed multiple of 128 KB. */ 1650 size = ext_csd[EXT_CSD_BOOT_SIZE_MULT] * MMC_BOOT_RPMB_BLOCK_SIZE; 1651 if (size > 0 && (sdda_get_host_caps(periph, ccb) & MMC_CAP_BOOT_NOACC) == 0) { 1652 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_BOOT0, 1653 SDDA_FMT_BOOT, 0, size, 1654 ro | ((ext_csd[EXT_CSD_BOOT_WP_STATUS] & 1655 EXT_CSD_BOOT_WP_STATUS_BOOT0_MASK) != 0)); 1656 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_BOOT1, 1657 SDDA_FMT_BOOT, 1, size, 1658 ro | ((ext_csd[EXT_CSD_BOOT_WP_STATUS] & 1659 EXT_CSD_BOOT_WP_STATUS_BOOT1_MASK) != 0)); 1660 } 1661 1662 /* Add RPMB partition, which also is of a fixed multiple of 128 KB. */ 1663 size = ext_csd[EXT_CSD_RPMB_MULT] * MMC_BOOT_RPMB_BLOCK_SIZE; 1664 if (rev >= 5 && size > 0) 1665 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_RPMB, 1666 SDDA_FMT_RPMB, 0, size, ro); 1667 1668 if (rev <= 3 || comp == FALSE) 1669 return; 1670 1671 /* 1672 * Add general purpose partitions, which are of a multiple of high 1673 * capacity write protect groups, too. 1674 */ 1675 if ((ext_csd[EXT_CSD_PART_SUPPORT] & EXT_CSD_PART_SUPPORT_EN) != 0) { 1676 erase_size = ext_csd[EXT_CSD_ERASE_GRP_SIZE] * 1024 * 1677 MMC_SECTOR_SIZE; 1678 wp_size = ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1679 for (i = 0; i < MMC_PART_GP_MAX; i++) { 1680 size = ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3] + 1681 (ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3 + 1] << 8) + 1682 (ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3 + 2] << 16); 1683 if (size == 0) 1684 continue; 1685 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_GP0 + i, 1686 SDDA_FMT_GP, i, size * erase_size * wp_size, ro); 1687 } 1688 } 1689 } 1690 1691 /* 1692 * We cannot just call mmc_switch() since it will sleep, and we are in 1693 * GEOM context and cannot sleep. Instead, create an MMCIO request to switch 1694 * partitions and send it to h/w, and upon completion resume processing 1695 * the I/O queue. 1696 * This function cannot fail, instead check switch errors in sddadone(). 1697 */ 1698 static void 1699 sdda_init_switch_part(struct cam_periph *periph, union ccb *start_ccb, u_int part) { 1700 struct sdda_softc *sc = (struct sdda_softc *)periph->softc; 1701 uint8_t value; 1702 1703 sc->part_requested = part; 1704 1705 value = (sc->raw_ext_csd[EXT_CSD_PART_CONFIG] & 1706 ~EXT_CSD_PART_CONFIG_ACC_MASK) | part; 1707 1708 mmc_switch_fill_mmcio(start_ccb, EXT_CSD_CMD_SET_NORMAL, 1709 EXT_CSD_PART_CONFIG, value, sc->part_time); 1710 start_ccb->ccb_h.cbfcnp = sddadone; 1711 1712 sc->outstanding_cmds++; 1713 cam_periph_unlock(periph); 1714 xpt_action(start_ccb); 1715 cam_periph_lock(periph); 1716 } 1717 1718 /* Called with periph lock held! */ 1719 static void 1720 sddastart(struct cam_periph *periph, union ccb *start_ccb) 1721 { 1722 struct bio *bp; 1723 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1724 struct sdda_part *part; 1725 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1726 int part_index; 1727 1728 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastart\n")); 1729 1730 if (softc->state != SDDA_STATE_NORMAL) { 1731 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("device is not in SDDA_STATE_NORMAL yet\n")); 1732 xpt_release_ccb(start_ccb); 1733 return; 1734 } 1735 1736 /* Find partition that has outstanding commands. Prefer current partition. */ 1737 part = softc->part[softc->part_curr]; 1738 bp = bioq_first(&part->bio_queue); 1739 if (bp == NULL) { 1740 for (part_index = 0; part_index < MMC_PART_MAX; part_index++) { 1741 if ((part = softc->part[part_index]) != NULL && 1742 (bp = bioq_first(&softc->part[part_index]->bio_queue)) != NULL) 1743 break; 1744 } 1745 } 1746 if (bp == NULL) { 1747 xpt_release_ccb(start_ccb); 1748 return; 1749 } 1750 if (part_index != softc->part_curr) { 1751 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1752 ("Partition %d -> %d\n", softc->part_curr, part_index)); 1753 /* 1754 * According to section "6.2.2 Command restrictions" of the eMMC 1755 * specification v5.1, CMD19/CMD21 aren't allowed to be used with 1756 * RPMB partitions. So we pause re-tuning along with triggering 1757 * it up-front to decrease the likelihood of re-tuning becoming 1758 * necessary while accessing an RPMB partition. Consequently, an 1759 * RPMB partition should immediately be switched away from again 1760 * after an access in order to allow for re-tuning to take place 1761 * anew. 1762 */ 1763 /* TODO: pause retune if switching to RPMB partition */ 1764 softc->state = SDDA_STATE_PART_SWITCH; 1765 sdda_init_switch_part(periph, start_ccb, part_index); 1766 return; 1767 } 1768 1769 bioq_remove(&part->bio_queue, bp); 1770 1771 switch (bp->bio_cmd) { 1772 case BIO_WRITE: 1773 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_WRITE\n")); 1774 part->flags |= SDDA_FLAG_DIRTY; 1775 /* FALLTHROUGH */ 1776 case BIO_READ: 1777 { 1778 struct ccb_mmcio *mmcio; 1779 uint64_t blockno = bp->bio_pblkno; 1780 uint16_t count = bp->bio_bcount / 512; 1781 uint16_t opcode; 1782 1783 if (bp->bio_cmd == BIO_READ) 1784 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_READ\n")); 1785 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, 1786 ("Block %"PRIu64" cnt %u\n", blockno, count)); 1787 1788 /* Construct new MMC command */ 1789 if (bp->bio_cmd == BIO_READ) { 1790 if (count > 1) 1791 opcode = MMC_READ_MULTIPLE_BLOCK; 1792 else 1793 opcode = MMC_READ_SINGLE_BLOCK; 1794 } else { 1795 if (count > 1) 1796 opcode = MMC_WRITE_MULTIPLE_BLOCK; 1797 else 1798 opcode = MMC_WRITE_BLOCK; 1799 } 1800 1801 start_ccb->ccb_h.func_code = XPT_MMC_IO; 1802 start_ccb->ccb_h.flags = (bp->bio_cmd == BIO_READ ? CAM_DIR_IN : CAM_DIR_OUT); 1803 start_ccb->ccb_h.retry_count = 0; 1804 start_ccb->ccb_h.timeout = 15 * 1000; 1805 start_ccb->ccb_h.cbfcnp = sddadone; 1806 1807 mmcio = &start_ccb->mmcio; 1808 mmcio->cmd.opcode = opcode; 1809 mmcio->cmd.arg = blockno; 1810 if (!(mmcp->card_features & CARD_FEATURE_SDHC)) 1811 mmcio->cmd.arg <<= 9; 1812 1813 mmcio->cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1814 mmcio->cmd.data = softc->mmcdata; 1815 memset(mmcio->cmd.data, 0, sizeof(struct mmc_data)); 1816 mmcio->cmd.data->data = bp->bio_data; 1817 mmcio->cmd.data->len = 512 * count; 1818 mmcio->cmd.data->flags = (bp->bio_cmd == BIO_READ ? MMC_DATA_READ : MMC_DATA_WRITE); 1819 /* Direct h/w to issue CMD12 upon completion */ 1820 if (count > 1) { 1821 mmcio->cmd.data->flags |= MMC_DATA_MULTI; 1822 mmcio->stop.opcode = MMC_STOP_TRANSMISSION; 1823 mmcio->stop.flags = MMC_RSP_R1B | MMC_CMD_AC; 1824 mmcio->stop.arg = 0; 1825 } 1826 1827 break; 1828 } 1829 case BIO_FLUSH: 1830 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_FLUSH\n")); 1831 sddaschedule(periph); 1832 break; 1833 case BIO_DELETE: 1834 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_DELETE\n")); 1835 sddaschedule(periph); 1836 break; 1837 default: 1838 biofinish(bp, NULL, EOPNOTSUPP); 1839 xpt_release_ccb(start_ccb); 1840 return; 1841 } 1842 start_ccb->ccb_h.ccb_bp = bp; 1843 softc->outstanding_cmds++; 1844 softc->refcount++; 1845 cam_periph_unlock(periph); 1846 xpt_action(start_ccb); 1847 cam_periph_lock(periph); 1848 1849 /* May have more work to do, so ensure we stay scheduled */ 1850 sddaschedule(periph); 1851 } 1852 1853 static void 1854 sddadone(struct cam_periph *periph, union ccb *done_ccb) 1855 { 1856 struct bio *bp; 1857 struct sdda_softc *softc; 1858 struct ccb_mmcio *mmcio; 1859 struct cam_path *path; 1860 uint32_t card_status; 1861 int error = 0; 1862 1863 softc = (struct sdda_softc *)periph->softc; 1864 mmcio = &done_ccb->mmcio; 1865 path = done_ccb->ccb_h.path; 1866 1867 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddadone\n")); 1868 // cam_periph_lock(periph); 1869 if ((done_ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) { 1870 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("Error!!!\n")); 1871 if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0) 1872 cam_release_devq(path, 1873 /*relsim_flags*/0, 1874 /*reduction*/0, 1875 /*timeout*/0, 1876 /*getcount_only*/0); 1877 error = 5; /* EIO */ 1878 } else { 1879 if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0) 1880 panic("REQ_CMP with QFRZN"); 1881 error = 0; 1882 } 1883 1884 card_status = mmcio->cmd.resp[0]; 1885 CAM_DEBUG(path, CAM_DEBUG_TRACE, 1886 ("Card status: %08x\n", R1_STATUS(card_status))); 1887 CAM_DEBUG(path, CAM_DEBUG_TRACE, 1888 ("Current state: %d\n", R1_CURRENT_STATE(card_status))); 1889 1890 /* Process result of switching MMC partitions */ 1891 if (softc->state == SDDA_STATE_PART_SWITCH) { 1892 CAM_DEBUG(path, CAM_DEBUG_TRACE, 1893 ("Compteting partition switch to %d\n", softc->part_requested)); 1894 softc->outstanding_cmds--; 1895 /* Complete partition switch */ 1896 softc->state = SDDA_STATE_NORMAL; 1897 if (error != MMC_ERR_NONE) { 1898 /* TODO: Unpause retune if accessing RPMB */ 1899 xpt_release_ccb(done_ccb); 1900 xpt_schedule(periph, CAM_PRIORITY_NORMAL); 1901 return; 1902 } 1903 1904 softc->raw_ext_csd[EXT_CSD_PART_CONFIG] = 1905 (softc->raw_ext_csd[EXT_CSD_PART_CONFIG] & 1906 ~EXT_CSD_PART_CONFIG_ACC_MASK) | softc->part_requested; 1907 /* TODO: Unpause retune if accessing RPMB */ 1908 softc->part_curr = softc->part_requested; 1909 xpt_release_ccb(done_ccb); 1910 1911 /* Return to processing BIO requests */ 1912 xpt_schedule(periph, CAM_PRIORITY_NORMAL); 1913 return; 1914 } 1915 1916 bp = (struct bio *)done_ccb->ccb_h.ccb_bp; 1917 bp->bio_error = error; 1918 if (error != 0) { 1919 bp->bio_resid = bp->bio_bcount; 1920 bp->bio_flags |= BIO_ERROR; 1921 } else { 1922 /* XXX: How many bytes remaining? */ 1923 bp->bio_resid = 0; 1924 if (bp->bio_resid > 0) 1925 bp->bio_flags |= BIO_ERROR; 1926 } 1927 1928 softc->outstanding_cmds--; 1929 xpt_release_ccb(done_ccb); 1930 /* 1931 * Release the periph refcount taken in sddastart() for each CCB. 1932 */ 1933 KASSERT(softc->refcount >= 1, ("sddadone softc %p refcount %d", softc, softc->refcount)); 1934 softc->refcount--; 1935 biodone(bp); 1936 } 1937 1938 static int 1939 sddaerror(union ccb *ccb, u_int32_t cam_flags, u_int32_t sense_flags) 1940 { 1941 return(cam_periph_error(ccb, cam_flags, sense_flags)); 1942 } 1943 #endif /* _KERNEL */ 1944