1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 * 22 * $FreeBSD$ 23 * 24 */ 25 /* 26 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 27 * Use is subject to license terms. 28 */ 29 30 /* 31 * Copyright (c) 2011, Joyent, Inc. All rights reserved. 32 */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/types.h> 37 #include <sys/kernel.h> 38 #include <sys/malloc.h> 39 #include <sys/kmem.h> 40 #include <sys/smp.h> 41 #include <sys/dtrace_impl.h> 42 #include <sys/dtrace_bsd.h> 43 #include <machine/clock.h> 44 #include <machine/cpufunc.h> 45 #include <machine/frame.h> 46 #include <machine/psl.h> 47 #include <machine/trap.h> 48 #include <vm/pmap.h> 49 50 extern void dtrace_getnanotime(struct timespec *tsp); 51 52 int dtrace_invop(uintptr_t, struct trapframe *, uintptr_t); 53 54 typedef struct dtrace_invop_hdlr { 55 int (*dtih_func)(uintptr_t, struct trapframe *, uintptr_t); 56 struct dtrace_invop_hdlr *dtih_next; 57 } dtrace_invop_hdlr_t; 58 59 dtrace_invop_hdlr_t *dtrace_invop_hdlr; 60 61 int 62 dtrace_invop(uintptr_t addr, struct trapframe *frame, uintptr_t eax) 63 { 64 dtrace_invop_hdlr_t *hdlr; 65 int rval; 66 67 for (hdlr = dtrace_invop_hdlr; hdlr != NULL; hdlr = hdlr->dtih_next) 68 if ((rval = hdlr->dtih_func(addr, frame, eax)) != 0) 69 return (rval); 70 71 return (0); 72 } 73 74 void 75 dtrace_invop_add(int (*func)(uintptr_t, struct trapframe *, uintptr_t)) 76 { 77 dtrace_invop_hdlr_t *hdlr; 78 79 hdlr = kmem_alloc(sizeof (dtrace_invop_hdlr_t), KM_SLEEP); 80 hdlr->dtih_func = func; 81 hdlr->dtih_next = dtrace_invop_hdlr; 82 dtrace_invop_hdlr = hdlr; 83 } 84 85 void 86 dtrace_invop_remove(int (*func)(uintptr_t, struct trapframe *, uintptr_t)) 87 { 88 dtrace_invop_hdlr_t *hdlr = dtrace_invop_hdlr, *prev = NULL; 89 90 for (;;) { 91 if (hdlr == NULL) 92 panic("attempt to remove non-existent invop handler"); 93 94 if (hdlr->dtih_func == func) 95 break; 96 97 prev = hdlr; 98 hdlr = hdlr->dtih_next; 99 } 100 101 if (prev == NULL) { 102 ASSERT(dtrace_invop_hdlr == hdlr); 103 dtrace_invop_hdlr = hdlr->dtih_next; 104 } else { 105 ASSERT(dtrace_invop_hdlr != hdlr); 106 prev->dtih_next = hdlr->dtih_next; 107 } 108 109 kmem_free(hdlr, 0); 110 } 111 112 /*ARGSUSED*/ 113 void 114 dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit)) 115 { 116 (*func)(0, (uintptr_t) addr_PTmap); 117 } 118 119 void 120 dtrace_xcall(processorid_t cpu, dtrace_xcall_t func, void *arg) 121 { 122 cpuset_t cpus; 123 124 if (cpu == DTRACE_CPUALL) 125 cpus = all_cpus; 126 else 127 CPU_SETOF(cpu, &cpus); 128 129 smp_rendezvous_cpus(cpus, smp_no_rendezvous_barrier, func, 130 smp_no_rendezvous_barrier, arg); 131 } 132 133 static void 134 dtrace_sync_func(void) 135 { 136 } 137 138 void 139 dtrace_sync(void) 140 { 141 dtrace_xcall(DTRACE_CPUALL, (dtrace_xcall_t)dtrace_sync_func, NULL); 142 } 143 144 #ifdef notyet 145 void 146 dtrace_safe_synchronous_signal(void) 147 { 148 kthread_t *t = curthread; 149 struct regs *rp = lwptoregs(ttolwp(t)); 150 size_t isz = t->t_dtrace_npc - t->t_dtrace_pc; 151 152 ASSERT(t->t_dtrace_on); 153 154 /* 155 * If we're not in the range of scratch addresses, we're not actually 156 * tracing user instructions so turn off the flags. If the instruction 157 * we copied out caused a synchonous trap, reset the pc back to its 158 * original value and turn off the flags. 159 */ 160 if (rp->r_pc < t->t_dtrace_scrpc || 161 rp->r_pc > t->t_dtrace_astpc + isz) { 162 t->t_dtrace_ft = 0; 163 } else if (rp->r_pc == t->t_dtrace_scrpc || 164 rp->r_pc == t->t_dtrace_astpc) { 165 rp->r_pc = t->t_dtrace_pc; 166 t->t_dtrace_ft = 0; 167 } 168 } 169 170 int 171 dtrace_safe_defer_signal(void) 172 { 173 kthread_t *t = curthread; 174 struct regs *rp = lwptoregs(ttolwp(t)); 175 size_t isz = t->t_dtrace_npc - t->t_dtrace_pc; 176 177 ASSERT(t->t_dtrace_on); 178 179 /* 180 * If we're not in the range of scratch addresses, we're not actually 181 * tracing user instructions so turn off the flags. 182 */ 183 if (rp->r_pc < t->t_dtrace_scrpc || 184 rp->r_pc > t->t_dtrace_astpc + isz) { 185 t->t_dtrace_ft = 0; 186 return (0); 187 } 188 189 /* 190 * If we have executed the original instruction, but we have performed 191 * neither the jmp back to t->t_dtrace_npc nor the clean up of any 192 * registers used to emulate %rip-relative instructions in 64-bit mode, 193 * we'll save ourselves some effort by doing that here and taking the 194 * signal right away. We detect this condition by seeing if the program 195 * counter is the range [scrpc + isz, astpc). 196 */ 197 if (rp->r_pc >= t->t_dtrace_scrpc + isz && 198 rp->r_pc < t->t_dtrace_astpc) { 199 #ifdef __amd64 200 /* 201 * If there is a scratch register and we're on the 202 * instruction immediately after the modified instruction, 203 * restore the value of that scratch register. 204 */ 205 if (t->t_dtrace_reg != 0 && 206 rp->r_pc == t->t_dtrace_scrpc + isz) { 207 switch (t->t_dtrace_reg) { 208 case REG_RAX: 209 rp->r_rax = t->t_dtrace_regv; 210 break; 211 case REG_RCX: 212 rp->r_rcx = t->t_dtrace_regv; 213 break; 214 case REG_R8: 215 rp->r_r8 = t->t_dtrace_regv; 216 break; 217 case REG_R9: 218 rp->r_r9 = t->t_dtrace_regv; 219 break; 220 } 221 } 222 #endif 223 rp->r_pc = t->t_dtrace_npc; 224 t->t_dtrace_ft = 0; 225 return (0); 226 } 227 228 /* 229 * Otherwise, make sure we'll return to the kernel after executing 230 * the copied out instruction and defer the signal. 231 */ 232 if (!t->t_dtrace_step) { 233 ASSERT(rp->r_pc < t->t_dtrace_astpc); 234 rp->r_pc += t->t_dtrace_astpc - t->t_dtrace_scrpc; 235 t->t_dtrace_step = 1; 236 } 237 238 t->t_dtrace_ast = 1; 239 240 return (1); 241 } 242 #endif 243 244 static int64_t tgt_cpu_tsc; 245 static int64_t hst_cpu_tsc; 246 static int64_t tsc_skew[MAXCPU]; 247 static uint64_t nsec_scale; 248 249 /* See below for the explanation of this macro. */ 250 #define SCALE_SHIFT 28 251 252 static void 253 dtrace_gethrtime_init_cpu(void *arg) 254 { 255 uintptr_t cpu = (uintptr_t) arg; 256 257 if (cpu == curcpu) 258 tgt_cpu_tsc = rdtsc(); 259 else 260 hst_cpu_tsc = rdtsc(); 261 } 262 263 #ifdef EARLY_AP_STARTUP 264 static void 265 dtrace_gethrtime_init(void *arg) 266 { 267 struct pcpu *pc; 268 uint64_t tsc_f; 269 cpuset_t map; 270 int i; 271 #else 272 /* 273 * Get the frequency and scale factor as early as possible so that they can be 274 * used for boot-time tracing. 275 */ 276 static void 277 dtrace_gethrtime_init_early(void *arg) 278 { 279 uint64_t tsc_f; 280 #endif 281 282 /* 283 * Get TSC frequency known at this moment. 284 * This should be constant if TSC is invariant. 285 * Otherwise tick->time conversion will be inaccurate, but 286 * will preserve monotonic property of TSC. 287 */ 288 tsc_f = atomic_load_acq_64(&tsc_freq); 289 290 /* 291 * The following line checks that nsec_scale calculated below 292 * doesn't overflow 32-bit unsigned integer, so that it can multiply 293 * another 32-bit integer without overflowing 64-bit. 294 * Thus minimum supported TSC frequency is 62.5MHz. 295 */ 296 KASSERT(tsc_f > (NANOSEC >> (32 - SCALE_SHIFT)), 297 ("TSC frequency is too low")); 298 299 /* 300 * We scale up NANOSEC/tsc_f ratio to preserve as much precision 301 * as possible. 302 * 2^28 factor was chosen quite arbitrarily from practical 303 * considerations: 304 * - it supports TSC frequencies as low as 62.5MHz (see above); 305 * - it provides quite good precision (e < 0.01%) up to THz 306 * (terahertz) values; 307 */ 308 nsec_scale = ((uint64_t)NANOSEC << SCALE_SHIFT) / tsc_f; 309 #ifndef EARLY_AP_STARTUP 310 } 311 SYSINIT(dtrace_gethrtime_init_early, SI_SUB_CPU, SI_ORDER_ANY, 312 dtrace_gethrtime_init_early, NULL); 313 314 static void 315 dtrace_gethrtime_init(void *arg) 316 { 317 struct pcpu *pc; 318 cpuset_t map; 319 int i; 320 #endif 321 322 /* The current CPU is the reference one. */ 323 sched_pin(); 324 tsc_skew[curcpu] = 0; 325 CPU_FOREACH(i) { 326 if (i == curcpu) 327 continue; 328 329 pc = pcpu_find(i); 330 CPU_SETOF(PCPU_GET(cpuid), &map); 331 CPU_SET(pc->pc_cpuid, &map); 332 333 smp_rendezvous_cpus(map, NULL, 334 dtrace_gethrtime_init_cpu, 335 smp_no_rendezvous_barrier, (void *)(uintptr_t) i); 336 337 tsc_skew[i] = tgt_cpu_tsc - hst_cpu_tsc; 338 } 339 sched_unpin(); 340 } 341 #ifdef EARLY_AP_STARTUP 342 SYSINIT(dtrace_gethrtime_init, SI_SUB_DTRACE, SI_ORDER_ANY, 343 dtrace_gethrtime_init, NULL); 344 #else 345 SYSINIT(dtrace_gethrtime_init, SI_SUB_SMP, SI_ORDER_ANY, dtrace_gethrtime_init, 346 NULL); 347 #endif 348 349 /* 350 * DTrace needs a high resolution time function which can 351 * be called from a probe context and guaranteed not to have 352 * instrumented with probes itself. 353 * 354 * Returns nanoseconds since boot. 355 */ 356 uint64_t 357 dtrace_gethrtime(void) 358 { 359 uint64_t tsc; 360 uint32_t lo, hi; 361 register_t rflags; 362 363 /* 364 * We split TSC value into lower and higher 32-bit halves and separately 365 * scale them with nsec_scale, then we scale them down by 2^28 366 * (see nsec_scale calculations) taking into account 32-bit shift of 367 * the higher half and finally add. 368 */ 369 rflags = intr_disable(); 370 tsc = rdtsc() - tsc_skew[curcpu]; 371 intr_restore(rflags); 372 373 lo = tsc; 374 hi = tsc >> 32; 375 return (((lo * nsec_scale) >> SCALE_SHIFT) + 376 ((hi * nsec_scale) << (32 - SCALE_SHIFT))); 377 } 378 379 uint64_t 380 dtrace_gethrestime(void) 381 { 382 struct timespec current_time; 383 384 dtrace_getnanotime(¤t_time); 385 386 return (current_time.tv_sec * 1000000000ULL + current_time.tv_nsec); 387 } 388 389 /* Function to handle DTrace traps during probes. See amd64/amd64/trap.c. */ 390 int 391 dtrace_trap(struct trapframe *frame, u_int type) 392 { 393 uint16_t nofault; 394 395 /* 396 * A trap can occur while DTrace executes a probe. Before 397 * executing the probe, DTrace blocks re-scheduling and sets 398 * a flag in its per-cpu flags to indicate that it doesn't 399 * want to fault. On returning from the probe, the no-fault 400 * flag is cleared and finally re-scheduling is enabled. 401 * 402 * Check if DTrace has enabled 'no-fault' mode: 403 */ 404 sched_pin(); 405 nofault = cpu_core[curcpu].cpuc_dtrace_flags & CPU_DTRACE_NOFAULT; 406 sched_unpin(); 407 if (nofault) { 408 KASSERT((read_rflags() & PSL_I) == 0, ("interrupts enabled")); 409 410 /* 411 * There are only a couple of trap types that are expected. 412 * All the rest will be handled in the usual way. 413 */ 414 switch (type) { 415 /* General protection fault. */ 416 case T_PROTFLT: 417 /* Flag an illegal operation. */ 418 cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_ILLOP; 419 420 /* 421 * Offset the instruction pointer to the instruction 422 * following the one causing the fault. 423 */ 424 frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip); 425 return (1); 426 /* Page fault. */ 427 case T_PAGEFLT: 428 /* Flag a bad address. */ 429 cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_BADADDR; 430 cpu_core[curcpu].cpuc_dtrace_illval = frame->tf_addr; 431 432 /* 433 * Offset the instruction pointer to the instruction 434 * following the one causing the fault. 435 */ 436 frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip); 437 return (1); 438 default: 439 /* Handle all other traps in the usual way. */ 440 break; 441 } 442 } 443 444 /* Handle the trap in the usual way. */ 445 return (0); 446 } 447