xref: /freebsd/sys/cddl/dev/dtrace/riscv/dtrace_asm.S (revision abd87254) 
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License").  You may not use this file except in compliance
7 * with the License.
8 *
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
13 *
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 *
22 * Portions Copyright 2016 Ruslan Bukin <br@bsdpad.com>
23 */
24/*
25 * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
26 * Use is subject to license terms.
27 */
28
29#define _ASM
30#define _LOCORE
31
32#include <sys/cpuvar_defs.h>
33#include <sys/dtrace.h>
34
35#include <machine/riscvreg.h>
36#include <machine/asm.h>
37
38#include "assym.inc"
39
40/*
41void dtrace_membar_producer(void)
42*/
43ENTRY(dtrace_membar_producer)
44	RET
45END(dtrace_membar_producer)
46
47/*
48void dtrace_membar_consumer(void)
49*/
50ENTRY(dtrace_membar_consumer)
51	RET
52END(dtrace_membar_consumer)
53
54/*
55dtrace_icookie_t dtrace_interrupt_disable(void)
56*/
57ENTRY(dtrace_interrupt_disable)
58	csrrci	a0, sstatus, (SSTATUS_SIE)
59	andi	a0, a0, (SSTATUS_SIE)
60	RET
61END(dtrace_interrupt_disable)
62
63/*
64void dtrace_interrupt_enable(dtrace_icookie_t cookie)
65*/
66ENTRY(dtrace_interrupt_enable)
67	csrs	sstatus, a0
68	RET
69END(dtrace_interrupt_enable)
70/*
71uint8_t
72dtrace_fuword8_nocheck(void *addr)
73*/
74ENTRY(dtrace_fuword8_nocheck)
75	ENTER_USER_ACCESS(t0)
76	lb	a0, 0(a0)
77	EXIT_USER_ACCESS(t0)
78	RET
79END(dtrace_fuword8_nocheck)
80
81/*
82uint16_t
83dtrace_fuword16_nocheck(void *addr)
84*/
85ENTRY(dtrace_fuword16_nocheck)
86	ENTER_USER_ACCESS(t0)
87	lh	a0, 0(a0)
88	EXIT_USER_ACCESS(t0)
89	RET
90END(dtrace_fuword16_nocheck)
91
92/*
93uint32_t
94dtrace_fuword32_nocheck(void *addr)
95*/
96ENTRY(dtrace_fuword32_nocheck)
97	ENTER_USER_ACCESS(t0)
98	lw	a0, 0(a0)
99	EXIT_USER_ACCESS(t0)
100	RET
101END(dtrace_fuword32_nocheck)
102
103/*
104uint64_t
105dtrace_fuword64_nocheck(void *addr)
106*/
107ENTRY(dtrace_fuword64_nocheck)
108	ENTER_USER_ACCESS(t0)
109	ld	a0, 0(a0)
110	EXIT_USER_ACCESS(t0)
111	RET
112END(dtrace_fuword64_nocheck)
113
114/*
115void
116dtrace_copy(uintptr_t uaddr, uintptr_t kaddr, size_t size)
117*/
118ENTRY(dtrace_copy)
119	beqz	a2, 2f		/* If len == 0 then skip loop */
120	ENTER_USER_ACCESS(t0)
1211:
122	lb	a4, 0(a0)	/* Load from uaddr */
123	addi	a0, a0, 1
124	sb	a4, 0(a1)	/* Store in kaddr */
125	addi	a1, a1, 1
126	addi	a2, a2, -1	/* len-- */
127	bnez	a2, 1b
128	EXIT_USER_ACCESS(t0)
1292:
130	RET
131END(dtrace_copy)
132
133/*
134void
135dtrace_copystr(uintptr_t uaddr, uintptr_t kaddr, size_t size,
136    volatile uint16_t *flags)
137XXX: Check for flags?
138*/
139ENTRY(dtrace_copystr)
140	beqz	a2, 3f		/* If len == 0 then skip loop */
141	ENTER_USER_ACCESS(t0)
1421:
143	lb	a4, 0(a0)	/* Load from uaddr */
144	addi	a0, a0, 1
145	sb	a4, 0(a1)	/* Store in kaddr */
146	addi	a1, a1, 1
147	beqz	a4, 2f		/* If == 0 then break */
148	addi	a2, a2, -1	/* len-- */
149	bnez	a2, 1b
1502:
151	EXIT_USER_ACCESS(t0)
1523:
153	RET
154END(dtrace_copystr)
155
156/*
157uintptr_t
158dtrace_caller(int aframes)
159*/
160ENTRY(dtrace_caller)
161	li	a0, -1
162	RET
163END(dtrace_caller)
164
165/*
166uint32_t
167dtrace_cas32(uint32_t *target, uint32_t cmp, uint32_t new)
168*/
169ENTRY(dtrace_cas32)
1701:	lr.w	a3, 0(a0)	/* Load target */
171	bne	a3, a1, 2f	/* *target != cmp ? return */
172	sc.w	a4, a2, 0(a0)	/* Store new to target */
173	bnez	a4, 1b		/* Try again if store not succeed */
1742:	mv	a0, a3		/* Return the value loaded from target */
175	RET
176END(dtrace_cas32)
177
178/*
179void *
180dtrace_casptr(volatile void *target, volatile void *cmp, volatile void *new)
181*/
182ENTRY(dtrace_casptr)
1831:	lr.d	a3, 0(a0)	/* Load target */
184	bne	a3, a1, 2f	/* *target != cmp ? return */
185	sc.d	a4, a2, 0(a0)	/* Store new to target */
186	bnez	a4, 1b		/* Try again if store not succeed */
1872:	mv	a0, a3		/* Return the value loaded from target */
188	RET
189END(dtrace_casptr)
190