1a159c266SJung-uk Kim /*******************************************************************************
2a159c266SJung-uk Kim *
3a159c266SJung-uk Kim * Module Name: hwregs - Read/write access functions for the various ACPI
4a159c266SJung-uk Kim * control and status registers.
5a159c266SJung-uk Kim *
6a159c266SJung-uk Kim ******************************************************************************/
7a159c266SJung-uk Kim
80d84335fSJung-uk Kim /******************************************************************************
90d84335fSJung-uk Kim *
100d84335fSJung-uk Kim * 1. Copyright Notice
110d84335fSJung-uk Kim *
12722b1667SJung-uk Kim * Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp.
13a159c266SJung-uk Kim * All rights reserved.
14a159c266SJung-uk Kim *
150d84335fSJung-uk Kim * 2. License
160d84335fSJung-uk Kim *
170d84335fSJung-uk Kim * 2.1. This is your license from Intel Corp. under its intellectual property
180d84335fSJung-uk Kim * rights. You may have additional license terms from the party that provided
190d84335fSJung-uk Kim * you this software, covering your right to use that party's intellectual
200d84335fSJung-uk Kim * property rights.
210d84335fSJung-uk Kim *
220d84335fSJung-uk Kim * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
230d84335fSJung-uk Kim * copy of the source code appearing in this file ("Covered Code") an
240d84335fSJung-uk Kim * irrevocable, perpetual, worldwide license under Intel's copyrights in the
250d84335fSJung-uk Kim * base code distributed originally by Intel ("Original Intel Code") to copy,
260d84335fSJung-uk Kim * make derivatives, distribute, use and display any portion of the Covered
270d84335fSJung-uk Kim * Code in any form, with the right to sublicense such rights; and
280d84335fSJung-uk Kim *
290d84335fSJung-uk Kim * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
300d84335fSJung-uk Kim * license (with the right to sublicense), under only those claims of Intel
310d84335fSJung-uk Kim * patents that are infringed by the Original Intel Code, to make, use, sell,
320d84335fSJung-uk Kim * offer to sell, and import the Covered Code and derivative works thereof
330d84335fSJung-uk Kim * solely to the minimum extent necessary to exercise the above copyright
340d84335fSJung-uk Kim * license, and in no event shall the patent license extend to any additions
350d84335fSJung-uk Kim * to or modifications of the Original Intel Code. No other license or right
360d84335fSJung-uk Kim * is granted directly or by implication, estoppel or otherwise;
370d84335fSJung-uk Kim *
380d84335fSJung-uk Kim * The above copyright and patent license is granted only if the following
390d84335fSJung-uk Kim * conditions are met:
400d84335fSJung-uk Kim *
410d84335fSJung-uk Kim * 3. Conditions
420d84335fSJung-uk Kim *
430d84335fSJung-uk Kim * 3.1. Redistribution of Source with Rights to Further Distribute Source.
440d84335fSJung-uk Kim * Redistribution of source code of any substantial portion of the Covered
450d84335fSJung-uk Kim * Code or modification with rights to further distribute source must include
460d84335fSJung-uk Kim * the above Copyright Notice, the above License, this list of Conditions,
470d84335fSJung-uk Kim * and the following Disclaimer and Export Compliance provision. In addition,
480d84335fSJung-uk Kim * Licensee must cause all Covered Code to which Licensee contributes to
490d84335fSJung-uk Kim * contain a file documenting the changes Licensee made to create that Covered
500d84335fSJung-uk Kim * Code and the date of any change. Licensee must include in that file the
510d84335fSJung-uk Kim * documentation of any changes made by any predecessor Licensee. Licensee
520d84335fSJung-uk Kim * must include a prominent statement that the modification is derived,
530d84335fSJung-uk Kim * directly or indirectly, from Original Intel Code.
540d84335fSJung-uk Kim *
550d84335fSJung-uk Kim * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
560d84335fSJung-uk Kim * Redistribution of source code of any substantial portion of the Covered
570d84335fSJung-uk Kim * Code or modification without rights to further distribute source must
580d84335fSJung-uk Kim * include the following Disclaimer and Export Compliance provision in the
590d84335fSJung-uk Kim * documentation and/or other materials provided with distribution. In
600d84335fSJung-uk Kim * addition, Licensee may not authorize further sublicense of source of any
610d84335fSJung-uk Kim * portion of the Covered Code, and must include terms to the effect that the
620d84335fSJung-uk Kim * license from Licensee to its licensee is limited to the intellectual
630d84335fSJung-uk Kim * property embodied in the software Licensee provides to its licensee, and
640d84335fSJung-uk Kim * not to intellectual property embodied in modifications its licensee may
650d84335fSJung-uk Kim * make.
660d84335fSJung-uk Kim *
670d84335fSJung-uk Kim * 3.3. Redistribution of Executable. Redistribution in executable form of any
680d84335fSJung-uk Kim * substantial portion of the Covered Code or modification must reproduce the
690d84335fSJung-uk Kim * above Copyright Notice, and the following Disclaimer and Export Compliance
700d84335fSJung-uk Kim * provision in the documentation and/or other materials provided with the
710d84335fSJung-uk Kim * distribution.
720d84335fSJung-uk Kim *
730d84335fSJung-uk Kim * 3.4. Intel retains all right, title, and interest in and to the Original
740d84335fSJung-uk Kim * Intel Code.
750d84335fSJung-uk Kim *
760d84335fSJung-uk Kim * 3.5. Neither the name Intel nor any other trademark owned or controlled by
770d84335fSJung-uk Kim * Intel shall be used in advertising or otherwise to promote the sale, use or
780d84335fSJung-uk Kim * other dealings in products derived from or relating to the Covered Code
790d84335fSJung-uk Kim * without prior written authorization from Intel.
800d84335fSJung-uk Kim *
810d84335fSJung-uk Kim * 4. Disclaimer and Export Compliance
820d84335fSJung-uk Kim *
830d84335fSJung-uk Kim * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
840d84335fSJung-uk Kim * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
850d84335fSJung-uk Kim * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
860d84335fSJung-uk Kim * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
870d84335fSJung-uk Kim * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
880d84335fSJung-uk Kim * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
890d84335fSJung-uk Kim * PARTICULAR PURPOSE.
900d84335fSJung-uk Kim *
910d84335fSJung-uk Kim * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
920d84335fSJung-uk Kim * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
930d84335fSJung-uk Kim * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
940d84335fSJung-uk Kim * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
950d84335fSJung-uk Kim * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
960d84335fSJung-uk Kim * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
970d84335fSJung-uk Kim * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
980d84335fSJung-uk Kim * LIMITED REMEDY.
990d84335fSJung-uk Kim *
1000d84335fSJung-uk Kim * 4.3. Licensee shall not export, either directly or indirectly, any of this
1010d84335fSJung-uk Kim * software or system incorporating such software without first obtaining any
1020d84335fSJung-uk Kim * required license or other approval from the U. S. Department of Commerce or
1030d84335fSJung-uk Kim * any other agency or department of the United States Government. In the
1040d84335fSJung-uk Kim * event Licensee exports any such software from the United States or
1050d84335fSJung-uk Kim * re-exports any such software from a foreign destination, Licensee shall
1060d84335fSJung-uk Kim * ensure that the distribution and export/re-export of the software is in
1070d84335fSJung-uk Kim * compliance with all laws, regulations, orders, or other restrictions of the
1080d84335fSJung-uk Kim * U.S. Export Administration Regulations. Licensee agrees that neither it nor
1090d84335fSJung-uk Kim * any of its subsidiaries will export/re-export any technical data, process,
1100d84335fSJung-uk Kim * software, or service, directly or indirectly, to any country for which the
1110d84335fSJung-uk Kim * United States government or any agency thereof requires an export license,
1120d84335fSJung-uk Kim * other governmental approval, or letter of assurance, without first obtaining
1130d84335fSJung-uk Kim * such license, approval or letter.
1140d84335fSJung-uk Kim *
1150d84335fSJung-uk Kim *****************************************************************************
1160d84335fSJung-uk Kim *
1170d84335fSJung-uk Kim * Alternatively, you may choose to be licensed under the terms of the
1180d84335fSJung-uk Kim * following license:
1190d84335fSJung-uk Kim *
120a159c266SJung-uk Kim * Redistribution and use in source and binary forms, with or without
121a159c266SJung-uk Kim * modification, are permitted provided that the following conditions
122a159c266SJung-uk Kim * are met:
123a159c266SJung-uk Kim * 1. Redistributions of source code must retain the above copyright
124a159c266SJung-uk Kim * notice, this list of conditions, and the following disclaimer,
125a159c266SJung-uk Kim * without modification.
126a159c266SJung-uk Kim * 2. Redistributions in binary form must reproduce at minimum a disclaimer
127a159c266SJung-uk Kim * substantially similar to the "NO WARRANTY" disclaimer below
128a159c266SJung-uk Kim * ("Disclaimer") and any redistribution must be conditioned upon
129a159c266SJung-uk Kim * including a substantially similar Disclaimer requirement for further
130a159c266SJung-uk Kim * binary redistribution.
131a159c266SJung-uk Kim * 3. Neither the names of the above-listed copyright holders nor the names
132a159c266SJung-uk Kim * of any contributors may be used to endorse or promote products derived
133a159c266SJung-uk Kim * from this software without specific prior written permission.
134a159c266SJung-uk Kim *
1350d84335fSJung-uk Kim * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1360d84335fSJung-uk Kim * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1370d84335fSJung-uk Kim * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
1380d84335fSJung-uk Kim * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
1390d84335fSJung-uk Kim * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
1400d84335fSJung-uk Kim * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
1410d84335fSJung-uk Kim * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
1420d84335fSJung-uk Kim * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
1430d84335fSJung-uk Kim * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
1440d84335fSJung-uk Kim * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
1450d84335fSJung-uk Kim * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1460d84335fSJung-uk Kim *
1470d84335fSJung-uk Kim * Alternatively, you may choose to be licensed under the terms of the
148a159c266SJung-uk Kim * GNU General Public License ("GPL") version 2 as published by the Free
149a159c266SJung-uk Kim * Software Foundation.
150a159c266SJung-uk Kim *
1510d84335fSJung-uk Kim *****************************************************************************/
152a159c266SJung-uk Kim
153a159c266SJung-uk Kim #include <contrib/dev/acpica/include/acpi.h>
154a159c266SJung-uk Kim #include <contrib/dev/acpica/include/accommon.h>
155a159c266SJung-uk Kim #include <contrib/dev/acpica/include/acevents.h>
156a159c266SJung-uk Kim
157a159c266SJung-uk Kim #define _COMPONENT ACPI_HARDWARE
158a159c266SJung-uk Kim ACPI_MODULE_NAME ("hwregs")
159a159c266SJung-uk Kim
160a159c266SJung-uk Kim
161a159c266SJung-uk Kim #if (!ACPI_REDUCED_HARDWARE)
162a159c266SJung-uk Kim
163a159c266SJung-uk Kim /* Local Prototypes */
164a159c266SJung-uk Kim
16528482948SJung-uk Kim static UINT8
16628482948SJung-uk Kim AcpiHwGetAccessBitWidth (
16728482948SJung-uk Kim UINT64 Address,
16828482948SJung-uk Kim ACPI_GENERIC_ADDRESS *Reg,
16928482948SJung-uk Kim UINT8 MaxBitWidth);
17028482948SJung-uk Kim
171a159c266SJung-uk Kim static ACPI_STATUS
172a159c266SJung-uk Kim AcpiHwReadMultiple (
173a159c266SJung-uk Kim UINT32 *Value,
174a159c266SJung-uk Kim ACPI_GENERIC_ADDRESS *RegisterA,
175a159c266SJung-uk Kim ACPI_GENERIC_ADDRESS *RegisterB);
176a159c266SJung-uk Kim
177a159c266SJung-uk Kim static ACPI_STATUS
178a159c266SJung-uk Kim AcpiHwWriteMultiple (
179a159c266SJung-uk Kim UINT32 Value,
180a159c266SJung-uk Kim ACPI_GENERIC_ADDRESS *RegisterA,
181a159c266SJung-uk Kim ACPI_GENERIC_ADDRESS *RegisterB);
182a159c266SJung-uk Kim
183a159c266SJung-uk Kim #endif /* !ACPI_REDUCED_HARDWARE */
184a159c266SJung-uk Kim
185f8146b88SJung-uk Kim
186f8146b88SJung-uk Kim /******************************************************************************
187f8146b88SJung-uk Kim *
18828482948SJung-uk Kim * FUNCTION: AcpiHwGetAccessBitWidth
18928482948SJung-uk Kim *
19028482948SJung-uk Kim * PARAMETERS: Address - GAS register address
19128482948SJung-uk Kim * Reg - GAS register structure
19228482948SJung-uk Kim * MaxBitWidth - Max BitWidth supported (32 or 64)
19328482948SJung-uk Kim *
19428482948SJung-uk Kim * RETURN: Status
19528482948SJung-uk Kim *
19628482948SJung-uk Kim * DESCRIPTION: Obtain optimal access bit width
19728482948SJung-uk Kim *
19828482948SJung-uk Kim ******************************************************************************/
19928482948SJung-uk Kim
20028482948SJung-uk Kim static UINT8
AcpiHwGetAccessBitWidth(UINT64 Address,ACPI_GENERIC_ADDRESS * Reg,UINT8 MaxBitWidth)20128482948SJung-uk Kim AcpiHwGetAccessBitWidth (
20228482948SJung-uk Kim UINT64 Address,
20328482948SJung-uk Kim ACPI_GENERIC_ADDRESS *Reg,
20428482948SJung-uk Kim UINT8 MaxBitWidth)
20528482948SJung-uk Kim {
20628482948SJung-uk Kim UINT8 AccessBitWidth;
20728482948SJung-uk Kim
20828482948SJung-uk Kim
20928482948SJung-uk Kim /*
21028482948SJung-uk Kim * GAS format "register", used by FADT:
21128482948SJung-uk Kim * 1. Detected if BitOffset is 0 and BitWidth is 8/16/32/64;
21228482948SJung-uk Kim * 2. AccessSize field is ignored and BitWidth field is used for
21328482948SJung-uk Kim * determining the boundary of the IO accesses.
21428482948SJung-uk Kim * GAS format "region", used by APEI registers:
21528482948SJung-uk Kim * 1. Detected if BitOffset is not 0 or BitWidth is not 8/16/32/64;
21628482948SJung-uk Kim * 2. AccessSize field is used for determining the boundary of the
21728482948SJung-uk Kim * IO accesses;
21828482948SJung-uk Kim * 3. BitOffset/BitWidth fields are used to describe the "region".
21928482948SJung-uk Kim *
22028482948SJung-uk Kim * Note: This algorithm assumes that the "Address" fields should always
22128482948SJung-uk Kim * contain aligned values.
22228482948SJung-uk Kim */
22328482948SJung-uk Kim if (!Reg->BitOffset && Reg->BitWidth &&
22428482948SJung-uk Kim ACPI_IS_POWER_OF_TWO (Reg->BitWidth) &&
22528482948SJung-uk Kim ACPI_IS_ALIGNED (Reg->BitWidth, 8))
22628482948SJung-uk Kim {
22728482948SJung-uk Kim AccessBitWidth = Reg->BitWidth;
22828482948SJung-uk Kim }
22928482948SJung-uk Kim else if (Reg->AccessWidth)
23028482948SJung-uk Kim {
2315f9b24faSJung-uk Kim AccessBitWidth = ACPI_ACCESS_BIT_WIDTH (Reg->AccessWidth);
23228482948SJung-uk Kim }
23328482948SJung-uk Kim else
23428482948SJung-uk Kim {
23528482948SJung-uk Kim AccessBitWidth = ACPI_ROUND_UP_POWER_OF_TWO_8 (
23628482948SJung-uk Kim Reg->BitOffset + Reg->BitWidth);
23728482948SJung-uk Kim if (AccessBitWidth <= 8)
23828482948SJung-uk Kim {
23928482948SJung-uk Kim AccessBitWidth = 8;
24028482948SJung-uk Kim }
24128482948SJung-uk Kim else
24228482948SJung-uk Kim {
24328482948SJung-uk Kim while (!ACPI_IS_ALIGNED (Address, AccessBitWidth >> 3))
24428482948SJung-uk Kim {
24528482948SJung-uk Kim AccessBitWidth >>= 1;
24628482948SJung-uk Kim }
24728482948SJung-uk Kim }
24828482948SJung-uk Kim }
24928482948SJung-uk Kim
25028482948SJung-uk Kim /* Maximum IO port access bit width is 32 */
25128482948SJung-uk Kim
25228482948SJung-uk Kim if (Reg->SpaceId == ACPI_ADR_SPACE_SYSTEM_IO)
25328482948SJung-uk Kim {
25428482948SJung-uk Kim MaxBitWidth = 32;
25528482948SJung-uk Kim }
25628482948SJung-uk Kim
25728482948SJung-uk Kim /*
25828482948SJung-uk Kim * Return access width according to the requested maximum access bit width,
25928482948SJung-uk Kim * as the caller should know the format of the register and may enforce
26028482948SJung-uk Kim * a 32-bit accesses.
26128482948SJung-uk Kim */
26228482948SJung-uk Kim if (AccessBitWidth < MaxBitWidth)
26328482948SJung-uk Kim {
26428482948SJung-uk Kim return (AccessBitWidth);
26528482948SJung-uk Kim }
26628482948SJung-uk Kim return (MaxBitWidth);
26728482948SJung-uk Kim }
26828482948SJung-uk Kim
26928482948SJung-uk Kim
27028482948SJung-uk Kim /******************************************************************************
27128482948SJung-uk Kim *
272a159c266SJung-uk Kim * FUNCTION: AcpiHwValidateRegister
273a159c266SJung-uk Kim *
274a159c266SJung-uk Kim * PARAMETERS: Reg - GAS register structure
275a159c266SJung-uk Kim * MaxBitWidth - Max BitWidth supported (32 or 64)
276a159c266SJung-uk Kim * Address - Pointer to where the gas->address
277a159c266SJung-uk Kim * is returned
278a159c266SJung-uk Kim *
279a159c266SJung-uk Kim * RETURN: Status
280a159c266SJung-uk Kim *
281a159c266SJung-uk Kim * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
282a159c266SJung-uk Kim * pointer, Address, SpaceId, BitWidth, and BitOffset.
283a159c266SJung-uk Kim *
284a159c266SJung-uk Kim ******************************************************************************/
285a159c266SJung-uk Kim
286a159c266SJung-uk Kim ACPI_STATUS
AcpiHwValidateRegister(ACPI_GENERIC_ADDRESS * Reg,UINT8 MaxBitWidth,UINT64 * Address)287a159c266SJung-uk Kim AcpiHwValidateRegister (
288a159c266SJung-uk Kim ACPI_GENERIC_ADDRESS *Reg,
289a159c266SJung-uk Kim UINT8 MaxBitWidth,
290a159c266SJung-uk Kim UINT64 *Address)
291a159c266SJung-uk Kim {
29228482948SJung-uk Kim UINT8 BitWidth;
29328482948SJung-uk Kim UINT8 AccessWidth;
29428482948SJung-uk Kim
295a159c266SJung-uk Kim
296a159c266SJung-uk Kim /* Must have a valid pointer to a GAS structure */
297a159c266SJung-uk Kim
298a159c266SJung-uk Kim if (!Reg)
299a159c266SJung-uk Kim {
300a159c266SJung-uk Kim return (AE_BAD_PARAMETER);
301a159c266SJung-uk Kim }
302a159c266SJung-uk Kim
303a159c266SJung-uk Kim /*
304a159c266SJung-uk Kim * Copy the target address. This handles possible alignment issues.
305a159c266SJung-uk Kim * Address must not be null. A null address also indicates an optional
306a159c266SJung-uk Kim * ACPI register that is not supported, so no error message.
307a159c266SJung-uk Kim */
308a159c266SJung-uk Kim ACPI_MOVE_64_TO_64 (Address, &Reg->Address);
309a159c266SJung-uk Kim if (!(*Address))
310a159c266SJung-uk Kim {
311a159c266SJung-uk Kim return (AE_BAD_ADDRESS);
312a159c266SJung-uk Kim }
313a159c266SJung-uk Kim
314a159c266SJung-uk Kim /* Validate the SpaceID */
315a159c266SJung-uk Kim
316a159c266SJung-uk Kim if ((Reg->SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) &&
317a159c266SJung-uk Kim (Reg->SpaceId != ACPI_ADR_SPACE_SYSTEM_IO))
318a159c266SJung-uk Kim {
319a159c266SJung-uk Kim ACPI_ERROR ((AE_INFO,
320a159c266SJung-uk Kim "Unsupported address space: 0x%X", Reg->SpaceId));
321a159c266SJung-uk Kim return (AE_SUPPORT);
322a159c266SJung-uk Kim }
323a159c266SJung-uk Kim
32428482948SJung-uk Kim /* Validate the AccessWidth */
325a159c266SJung-uk Kim
32628482948SJung-uk Kim if (Reg->AccessWidth > 4)
327a159c266SJung-uk Kim {
328a159c266SJung-uk Kim ACPI_ERROR ((AE_INFO,
32928482948SJung-uk Kim "Unsupported register access width: 0x%X", Reg->AccessWidth));
330a159c266SJung-uk Kim return (AE_SUPPORT);
331a159c266SJung-uk Kim }
332a159c266SJung-uk Kim
33328482948SJung-uk Kim /* Validate the BitWidth, convert AccessWidth into number of bits */
334a159c266SJung-uk Kim
33528482948SJung-uk Kim AccessWidth = AcpiHwGetAccessBitWidth (*Address, Reg, MaxBitWidth);
33628482948SJung-uk Kim BitWidth = ACPI_ROUND_UP (Reg->BitOffset + Reg->BitWidth, AccessWidth);
33728482948SJung-uk Kim if (MaxBitWidth < BitWidth)
338a159c266SJung-uk Kim {
339a159c266SJung-uk Kim ACPI_WARNING ((AE_INFO,
34028482948SJung-uk Kim "Requested bit width 0x%X is smaller than register bit width 0x%X",
34128482948SJung-uk Kim MaxBitWidth, BitWidth));
34228482948SJung-uk Kim return (AE_SUPPORT);
343a159c266SJung-uk Kim }
344a159c266SJung-uk Kim
345a159c266SJung-uk Kim return (AE_OK);
346a159c266SJung-uk Kim }
347a159c266SJung-uk Kim
348a159c266SJung-uk Kim
349a159c266SJung-uk Kim /******************************************************************************
350a159c266SJung-uk Kim *
351a159c266SJung-uk Kim * FUNCTION: AcpiHwRead
352a159c266SJung-uk Kim *
353a159c266SJung-uk Kim * PARAMETERS: Value - Where the value is returned
354a159c266SJung-uk Kim * Reg - GAS register structure
355a159c266SJung-uk Kim *
356a159c266SJung-uk Kim * RETURN: Status
357a159c266SJung-uk Kim *
3582f6a1a81SJung-uk Kim * DESCRIPTION: Read from either memory or IO space. This is a 64-bit max
3592f6a1a81SJung-uk Kim * version of AcpiRead.
360a159c266SJung-uk Kim *
361a159c266SJung-uk Kim * LIMITATIONS: <These limitations also apply to AcpiHwWrite>
362a159c266SJung-uk Kim * SpaceID must be SystemMemory or SystemIO.
363a159c266SJung-uk Kim *
364a159c266SJung-uk Kim ******************************************************************************/
365a159c266SJung-uk Kim
366a159c266SJung-uk Kim ACPI_STATUS
AcpiHwRead(UINT64 * Value,ACPI_GENERIC_ADDRESS * Reg)367a159c266SJung-uk Kim AcpiHwRead (
3682f6a1a81SJung-uk Kim UINT64 *Value,
369a159c266SJung-uk Kim ACPI_GENERIC_ADDRESS *Reg)
370a159c266SJung-uk Kim {
371a159c266SJung-uk Kim UINT64 Address;
37228482948SJung-uk Kim UINT8 AccessWidth;
37328482948SJung-uk Kim UINT32 BitWidth;
37428482948SJung-uk Kim UINT8 BitOffset;
375a159c266SJung-uk Kim UINT64 Value64;
37628482948SJung-uk Kim UINT32 Value32;
37728482948SJung-uk Kim UINT8 Index;
378a159c266SJung-uk Kim ACPI_STATUS Status;
379a159c266SJung-uk Kim
380a159c266SJung-uk Kim
381a159c266SJung-uk Kim ACPI_FUNCTION_NAME (HwRead);
382a159c266SJung-uk Kim
383a159c266SJung-uk Kim
384a159c266SJung-uk Kim /* Validate contents of the GAS register */
385a159c266SJung-uk Kim
3862f6a1a81SJung-uk Kim Status = AcpiHwValidateRegister (Reg, 64, &Address);
387a159c266SJung-uk Kim if (ACPI_FAILURE (Status))
388a159c266SJung-uk Kim {
389a159c266SJung-uk Kim return (Status);
390a159c266SJung-uk Kim }
391a159c266SJung-uk Kim
39228482948SJung-uk Kim /*
3932f6a1a81SJung-uk Kim * Initialize entire 64-bit return value to zero, convert AccessWidth
39428482948SJung-uk Kim * into number of bits based
39528482948SJung-uk Kim */
396a159c266SJung-uk Kim *Value = 0;
3972f6a1a81SJung-uk Kim AccessWidth = AcpiHwGetAccessBitWidth (Address, Reg, 64);
39828482948SJung-uk Kim BitWidth = Reg->BitOffset + Reg->BitWidth;
39928482948SJung-uk Kim BitOffset = Reg->BitOffset;
400a159c266SJung-uk Kim
401a159c266SJung-uk Kim /*
402a159c266SJung-uk Kim * Two address spaces supported: Memory or IO. PCI_Config is
403a159c266SJung-uk Kim * not supported here because the GAS structure is insufficient
404a159c266SJung-uk Kim */
40528482948SJung-uk Kim Index = 0;
40628482948SJung-uk Kim while (BitWidth)
40728482948SJung-uk Kim {
40828482948SJung-uk Kim if (BitOffset >= AccessWidth)
40928482948SJung-uk Kim {
4102f6a1a81SJung-uk Kim Value64 = 0;
41128482948SJung-uk Kim BitOffset -= AccessWidth;
41228482948SJung-uk Kim }
41328482948SJung-uk Kim else
41428482948SJung-uk Kim {
415a159c266SJung-uk Kim if (Reg->SpaceId == ACPI_ADR_SPACE_SYSTEM_MEMORY)
416a159c266SJung-uk Kim {
417a159c266SJung-uk Kim Status = AcpiOsReadMemory ((ACPI_PHYSICAL_ADDRESS)
41828482948SJung-uk Kim Address + Index * ACPI_DIV_8 (AccessWidth),
41928482948SJung-uk Kim &Value64, AccessWidth);
420a159c266SJung-uk Kim }
421a159c266SJung-uk Kim else /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
422a159c266SJung-uk Kim {
423a159c266SJung-uk Kim Status = AcpiHwReadPort ((ACPI_IO_ADDRESS)
42428482948SJung-uk Kim Address + Index * ACPI_DIV_8 (AccessWidth),
42528482948SJung-uk Kim &Value32, AccessWidth);
4262f6a1a81SJung-uk Kim Value64 = (UINT64) Value32;
42728482948SJung-uk Kim }
42828482948SJung-uk Kim }
42928482948SJung-uk Kim
43028482948SJung-uk Kim /*
43128482948SJung-uk Kim * Use offset style bit writes because "Index * AccessWidth" is
4322f6a1a81SJung-uk Kim * ensured to be less than 64-bits by AcpiHwValidateRegister().
43328482948SJung-uk Kim */
43428482948SJung-uk Kim ACPI_SET_BITS (Value, Index * AccessWidth,
4352f6a1a81SJung-uk Kim ACPI_MASK_BITS_ABOVE_64 (AccessWidth), Value64);
43628482948SJung-uk Kim
43728482948SJung-uk Kim BitWidth -= BitWidth > AccessWidth ? AccessWidth : BitWidth;
43828482948SJung-uk Kim Index++;
439a159c266SJung-uk Kim }
440a159c266SJung-uk Kim
441a159c266SJung-uk Kim ACPI_DEBUG_PRINT ((ACPI_DB_IO,
4422f6a1a81SJung-uk Kim "Read: %8.8X%8.8X width %2d from %8.8X%8.8X (%s)\n",
4432f6a1a81SJung-uk Kim ACPI_FORMAT_UINT64 (*Value), AccessWidth,
4442f6a1a81SJung-uk Kim ACPI_FORMAT_UINT64 (Address), AcpiUtGetRegionName (Reg->SpaceId)));
445a159c266SJung-uk Kim
446a159c266SJung-uk Kim return (Status);
447a159c266SJung-uk Kim }
448a159c266SJung-uk Kim
449a159c266SJung-uk Kim
450a159c266SJung-uk Kim /******************************************************************************
451a159c266SJung-uk Kim *
452a159c266SJung-uk Kim * FUNCTION: AcpiHwWrite
453a159c266SJung-uk Kim *
454a159c266SJung-uk Kim * PARAMETERS: Value - Value to be written
455a159c266SJung-uk Kim * Reg - GAS register structure
456a159c266SJung-uk Kim *
457a159c266SJung-uk Kim * RETURN: Status
458a159c266SJung-uk Kim *
4592f6a1a81SJung-uk Kim * DESCRIPTION: Write to either memory or IO space. This is a 64-bit max
4602f6a1a81SJung-uk Kim * version of AcpiWrite.
461a159c266SJung-uk Kim *
462a159c266SJung-uk Kim ******************************************************************************/
463a159c266SJung-uk Kim
464a159c266SJung-uk Kim ACPI_STATUS
AcpiHwWrite(UINT64 Value,ACPI_GENERIC_ADDRESS * Reg)465a159c266SJung-uk Kim AcpiHwWrite (
4662f6a1a81SJung-uk Kim UINT64 Value,
467a159c266SJung-uk Kim ACPI_GENERIC_ADDRESS *Reg)
468a159c266SJung-uk Kim {
469a159c266SJung-uk Kim UINT64 Address;
47028482948SJung-uk Kim UINT8 AccessWidth;
47128482948SJung-uk Kim UINT32 BitWidth;
47228482948SJung-uk Kim UINT8 BitOffset;
47328482948SJung-uk Kim UINT64 Value64;
47428482948SJung-uk Kim UINT8 Index;
475a159c266SJung-uk Kim ACPI_STATUS Status;
476a159c266SJung-uk Kim
477a159c266SJung-uk Kim
478a159c266SJung-uk Kim ACPI_FUNCTION_NAME (HwWrite);
479a159c266SJung-uk Kim
480a159c266SJung-uk Kim
481a159c266SJung-uk Kim /* Validate contents of the GAS register */
482a159c266SJung-uk Kim
4832f6a1a81SJung-uk Kim Status = AcpiHwValidateRegister (Reg, 64, &Address);
484a159c266SJung-uk Kim if (ACPI_FAILURE (Status))
485a159c266SJung-uk Kim {
486a159c266SJung-uk Kim return (Status);
487a159c266SJung-uk Kim }
488a159c266SJung-uk Kim
48928482948SJung-uk Kim /* Convert AccessWidth into number of bits based */
49028482948SJung-uk Kim
4912f6a1a81SJung-uk Kim AccessWidth = AcpiHwGetAccessBitWidth (Address, Reg, 64);
49228482948SJung-uk Kim BitWidth = Reg->BitOffset + Reg->BitWidth;
49328482948SJung-uk Kim BitOffset = Reg->BitOffset;
49428482948SJung-uk Kim
495a159c266SJung-uk Kim /*
496a159c266SJung-uk Kim * Two address spaces supported: Memory or IO. PCI_Config is
497a159c266SJung-uk Kim * not supported here because the GAS structure is insufficient
498a159c266SJung-uk Kim */
49928482948SJung-uk Kim Index = 0;
50028482948SJung-uk Kim while (BitWidth)
50128482948SJung-uk Kim {
50228482948SJung-uk Kim /*
50328482948SJung-uk Kim * Use offset style bit reads because "Index * AccessWidth" is
5042f6a1a81SJung-uk Kim * ensured to be less than 64-bits by AcpiHwValidateRegister().
50528482948SJung-uk Kim */
5062f6a1a81SJung-uk Kim Value64 = ACPI_GET_BITS (&Value, Index * AccessWidth,
5072f6a1a81SJung-uk Kim ACPI_MASK_BITS_ABOVE_64 (AccessWidth));
50828482948SJung-uk Kim
50928482948SJung-uk Kim if (BitOffset >= AccessWidth)
51028482948SJung-uk Kim {
51128482948SJung-uk Kim BitOffset -= AccessWidth;
51228482948SJung-uk Kim }
51328482948SJung-uk Kim else
51428482948SJung-uk Kim {
515a159c266SJung-uk Kim if (Reg->SpaceId == ACPI_ADR_SPACE_SYSTEM_MEMORY)
516a159c266SJung-uk Kim {
517a159c266SJung-uk Kim Status = AcpiOsWriteMemory ((ACPI_PHYSICAL_ADDRESS)
51828482948SJung-uk Kim Address + Index * ACPI_DIV_8 (AccessWidth),
51928482948SJung-uk Kim Value64, AccessWidth);
520a159c266SJung-uk Kim }
521a159c266SJung-uk Kim else /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
522a159c266SJung-uk Kim {
523a159c266SJung-uk Kim Status = AcpiHwWritePort ((ACPI_IO_ADDRESS)
52428482948SJung-uk Kim Address + Index * ACPI_DIV_8 (AccessWidth),
5252f6a1a81SJung-uk Kim (UINT32) Value64, AccessWidth);
52628482948SJung-uk Kim }
52728482948SJung-uk Kim }
52828482948SJung-uk Kim
52928482948SJung-uk Kim /*
53028482948SJung-uk Kim * Index * AccessWidth is ensured to be less than 32-bits by
53128482948SJung-uk Kim * AcpiHwValidateRegister().
53228482948SJung-uk Kim */
53328482948SJung-uk Kim BitWidth -= BitWidth > AccessWidth ? AccessWidth : BitWidth;
53428482948SJung-uk Kim Index++;
535a159c266SJung-uk Kim }
536a159c266SJung-uk Kim
537a159c266SJung-uk Kim ACPI_DEBUG_PRINT ((ACPI_DB_IO,
5382f6a1a81SJung-uk Kim "Wrote: %8.8X%8.8X width %2d to %8.8X%8.8X (%s)\n",
5392f6a1a81SJung-uk Kim ACPI_FORMAT_UINT64 (Value), AccessWidth,
5402f6a1a81SJung-uk Kim ACPI_FORMAT_UINT64 (Address), AcpiUtGetRegionName (Reg->SpaceId)));
541a159c266SJung-uk Kim
542a159c266SJung-uk Kim return (Status);
543a159c266SJung-uk Kim }
544a159c266SJung-uk Kim
545a159c266SJung-uk Kim
546a159c266SJung-uk Kim #if (!ACPI_REDUCED_HARDWARE)
547a159c266SJung-uk Kim /*******************************************************************************
548a159c266SJung-uk Kim *
549a159c266SJung-uk Kim * FUNCTION: AcpiHwClearAcpiStatus
550a159c266SJung-uk Kim *
551a159c266SJung-uk Kim * PARAMETERS: None
552a159c266SJung-uk Kim *
553a159c266SJung-uk Kim * RETURN: Status
554a159c266SJung-uk Kim *
555a159c266SJung-uk Kim * DESCRIPTION: Clears all fixed and general purpose status bits
556a159c266SJung-uk Kim *
557a159c266SJung-uk Kim ******************************************************************************/
558a159c266SJung-uk Kim
559a159c266SJung-uk Kim ACPI_STATUS
AcpiHwClearAcpiStatus(void)560a159c266SJung-uk Kim AcpiHwClearAcpiStatus (
561a159c266SJung-uk Kim void)
562a159c266SJung-uk Kim {
563a159c266SJung-uk Kim ACPI_STATUS Status;
564a159c266SJung-uk Kim ACPI_CPU_FLAGS LockFlags = 0;
565a159c266SJung-uk Kim
566a159c266SJung-uk Kim
567a159c266SJung-uk Kim ACPI_FUNCTION_TRACE (HwClearAcpiStatus);
568a159c266SJung-uk Kim
569a159c266SJung-uk Kim
570a159c266SJung-uk Kim ACPI_DEBUG_PRINT ((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
571a159c266SJung-uk Kim ACPI_BITMASK_ALL_FIXED_STATUS,
572a159c266SJung-uk Kim ACPI_FORMAT_UINT64 (AcpiGbl_XPm1aStatus.Address)));
573a159c266SJung-uk Kim
574a159c266SJung-uk Kim LockFlags = AcpiOsAcquireLock (AcpiGbl_HardwareLock);
575a159c266SJung-uk Kim
576a159c266SJung-uk Kim /* Clear the fixed events in PM1 A/B */
577a159c266SJung-uk Kim
578a159c266SJung-uk Kim Status = AcpiHwRegisterWrite (ACPI_REGISTER_PM1_STATUS,
579a159c266SJung-uk Kim ACPI_BITMASK_ALL_FIXED_STATUS);
580313a0c13SJung-uk Kim
581313a0c13SJung-uk Kim AcpiOsReleaseLock (AcpiGbl_HardwareLock, LockFlags);
582313a0c13SJung-uk Kim
583a159c266SJung-uk Kim if (ACPI_FAILURE (Status))
584a159c266SJung-uk Kim {
585313a0c13SJung-uk Kim goto Exit;
586a159c266SJung-uk Kim }
587a159c266SJung-uk Kim
588a159c266SJung-uk Kim /* Clear the GPE Bits in all GPE registers in all GPE blocks */
589a159c266SJung-uk Kim
590a159c266SJung-uk Kim Status = AcpiEvWalkGpeList (AcpiHwClearGpeBlock, NULL);
591a159c266SJung-uk Kim
592313a0c13SJung-uk Kim Exit:
593a159c266SJung-uk Kim return_ACPI_STATUS (Status);
594a159c266SJung-uk Kim }
595a159c266SJung-uk Kim
596a159c266SJung-uk Kim
597a159c266SJung-uk Kim /*******************************************************************************
598a159c266SJung-uk Kim *
599a159c266SJung-uk Kim * FUNCTION: AcpiHwGetBitRegisterInfo
600a159c266SJung-uk Kim *
601a159c266SJung-uk Kim * PARAMETERS: RegisterId - Index of ACPI Register to access
602a159c266SJung-uk Kim *
603a159c266SJung-uk Kim * RETURN: The bitmask to be used when accessing the register
604a159c266SJung-uk Kim *
605a159c266SJung-uk Kim * DESCRIPTION: Map RegisterId into a register bitmask.
606a159c266SJung-uk Kim *
607a159c266SJung-uk Kim ******************************************************************************/
608a159c266SJung-uk Kim
609a159c266SJung-uk Kim ACPI_BIT_REGISTER_INFO *
AcpiHwGetBitRegisterInfo(UINT32 RegisterId)610a159c266SJung-uk Kim AcpiHwGetBitRegisterInfo (
611a159c266SJung-uk Kim UINT32 RegisterId)
612a159c266SJung-uk Kim {
613a159c266SJung-uk Kim ACPI_FUNCTION_ENTRY ();
614a159c266SJung-uk Kim
615a159c266SJung-uk Kim
616a159c266SJung-uk Kim if (RegisterId > ACPI_BITREG_MAX)
617a159c266SJung-uk Kim {
618a159c266SJung-uk Kim ACPI_ERROR ((AE_INFO, "Invalid BitRegister ID: 0x%X", RegisterId));
619a159c266SJung-uk Kim return (NULL);
620a159c266SJung-uk Kim }
621a159c266SJung-uk Kim
622a159c266SJung-uk Kim return (&AcpiGbl_BitRegisterInfo[RegisterId]);
623a159c266SJung-uk Kim }
624a159c266SJung-uk Kim
625a159c266SJung-uk Kim
626a159c266SJung-uk Kim /******************************************************************************
627a159c266SJung-uk Kim *
628a159c266SJung-uk Kim * FUNCTION: AcpiHwWritePm1Control
629a159c266SJung-uk Kim *
630a159c266SJung-uk Kim * PARAMETERS: Pm1aControl - Value to be written to PM1A control
631a159c266SJung-uk Kim * Pm1bControl - Value to be written to PM1B control
632a159c266SJung-uk Kim *
633a159c266SJung-uk Kim * RETURN: Status
634a159c266SJung-uk Kim *
635a159c266SJung-uk Kim * DESCRIPTION: Write the PM1 A/B control registers. These registers are
636ab71bbb7SJung-uk Kim * different than the PM1 A/B status and enable registers
637a159c266SJung-uk Kim * in that different values can be written to the A/B registers.
638a159c266SJung-uk Kim * Most notably, the SLP_TYP bits can be different, as per the
639a159c266SJung-uk Kim * values returned from the _Sx predefined methods.
640a159c266SJung-uk Kim *
641a159c266SJung-uk Kim ******************************************************************************/
642a159c266SJung-uk Kim
643a159c266SJung-uk Kim ACPI_STATUS
AcpiHwWritePm1Control(UINT32 Pm1aControl,UINT32 Pm1bControl)644a159c266SJung-uk Kim AcpiHwWritePm1Control (
645a159c266SJung-uk Kim UINT32 Pm1aControl,
646a159c266SJung-uk Kim UINT32 Pm1bControl)
647a159c266SJung-uk Kim {
648a159c266SJung-uk Kim ACPI_STATUS Status;
649a159c266SJung-uk Kim
650a159c266SJung-uk Kim
651a159c266SJung-uk Kim ACPI_FUNCTION_TRACE (HwWritePm1Control);
652a159c266SJung-uk Kim
653a159c266SJung-uk Kim
654a159c266SJung-uk Kim Status = AcpiHwWrite (Pm1aControl, &AcpiGbl_FADT.XPm1aControlBlock);
655a159c266SJung-uk Kim if (ACPI_FAILURE (Status))
656a159c266SJung-uk Kim {
657a159c266SJung-uk Kim return_ACPI_STATUS (Status);
658a159c266SJung-uk Kim }
659a159c266SJung-uk Kim
660a159c266SJung-uk Kim if (AcpiGbl_FADT.XPm1bControlBlock.Address)
661a159c266SJung-uk Kim {
662a159c266SJung-uk Kim Status = AcpiHwWrite (Pm1bControl, &AcpiGbl_FADT.XPm1bControlBlock);
663a159c266SJung-uk Kim }
664a159c266SJung-uk Kim return_ACPI_STATUS (Status);
665a159c266SJung-uk Kim }
666a159c266SJung-uk Kim
667a159c266SJung-uk Kim
668a159c266SJung-uk Kim /******************************************************************************
669a159c266SJung-uk Kim *
670a159c266SJung-uk Kim * FUNCTION: AcpiHwRegisterRead
671a159c266SJung-uk Kim *
672a159c266SJung-uk Kim * PARAMETERS: RegisterId - ACPI Register ID
673a159c266SJung-uk Kim * ReturnValue - Where the register value is returned
674a159c266SJung-uk Kim *
675a159c266SJung-uk Kim * RETURN: Status and the value read.
676a159c266SJung-uk Kim *
677a159c266SJung-uk Kim * DESCRIPTION: Read from the specified ACPI register
678a159c266SJung-uk Kim *
679a159c266SJung-uk Kim ******************************************************************************/
680a159c266SJung-uk Kim
681a159c266SJung-uk Kim ACPI_STATUS
AcpiHwRegisterRead(UINT32 RegisterId,UINT32 * ReturnValue)682a159c266SJung-uk Kim AcpiHwRegisterRead (
683a159c266SJung-uk Kim UINT32 RegisterId,
684a159c266SJung-uk Kim UINT32 *ReturnValue)
685a159c266SJung-uk Kim {
686a159c266SJung-uk Kim UINT32 Value = 0;
6872f6a1a81SJung-uk Kim UINT64 Value64;
688a159c266SJung-uk Kim ACPI_STATUS Status;
689a159c266SJung-uk Kim
690a159c266SJung-uk Kim
691a159c266SJung-uk Kim ACPI_FUNCTION_TRACE (HwRegisterRead);
692a159c266SJung-uk Kim
693a159c266SJung-uk Kim
694a159c266SJung-uk Kim switch (RegisterId)
695a159c266SJung-uk Kim {
696a159c266SJung-uk Kim case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
697a159c266SJung-uk Kim
698a159c266SJung-uk Kim Status = AcpiHwReadMultiple (&Value,
699a159c266SJung-uk Kim &AcpiGbl_XPm1aStatus,
700a159c266SJung-uk Kim &AcpiGbl_XPm1bStatus);
701a159c266SJung-uk Kim break;
702a159c266SJung-uk Kim
703a159c266SJung-uk Kim case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
704a159c266SJung-uk Kim
705a159c266SJung-uk Kim Status = AcpiHwReadMultiple (&Value,
706a159c266SJung-uk Kim &AcpiGbl_XPm1aEnable,
707a159c266SJung-uk Kim &AcpiGbl_XPm1bEnable);
708a159c266SJung-uk Kim break;
709a159c266SJung-uk Kim
710a159c266SJung-uk Kim case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
711a159c266SJung-uk Kim
712a159c266SJung-uk Kim Status = AcpiHwReadMultiple (&Value,
713a159c266SJung-uk Kim &AcpiGbl_FADT.XPm1aControlBlock,
714a159c266SJung-uk Kim &AcpiGbl_FADT.XPm1bControlBlock);
715a159c266SJung-uk Kim
716a159c266SJung-uk Kim /*
717a159c266SJung-uk Kim * Zero the write-only bits. From the ACPI specification, "Hardware
718a159c266SJung-uk Kim * Write-Only Bits": "Upon reads to registers with write-only bits,
719a159c266SJung-uk Kim * software masks out all write-only bits."
720a159c266SJung-uk Kim */
721a159c266SJung-uk Kim Value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS;
722a159c266SJung-uk Kim break;
723a159c266SJung-uk Kim
724a159c266SJung-uk Kim case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
725a159c266SJung-uk Kim
7262f6a1a81SJung-uk Kim Status = AcpiHwRead (&Value64, &AcpiGbl_FADT.XPm2ControlBlock);
72751f42badSJung-uk Kim if (ACPI_SUCCESS (Status))
72851f42badSJung-uk Kim {
7292f6a1a81SJung-uk Kim Value = (UINT32) Value64;
73051f42badSJung-uk Kim }
731a159c266SJung-uk Kim break;
732a159c266SJung-uk Kim
733a159c266SJung-uk Kim case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
734a159c266SJung-uk Kim
7352f6a1a81SJung-uk Kim Status = AcpiHwRead (&Value64, &AcpiGbl_FADT.XPmTimerBlock);
73651f42badSJung-uk Kim if (ACPI_SUCCESS (Status))
73751f42badSJung-uk Kim {
7382f6a1a81SJung-uk Kim Value = (UINT32) Value64;
73951f42badSJung-uk Kim }
74051f42badSJung-uk Kim
741a159c266SJung-uk Kim break;
742a159c266SJung-uk Kim
743a159c266SJung-uk Kim case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
744a159c266SJung-uk Kim
745a159c266SJung-uk Kim Status = AcpiHwReadPort (AcpiGbl_FADT.SmiCommand, &Value, 8);
746a159c266SJung-uk Kim break;
747a159c266SJung-uk Kim
748a159c266SJung-uk Kim default:
749a9d8d09cSJung-uk Kim
750a159c266SJung-uk Kim ACPI_ERROR ((AE_INFO, "Unknown Register ID: 0x%X",
751a159c266SJung-uk Kim RegisterId));
752a159c266SJung-uk Kim Status = AE_BAD_PARAMETER;
753a159c266SJung-uk Kim break;
754a159c266SJung-uk Kim }
755a159c266SJung-uk Kim
756a159c266SJung-uk Kim if (ACPI_SUCCESS (Status))
757a159c266SJung-uk Kim {
7582f6a1a81SJung-uk Kim *ReturnValue = (UINT32) Value;
759a159c266SJung-uk Kim }
760a159c266SJung-uk Kim
761a159c266SJung-uk Kim return_ACPI_STATUS (Status);
762a159c266SJung-uk Kim }
763a159c266SJung-uk Kim
764a159c266SJung-uk Kim
765a159c266SJung-uk Kim /******************************************************************************
766a159c266SJung-uk Kim *
767a159c266SJung-uk Kim * FUNCTION: AcpiHwRegisterWrite
768a159c266SJung-uk Kim *
769a159c266SJung-uk Kim * PARAMETERS: RegisterId - ACPI Register ID
770a159c266SJung-uk Kim * Value - The value to write
771a159c266SJung-uk Kim *
772a159c266SJung-uk Kim * RETURN: Status
773a159c266SJung-uk Kim *
774a159c266SJung-uk Kim * DESCRIPTION: Write to the specified ACPI register
775a159c266SJung-uk Kim *
776a159c266SJung-uk Kim * NOTE: In accordance with the ACPI specification, this function automatically
777a159c266SJung-uk Kim * preserves the value of the following bits, meaning that these bits cannot be
778a159c266SJung-uk Kim * changed via this interface:
779a159c266SJung-uk Kim *
780a159c266SJung-uk Kim * PM1_CONTROL[0] = SCI_EN
781a159c266SJung-uk Kim * PM1_CONTROL[9]
782a159c266SJung-uk Kim * PM1_STATUS[11]
783a159c266SJung-uk Kim *
784a159c266SJung-uk Kim * ACPI References:
785a159c266SJung-uk Kim * 1) Hardware Ignored Bits: When software writes to a register with ignored
786a159c266SJung-uk Kim * bit fields, it preserves the ignored bit fields
787a159c266SJung-uk Kim * 2) SCI_EN: OSPM always preserves this bit position
788a159c266SJung-uk Kim *
789a159c266SJung-uk Kim ******************************************************************************/
790a159c266SJung-uk Kim
791a159c266SJung-uk Kim ACPI_STATUS
AcpiHwRegisterWrite(UINT32 RegisterId,UINT32 Value)792a159c266SJung-uk Kim AcpiHwRegisterWrite (
793a159c266SJung-uk Kim UINT32 RegisterId,
794a159c266SJung-uk Kim UINT32 Value)
795a159c266SJung-uk Kim {
796a159c266SJung-uk Kim ACPI_STATUS Status;
797a159c266SJung-uk Kim UINT32 ReadValue;
7982f6a1a81SJung-uk Kim UINT64 ReadValue64;
799a159c266SJung-uk Kim
800a159c266SJung-uk Kim
801a159c266SJung-uk Kim ACPI_FUNCTION_TRACE (HwRegisterWrite);
802a159c266SJung-uk Kim
803a159c266SJung-uk Kim
804a159c266SJung-uk Kim switch (RegisterId)
805a159c266SJung-uk Kim {
806a159c266SJung-uk Kim case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
807a159c266SJung-uk Kim /*
808a159c266SJung-uk Kim * Handle the "ignored" bit in PM1 Status. According to the ACPI
809a159c266SJung-uk Kim * specification, ignored bits are to be preserved when writing.
810a159c266SJung-uk Kim * Normally, this would mean a read/modify/write sequence. However,
811a159c266SJung-uk Kim * preserving a bit in the status register is different. Writing a
812a159c266SJung-uk Kim * one clears the status, and writing a zero preserves the status.
813a159c266SJung-uk Kim * Therefore, we must always write zero to the ignored bit.
814a159c266SJung-uk Kim *
815a159c266SJung-uk Kim * This behavior is clarified in the ACPI 4.0 specification.
816a159c266SJung-uk Kim */
817a159c266SJung-uk Kim Value &= ~ACPI_PM1_STATUS_PRESERVED_BITS;
818a159c266SJung-uk Kim
819a159c266SJung-uk Kim Status = AcpiHwWriteMultiple (Value,
820a159c266SJung-uk Kim &AcpiGbl_XPm1aStatus,
821a159c266SJung-uk Kim &AcpiGbl_XPm1bStatus);
822a159c266SJung-uk Kim break;
823a159c266SJung-uk Kim
824a159c266SJung-uk Kim case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
825a159c266SJung-uk Kim
826a159c266SJung-uk Kim Status = AcpiHwWriteMultiple (Value,
827a159c266SJung-uk Kim &AcpiGbl_XPm1aEnable,
828a159c266SJung-uk Kim &AcpiGbl_XPm1bEnable);
829a159c266SJung-uk Kim break;
830a159c266SJung-uk Kim
831a159c266SJung-uk Kim case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
832a159c266SJung-uk Kim /*
833a159c266SJung-uk Kim * Perform a read first to preserve certain bits (per ACPI spec)
834a159c266SJung-uk Kim * Note: This includes SCI_EN, we never want to change this bit
835a159c266SJung-uk Kim */
836a159c266SJung-uk Kim Status = AcpiHwReadMultiple (&ReadValue,
837a159c266SJung-uk Kim &AcpiGbl_FADT.XPm1aControlBlock,
838a159c266SJung-uk Kim &AcpiGbl_FADT.XPm1bControlBlock);
839a159c266SJung-uk Kim if (ACPI_FAILURE (Status))
840a159c266SJung-uk Kim {
841a159c266SJung-uk Kim goto Exit;
842a159c266SJung-uk Kim }
843a159c266SJung-uk Kim
844a159c266SJung-uk Kim /* Insert the bits to be preserved */
845a159c266SJung-uk Kim
846a159c266SJung-uk Kim ACPI_INSERT_BITS (Value, ACPI_PM1_CONTROL_PRESERVED_BITS, ReadValue);
847a159c266SJung-uk Kim
848a159c266SJung-uk Kim /* Now we can write the data */
849a159c266SJung-uk Kim
850a159c266SJung-uk Kim Status = AcpiHwWriteMultiple (Value,
851a159c266SJung-uk Kim &AcpiGbl_FADT.XPm1aControlBlock,
852a159c266SJung-uk Kim &AcpiGbl_FADT.XPm1bControlBlock);
853a159c266SJung-uk Kim break;
854a159c266SJung-uk Kim
855a159c266SJung-uk Kim case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
856a159c266SJung-uk Kim /*
857a159c266SJung-uk Kim * For control registers, all reserved bits must be preserved,
858a159c266SJung-uk Kim * as per the ACPI spec.
859a159c266SJung-uk Kim */
8602f6a1a81SJung-uk Kim Status = AcpiHwRead (&ReadValue64, &AcpiGbl_FADT.XPm2ControlBlock);
861a159c266SJung-uk Kim if (ACPI_FAILURE (Status))
862a159c266SJung-uk Kim {
863a159c266SJung-uk Kim goto Exit;
864a159c266SJung-uk Kim }
8652f6a1a81SJung-uk Kim ReadValue = (UINT32) ReadValue64;
866a159c266SJung-uk Kim
867a159c266SJung-uk Kim /* Insert the bits to be preserved */
868a159c266SJung-uk Kim
869a159c266SJung-uk Kim ACPI_INSERT_BITS (Value, ACPI_PM2_CONTROL_PRESERVED_BITS, ReadValue);
870a159c266SJung-uk Kim
871a159c266SJung-uk Kim Status = AcpiHwWrite (Value, &AcpiGbl_FADT.XPm2ControlBlock);
872a159c266SJung-uk Kim break;
873a159c266SJung-uk Kim
874a159c266SJung-uk Kim case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
875a159c266SJung-uk Kim
876a159c266SJung-uk Kim Status = AcpiHwWrite (Value, &AcpiGbl_FADT.XPmTimerBlock);
877a159c266SJung-uk Kim break;
878a159c266SJung-uk Kim
879a159c266SJung-uk Kim case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
880a159c266SJung-uk Kim
881a159c266SJung-uk Kim /* SMI_CMD is currently always in IO space */
882a159c266SJung-uk Kim
883a159c266SJung-uk Kim Status = AcpiHwWritePort (AcpiGbl_FADT.SmiCommand, Value, 8);
884a159c266SJung-uk Kim break;
885a159c266SJung-uk Kim
886a159c266SJung-uk Kim default:
887a9d8d09cSJung-uk Kim
888a159c266SJung-uk Kim ACPI_ERROR ((AE_INFO, "Unknown Register ID: 0x%X",
889a159c266SJung-uk Kim RegisterId));
890a159c266SJung-uk Kim Status = AE_BAD_PARAMETER;
891a159c266SJung-uk Kim break;
892a159c266SJung-uk Kim }
893a159c266SJung-uk Kim
894a159c266SJung-uk Kim Exit:
895a159c266SJung-uk Kim return_ACPI_STATUS (Status);
896a159c266SJung-uk Kim }
897a159c266SJung-uk Kim
898a159c266SJung-uk Kim
899a159c266SJung-uk Kim /******************************************************************************
900a159c266SJung-uk Kim *
901a159c266SJung-uk Kim * FUNCTION: AcpiHwReadMultiple
902a159c266SJung-uk Kim *
903a159c266SJung-uk Kim * PARAMETERS: Value - Where the register value is returned
904a159c266SJung-uk Kim * RegisterA - First ACPI register (required)
905a159c266SJung-uk Kim * RegisterB - Second ACPI register (optional)
906a159c266SJung-uk Kim *
907a159c266SJung-uk Kim * RETURN: Status
908a159c266SJung-uk Kim *
909a159c266SJung-uk Kim * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
910a159c266SJung-uk Kim *
911a159c266SJung-uk Kim ******************************************************************************/
912a159c266SJung-uk Kim
913a159c266SJung-uk Kim static ACPI_STATUS
AcpiHwReadMultiple(UINT32 * Value,ACPI_GENERIC_ADDRESS * RegisterA,ACPI_GENERIC_ADDRESS * RegisterB)914a159c266SJung-uk Kim AcpiHwReadMultiple (
915a159c266SJung-uk Kim UINT32 *Value,
916a159c266SJung-uk Kim ACPI_GENERIC_ADDRESS *RegisterA,
917a159c266SJung-uk Kim ACPI_GENERIC_ADDRESS *RegisterB)
918a159c266SJung-uk Kim {
919a159c266SJung-uk Kim UINT32 ValueA = 0;
920a159c266SJung-uk Kim UINT32 ValueB = 0;
9212f6a1a81SJung-uk Kim UINT64 Value64;
922a159c266SJung-uk Kim ACPI_STATUS Status;
923a159c266SJung-uk Kim
924a159c266SJung-uk Kim
925a159c266SJung-uk Kim /* The first register is always required */
926a159c266SJung-uk Kim
9272f6a1a81SJung-uk Kim Status = AcpiHwRead (&Value64, RegisterA);
928a159c266SJung-uk Kim if (ACPI_FAILURE (Status))
929a159c266SJung-uk Kim {
930a159c266SJung-uk Kim return (Status);
931a159c266SJung-uk Kim }
9322f6a1a81SJung-uk Kim ValueA = (UINT32) Value64;
933a159c266SJung-uk Kim
934a159c266SJung-uk Kim /* Second register is optional */
935a159c266SJung-uk Kim
936a159c266SJung-uk Kim if (RegisterB->Address)
937a159c266SJung-uk Kim {
9382f6a1a81SJung-uk Kim Status = AcpiHwRead (&Value64, RegisterB);
939a159c266SJung-uk Kim if (ACPI_FAILURE (Status))
940a159c266SJung-uk Kim {
941a159c266SJung-uk Kim return (Status);
942a159c266SJung-uk Kim }
9432f6a1a81SJung-uk Kim ValueB = (UINT32) Value64;
944a159c266SJung-uk Kim }
945a159c266SJung-uk Kim
946a159c266SJung-uk Kim /*
947a159c266SJung-uk Kim * OR the two return values together. No shifting or masking is necessary,
948a159c266SJung-uk Kim * because of how the PM1 registers are defined in the ACPI specification:
949a159c266SJung-uk Kim *
950a159c266SJung-uk Kim * "Although the bits can be split between the two register blocks (each
951a159c266SJung-uk Kim * register block has a unique pointer within the FADT), the bit positions
952a159c266SJung-uk Kim * are maintained. The register block with unimplemented bits (that is,
953a159c266SJung-uk Kim * those implemented in the other register block) always returns zeros,
954a159c266SJung-uk Kim * and writes have no side effects"
955a159c266SJung-uk Kim */
956a159c266SJung-uk Kim *Value = (ValueA | ValueB);
957a159c266SJung-uk Kim return (AE_OK);
958a159c266SJung-uk Kim }
959a159c266SJung-uk Kim
960a159c266SJung-uk Kim
961a159c266SJung-uk Kim /******************************************************************************
962a159c266SJung-uk Kim *
963a159c266SJung-uk Kim * FUNCTION: AcpiHwWriteMultiple
964a159c266SJung-uk Kim *
965a159c266SJung-uk Kim * PARAMETERS: Value - The value to write
966a159c266SJung-uk Kim * RegisterA - First ACPI register (required)
967a159c266SJung-uk Kim * RegisterB - Second ACPI register (optional)
968a159c266SJung-uk Kim *
969a159c266SJung-uk Kim * RETURN: Status
970a159c266SJung-uk Kim *
971a159c266SJung-uk Kim * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
972a159c266SJung-uk Kim *
973a159c266SJung-uk Kim ******************************************************************************/
974a159c266SJung-uk Kim
975a159c266SJung-uk Kim static ACPI_STATUS
AcpiHwWriteMultiple(UINT32 Value,ACPI_GENERIC_ADDRESS * RegisterA,ACPI_GENERIC_ADDRESS * RegisterB)976a159c266SJung-uk Kim AcpiHwWriteMultiple (
977a159c266SJung-uk Kim UINT32 Value,
978a159c266SJung-uk Kim ACPI_GENERIC_ADDRESS *RegisterA,
979a159c266SJung-uk Kim ACPI_GENERIC_ADDRESS *RegisterB)
980a159c266SJung-uk Kim {
981a159c266SJung-uk Kim ACPI_STATUS Status;
982a159c266SJung-uk Kim
983a159c266SJung-uk Kim
984a159c266SJung-uk Kim /* The first register is always required */
985a159c266SJung-uk Kim
986a159c266SJung-uk Kim Status = AcpiHwWrite (Value, RegisterA);
987a159c266SJung-uk Kim if (ACPI_FAILURE (Status))
988a159c266SJung-uk Kim {
989a159c266SJung-uk Kim return (Status);
990a159c266SJung-uk Kim }
991a159c266SJung-uk Kim
992a159c266SJung-uk Kim /*
993a159c266SJung-uk Kim * Second register is optional
994a159c266SJung-uk Kim *
995a159c266SJung-uk Kim * No bit shifting or clearing is necessary, because of how the PM1
996a159c266SJung-uk Kim * registers are defined in the ACPI specification:
997a159c266SJung-uk Kim *
998a159c266SJung-uk Kim * "Although the bits can be split between the two register blocks (each
999a159c266SJung-uk Kim * register block has a unique pointer within the FADT), the bit positions
1000a159c266SJung-uk Kim * are maintained. The register block with unimplemented bits (that is,
1001a159c266SJung-uk Kim * those implemented in the other register block) always returns zeros,
1002a159c266SJung-uk Kim * and writes have no side effects"
1003a159c266SJung-uk Kim */
1004a159c266SJung-uk Kim if (RegisterB->Address)
1005a159c266SJung-uk Kim {
1006a159c266SJung-uk Kim Status = AcpiHwWrite (Value, RegisterB);
1007a159c266SJung-uk Kim }
1008a159c266SJung-uk Kim
1009a159c266SJung-uk Kim return (Status);
1010a159c266SJung-uk Kim }
1011a159c266SJung-uk Kim
1012a159c266SJung-uk Kim #endif /* !ACPI_REDUCED_HARDWARE */
1013