1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 6 */ 7 8 #if defined(__FreeBSD__) 9 #define LINUXKPI_PARAM_PREFIX ath10k_core_ 10 #endif 11 12 #include <linux/module.h> 13 #include <linux/firmware.h> 14 #if defined(__linux__) || (defined(__FreeBSD__) && defined(CONFIG_OF)) 15 #include <linux/of.h> 16 #endif 17 #include <linux/property.h> 18 #include <linux/dmi.h> 19 #include <linux/ctype.h> 20 #include <linux/pm_qos.h> 21 #include <linux/nvmem-consumer.h> 22 #include <asm/byteorder.h> 23 24 #include "core.h" 25 #include "mac.h" 26 #include "htc.h" 27 #include "hif.h" 28 #include "wmi.h" 29 #include "bmi.h" 30 #include "debug.h" 31 #include "htt.h" 32 #include "testmode.h" 33 #include "wmi-ops.h" 34 #include "coredump.h" 35 #if defined(CONFIG_FWLOG) 36 #include "fwlog.h" 37 #endif 38 39 unsigned int ath10k_debug_mask; 40 EXPORT_SYMBOL(ath10k_debug_mask); 41 42 static unsigned int ath10k_cryptmode_param; 43 static bool uart_print; 44 static bool skip_otp; 45 static bool rawmode; 46 static bool fw_diag_log; 47 48 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) | 49 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA); 50 51 /* FIXME: most of these should be readonly */ 52 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 53 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 54 module_param(uart_print, bool, 0644); 55 module_param(skip_otp, bool, 0644); 56 module_param(rawmode, bool, 0644); 57 module_param(fw_diag_log, bool, 0644); 58 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444); 59 60 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 61 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 62 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 63 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 64 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 65 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file"); 66 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging"); 67 68 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 69 { 70 .id = QCA988X_HW_2_0_VERSION, 71 .dev_id = QCA988X_2_0_DEVICE_ID, 72 .bus = ATH10K_BUS_PCI, 73 .name = "qca988x hw2.0", 74 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 75 .uart_pin = 7, 76 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 77 .otp_exe_param = 0, 78 .channel_counters_freq_hz = 88000, 79 .max_probe_resp_desc_thres = 0, 80 .cal_data_len = 2116, 81 .fw = { 82 .dir = QCA988X_HW_2_0_FW_DIR, 83 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 84 .board_size = QCA988X_BOARD_DATA_SZ, 85 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 86 }, 87 .rx_desc_ops = &qca988x_rx_desc_ops, 88 .hw_ops = &qca988x_ops, 89 .decap_align_bytes = 4, 90 .spectral_bin_discard = 0, 91 .spectral_bin_offset = 0, 92 .vht160_mcs_rx_highest = 0, 93 .vht160_mcs_tx_highest = 0, 94 .n_cipher_suites = 8, 95 .ast_skid_limit = 0x10, 96 .num_wds_entries = 0x20, 97 .target_64bit = false, 98 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 99 .shadow_reg_support = false, 100 .rri_on_ddr = false, 101 .hw_filter_reset_required = true, 102 .fw_diag_ce_download = false, 103 .credit_size_workaround = false, 104 .tx_stats_over_pktlog = true, 105 .dynamic_sar_support = false, 106 }, 107 { 108 .id = QCA988X_HW_2_0_VERSION, 109 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT, 110 .name = "qca988x hw2.0 ubiquiti", 111 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 112 .uart_pin = 7, 113 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 114 .otp_exe_param = 0, 115 .channel_counters_freq_hz = 88000, 116 .max_probe_resp_desc_thres = 0, 117 .cal_data_len = 2116, 118 .fw = { 119 .dir = QCA988X_HW_2_0_FW_DIR, 120 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 121 .board_size = QCA988X_BOARD_DATA_SZ, 122 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 123 }, 124 .rx_desc_ops = &qca988x_rx_desc_ops, 125 .hw_ops = &qca988x_ops, 126 .decap_align_bytes = 4, 127 .spectral_bin_discard = 0, 128 .spectral_bin_offset = 0, 129 .vht160_mcs_rx_highest = 0, 130 .vht160_mcs_tx_highest = 0, 131 .n_cipher_suites = 8, 132 .ast_skid_limit = 0x10, 133 .num_wds_entries = 0x20, 134 .target_64bit = false, 135 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 136 .shadow_reg_support = false, 137 .rri_on_ddr = false, 138 .hw_filter_reset_required = true, 139 .fw_diag_ce_download = false, 140 .credit_size_workaround = false, 141 .tx_stats_over_pktlog = true, 142 .dynamic_sar_support = false, 143 }, 144 { 145 .id = QCA9887_HW_1_0_VERSION, 146 .dev_id = QCA9887_1_0_DEVICE_ID, 147 .bus = ATH10K_BUS_PCI, 148 .name = "qca9887 hw1.0", 149 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 150 .uart_pin = 7, 151 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 152 .otp_exe_param = 0, 153 .channel_counters_freq_hz = 88000, 154 .max_probe_resp_desc_thres = 0, 155 .cal_data_len = 2116, 156 .fw = { 157 .dir = QCA9887_HW_1_0_FW_DIR, 158 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 159 .board_size = QCA9887_BOARD_DATA_SZ, 160 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 161 }, 162 .rx_desc_ops = &qca988x_rx_desc_ops, 163 .hw_ops = &qca988x_ops, 164 .decap_align_bytes = 4, 165 .spectral_bin_discard = 0, 166 .spectral_bin_offset = 0, 167 .vht160_mcs_rx_highest = 0, 168 .vht160_mcs_tx_highest = 0, 169 .n_cipher_suites = 8, 170 .ast_skid_limit = 0x10, 171 .num_wds_entries = 0x20, 172 .target_64bit = false, 173 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 174 .shadow_reg_support = false, 175 .rri_on_ddr = false, 176 .hw_filter_reset_required = true, 177 .fw_diag_ce_download = false, 178 .credit_size_workaround = false, 179 .tx_stats_over_pktlog = false, 180 .dynamic_sar_support = false, 181 }, 182 { 183 .id = QCA6174_HW_3_2_VERSION, 184 .dev_id = QCA6174_3_2_DEVICE_ID, 185 .bus = ATH10K_BUS_SDIO, 186 .name = "qca6174 hw3.2 sdio", 187 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 188 .uart_pin = 19, 189 .otp_exe_param = 0, 190 .channel_counters_freq_hz = 88000, 191 .max_probe_resp_desc_thres = 0, 192 .cal_data_len = 0, 193 .fw = { 194 .dir = QCA6174_HW_3_0_FW_DIR, 195 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 196 .board_size = QCA6174_BOARD_DATA_SZ, 197 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 198 }, 199 .rx_desc_ops = &qca988x_rx_desc_ops, 200 .hw_ops = &qca6174_sdio_ops, 201 .hw_clk = qca6174_clk, 202 .target_cpu_freq = 176000000, 203 .decap_align_bytes = 4, 204 .n_cipher_suites = 8, 205 .num_peers = 10, 206 .ast_skid_limit = 0x10, 207 .num_wds_entries = 0x20, 208 .uart_pin_workaround = true, 209 .tx_stats_over_pktlog = false, 210 .credit_size_workaround = false, 211 .bmi_large_size_download = true, 212 .supports_peer_stats_info = true, 213 .dynamic_sar_support = true, 214 }, 215 { 216 .id = QCA6174_HW_2_1_VERSION, 217 .dev_id = QCA6164_2_1_DEVICE_ID, 218 .bus = ATH10K_BUS_PCI, 219 .name = "qca6164 hw2.1", 220 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 221 .uart_pin = 6, 222 .otp_exe_param = 0, 223 .channel_counters_freq_hz = 88000, 224 .max_probe_resp_desc_thres = 0, 225 .cal_data_len = 8124, 226 .fw = { 227 .dir = QCA6174_HW_2_1_FW_DIR, 228 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 229 .board_size = QCA6174_BOARD_DATA_SZ, 230 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 231 }, 232 .rx_desc_ops = &qca988x_rx_desc_ops, 233 .hw_ops = &qca988x_ops, 234 .decap_align_bytes = 4, 235 .spectral_bin_discard = 0, 236 .spectral_bin_offset = 0, 237 .vht160_mcs_rx_highest = 0, 238 .vht160_mcs_tx_highest = 0, 239 .n_cipher_suites = 8, 240 .ast_skid_limit = 0x10, 241 .num_wds_entries = 0x20, 242 .target_64bit = false, 243 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 244 .shadow_reg_support = false, 245 .rri_on_ddr = false, 246 .hw_filter_reset_required = true, 247 .fw_diag_ce_download = false, 248 .credit_size_workaround = false, 249 .tx_stats_over_pktlog = false, 250 .dynamic_sar_support = false, 251 }, 252 { 253 .id = QCA6174_HW_2_1_VERSION, 254 .dev_id = QCA6174_2_1_DEVICE_ID, 255 .bus = ATH10K_BUS_PCI, 256 .name = "qca6174 hw2.1", 257 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 258 .uart_pin = 6, 259 .otp_exe_param = 0, 260 .channel_counters_freq_hz = 88000, 261 .max_probe_resp_desc_thres = 0, 262 .cal_data_len = 8124, 263 .fw = { 264 .dir = QCA6174_HW_2_1_FW_DIR, 265 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 266 .board_size = QCA6174_BOARD_DATA_SZ, 267 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 268 }, 269 .rx_desc_ops = &qca988x_rx_desc_ops, 270 .hw_ops = &qca988x_ops, 271 .decap_align_bytes = 4, 272 .spectral_bin_discard = 0, 273 .spectral_bin_offset = 0, 274 .vht160_mcs_rx_highest = 0, 275 .vht160_mcs_tx_highest = 0, 276 .n_cipher_suites = 8, 277 .ast_skid_limit = 0x10, 278 .num_wds_entries = 0x20, 279 .target_64bit = false, 280 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 281 .shadow_reg_support = false, 282 .rri_on_ddr = false, 283 .hw_filter_reset_required = true, 284 .fw_diag_ce_download = false, 285 .credit_size_workaround = false, 286 .tx_stats_over_pktlog = false, 287 .dynamic_sar_support = false, 288 }, 289 { 290 .id = QCA6174_HW_3_0_VERSION, 291 .dev_id = QCA6174_2_1_DEVICE_ID, 292 .bus = ATH10K_BUS_PCI, 293 .name = "qca6174 hw3.0", 294 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 295 .uart_pin = 6, 296 .otp_exe_param = 0, 297 .channel_counters_freq_hz = 88000, 298 .max_probe_resp_desc_thres = 0, 299 .cal_data_len = 8124, 300 .fw = { 301 .dir = QCA6174_HW_3_0_FW_DIR, 302 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 303 .board_size = QCA6174_BOARD_DATA_SZ, 304 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 305 }, 306 .rx_desc_ops = &qca988x_rx_desc_ops, 307 .hw_ops = &qca988x_ops, 308 .decap_align_bytes = 4, 309 .spectral_bin_discard = 0, 310 .spectral_bin_offset = 0, 311 .vht160_mcs_rx_highest = 0, 312 .vht160_mcs_tx_highest = 0, 313 .n_cipher_suites = 8, 314 .ast_skid_limit = 0x10, 315 .num_wds_entries = 0x20, 316 .target_64bit = false, 317 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 318 .shadow_reg_support = false, 319 .rri_on_ddr = false, 320 .hw_filter_reset_required = true, 321 .fw_diag_ce_download = false, 322 .credit_size_workaround = false, 323 .tx_stats_over_pktlog = false, 324 .dynamic_sar_support = false, 325 }, 326 { 327 .id = QCA6174_HW_3_2_VERSION, 328 .dev_id = QCA6174_2_1_DEVICE_ID, 329 .bus = ATH10K_BUS_PCI, 330 .name = "qca6174 hw3.2", 331 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 332 .uart_pin = 6, 333 .otp_exe_param = 0, 334 .channel_counters_freq_hz = 88000, 335 .max_probe_resp_desc_thres = 0, 336 .cal_data_len = 8124, 337 .fw = { 338 /* uses same binaries as hw3.0 */ 339 .dir = QCA6174_HW_3_0_FW_DIR, 340 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 341 .board_size = QCA6174_BOARD_DATA_SZ, 342 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 343 }, 344 .rx_desc_ops = &qca988x_rx_desc_ops, 345 .hw_ops = &qca6174_ops, 346 .hw_clk = qca6174_clk, 347 .target_cpu_freq = 176000000, 348 .decap_align_bytes = 4, 349 .spectral_bin_discard = 0, 350 .spectral_bin_offset = 0, 351 .vht160_mcs_rx_highest = 0, 352 .vht160_mcs_tx_highest = 0, 353 .n_cipher_suites = 8, 354 .ast_skid_limit = 0x10, 355 .num_wds_entries = 0x20, 356 .target_64bit = false, 357 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 358 .shadow_reg_support = false, 359 .rri_on_ddr = false, 360 .hw_filter_reset_required = true, 361 .fw_diag_ce_download = true, 362 .credit_size_workaround = false, 363 .tx_stats_over_pktlog = false, 364 .supports_peer_stats_info = true, 365 .dynamic_sar_support = true, 366 }, 367 { 368 .id = QCA99X0_HW_2_0_DEV_VERSION, 369 .dev_id = QCA99X0_2_0_DEVICE_ID, 370 .bus = ATH10K_BUS_PCI, 371 .name = "qca99x0 hw2.0", 372 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 373 .uart_pin = 7, 374 .otp_exe_param = 0x00000700, 375 .continuous_frag_desc = true, 376 .cck_rate_map_rev2 = true, 377 .channel_counters_freq_hz = 150000, 378 .max_probe_resp_desc_thres = 24, 379 .tx_chain_mask = 0xf, 380 .rx_chain_mask = 0xf, 381 .max_spatial_stream = 4, 382 .cal_data_len = 12064, 383 .fw = { 384 .dir = QCA99X0_HW_2_0_FW_DIR, 385 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 386 .board_size = QCA99X0_BOARD_DATA_SZ, 387 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 388 }, 389 .sw_decrypt_mcast_mgmt = true, 390 .rx_desc_ops = &qca99x0_rx_desc_ops, 391 .hw_ops = &qca99x0_ops, 392 .decap_align_bytes = 1, 393 .spectral_bin_discard = 4, 394 .spectral_bin_offset = 0, 395 .vht160_mcs_rx_highest = 0, 396 .vht160_mcs_tx_highest = 0, 397 .n_cipher_suites = 11, 398 .ast_skid_limit = 0x10, 399 .num_wds_entries = 0x20, 400 .target_64bit = false, 401 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 402 .shadow_reg_support = false, 403 .rri_on_ddr = false, 404 .hw_filter_reset_required = true, 405 .fw_diag_ce_download = false, 406 .credit_size_workaround = false, 407 .tx_stats_over_pktlog = false, 408 .dynamic_sar_support = false, 409 }, 410 { 411 .id = QCA9984_HW_1_0_DEV_VERSION, 412 .dev_id = QCA9984_1_0_DEVICE_ID, 413 .bus = ATH10K_BUS_PCI, 414 .name = "qca9984/qca9994 hw1.0", 415 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 416 .uart_pin = 7, 417 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 418 .otp_exe_param = 0x00000700, 419 .continuous_frag_desc = true, 420 .cck_rate_map_rev2 = true, 421 .channel_counters_freq_hz = 150000, 422 .max_probe_resp_desc_thres = 24, 423 .tx_chain_mask = 0xf, 424 .rx_chain_mask = 0xf, 425 .max_spatial_stream = 4, 426 .cal_data_len = 12064, 427 .fw = { 428 .dir = QCA9984_HW_1_0_FW_DIR, 429 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 430 .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE, 431 .board_size = QCA99X0_BOARD_DATA_SZ, 432 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 433 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ, 434 }, 435 .sw_decrypt_mcast_mgmt = true, 436 .rx_desc_ops = &qca99x0_rx_desc_ops, 437 .hw_ops = &qca99x0_ops, 438 .decap_align_bytes = 1, 439 .spectral_bin_discard = 12, 440 .spectral_bin_offset = 8, 441 442 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 443 * or 2x2 160Mhz, long-guard-interval. 444 */ 445 .vht160_mcs_rx_highest = 1560, 446 .vht160_mcs_tx_highest = 1560, 447 .n_cipher_suites = 11, 448 .ast_skid_limit = 0x10, 449 .num_wds_entries = 0x20, 450 .target_64bit = false, 451 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 452 .shadow_reg_support = false, 453 .rri_on_ddr = false, 454 .hw_filter_reset_required = true, 455 .fw_diag_ce_download = false, 456 .credit_size_workaround = false, 457 .tx_stats_over_pktlog = false, 458 .dynamic_sar_support = false, 459 }, 460 { 461 .id = QCA9888_HW_2_0_DEV_VERSION, 462 .dev_id = QCA9888_2_0_DEVICE_ID, 463 .bus = ATH10K_BUS_PCI, 464 .name = "qca9888 hw2.0", 465 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 466 .uart_pin = 7, 467 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 468 .otp_exe_param = 0x00000700, 469 .continuous_frag_desc = true, 470 .channel_counters_freq_hz = 150000, 471 .max_probe_resp_desc_thres = 24, 472 .tx_chain_mask = 3, 473 .rx_chain_mask = 3, 474 .max_spatial_stream = 2, 475 .cal_data_len = 12064, 476 .fw = { 477 .dir = QCA9888_HW_2_0_FW_DIR, 478 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 479 .board_size = QCA99X0_BOARD_DATA_SZ, 480 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 481 }, 482 .sw_decrypt_mcast_mgmt = true, 483 .rx_desc_ops = &qca99x0_rx_desc_ops, 484 .hw_ops = &qca99x0_ops, 485 .decap_align_bytes = 1, 486 .spectral_bin_discard = 12, 487 .spectral_bin_offset = 8, 488 489 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 490 * 1x1 160Mhz, long-guard-interval. 491 */ 492 .vht160_mcs_rx_highest = 780, 493 .vht160_mcs_tx_highest = 780, 494 .n_cipher_suites = 11, 495 .ast_skid_limit = 0x10, 496 .num_wds_entries = 0x20, 497 .target_64bit = false, 498 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 499 .shadow_reg_support = false, 500 .rri_on_ddr = false, 501 .hw_filter_reset_required = true, 502 .fw_diag_ce_download = false, 503 .credit_size_workaround = false, 504 .tx_stats_over_pktlog = false, 505 .dynamic_sar_support = false, 506 }, 507 { 508 .id = QCA9377_HW_1_0_DEV_VERSION, 509 .dev_id = QCA9377_1_0_DEVICE_ID, 510 .bus = ATH10K_BUS_PCI, 511 .name = "qca9377 hw1.0", 512 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 513 .uart_pin = 6, 514 .otp_exe_param = 0, 515 .channel_counters_freq_hz = 88000, 516 .max_probe_resp_desc_thres = 0, 517 .cal_data_len = 8124, 518 .fw = { 519 .dir = QCA9377_HW_1_0_FW_DIR, 520 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 521 .board_size = QCA9377_BOARD_DATA_SZ, 522 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 523 }, 524 .rx_desc_ops = &qca988x_rx_desc_ops, 525 .hw_ops = &qca988x_ops, 526 .decap_align_bytes = 4, 527 .spectral_bin_discard = 0, 528 .spectral_bin_offset = 0, 529 .vht160_mcs_rx_highest = 0, 530 .vht160_mcs_tx_highest = 0, 531 .n_cipher_suites = 8, 532 .ast_skid_limit = 0x10, 533 .num_wds_entries = 0x20, 534 .target_64bit = false, 535 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 536 .shadow_reg_support = false, 537 .rri_on_ddr = false, 538 .hw_filter_reset_required = true, 539 .fw_diag_ce_download = false, 540 .credit_size_workaround = false, 541 .tx_stats_over_pktlog = false, 542 .dynamic_sar_support = false, 543 }, 544 { 545 .id = QCA9377_HW_1_1_DEV_VERSION, 546 .dev_id = QCA9377_1_0_DEVICE_ID, 547 .bus = ATH10K_BUS_PCI, 548 .name = "qca9377 hw1.1", 549 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 550 .uart_pin = 6, 551 .otp_exe_param = 0, 552 .channel_counters_freq_hz = 88000, 553 .max_probe_resp_desc_thres = 0, 554 .cal_data_len = 8124, 555 .fw = { 556 .dir = QCA9377_HW_1_0_FW_DIR, 557 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 558 .board_size = QCA9377_BOARD_DATA_SZ, 559 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 560 }, 561 .rx_desc_ops = &qca988x_rx_desc_ops, 562 .hw_ops = &qca6174_ops, 563 .hw_clk = qca6174_clk, 564 .target_cpu_freq = 176000000, 565 .decap_align_bytes = 4, 566 .spectral_bin_discard = 0, 567 .spectral_bin_offset = 0, 568 .vht160_mcs_rx_highest = 0, 569 .vht160_mcs_tx_highest = 0, 570 .n_cipher_suites = 8, 571 .ast_skid_limit = 0x10, 572 .num_wds_entries = 0x20, 573 .target_64bit = false, 574 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 575 .shadow_reg_support = false, 576 .rri_on_ddr = false, 577 .hw_filter_reset_required = true, 578 .fw_diag_ce_download = true, 579 .credit_size_workaround = false, 580 .tx_stats_over_pktlog = false, 581 .dynamic_sar_support = false, 582 }, 583 { 584 .id = QCA9377_HW_1_1_DEV_VERSION, 585 .dev_id = QCA9377_1_0_DEVICE_ID, 586 .bus = ATH10K_BUS_SDIO, 587 .name = "qca9377 hw1.1 sdio", 588 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 589 .uart_pin = 19, 590 .otp_exe_param = 0, 591 .channel_counters_freq_hz = 88000, 592 .max_probe_resp_desc_thres = 0, 593 .cal_data_len = 8124, 594 .fw = { 595 .dir = QCA9377_HW_1_0_FW_DIR, 596 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 597 .board_size = QCA9377_BOARD_DATA_SZ, 598 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 599 }, 600 .rx_desc_ops = &qca988x_rx_desc_ops, 601 .hw_ops = &qca6174_ops, 602 .hw_clk = qca6174_clk, 603 .target_cpu_freq = 176000000, 604 .decap_align_bytes = 4, 605 .n_cipher_suites = 8, 606 .num_peers = TARGET_QCA9377_HL_NUM_PEERS, 607 .ast_skid_limit = 0x10, 608 .num_wds_entries = 0x20, 609 .uart_pin_workaround = true, 610 .credit_size_workaround = true, 611 .dynamic_sar_support = false, 612 }, 613 { 614 .id = QCA4019_HW_1_0_DEV_VERSION, 615 .dev_id = 0, 616 .bus = ATH10K_BUS_AHB, 617 .name = "qca4019 hw1.0", 618 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 619 .uart_pin = 7, 620 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 621 .otp_exe_param = 0x0010000, 622 .continuous_frag_desc = true, 623 .cck_rate_map_rev2 = true, 624 .channel_counters_freq_hz = 125000, 625 .max_probe_resp_desc_thres = 24, 626 .tx_chain_mask = 0x3, 627 .rx_chain_mask = 0x3, 628 .max_spatial_stream = 2, 629 .cal_data_len = 12064, 630 .fw = { 631 .dir = QCA4019_HW_1_0_FW_DIR, 632 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 633 .board_size = QCA4019_BOARD_DATA_SZ, 634 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 635 }, 636 .sw_decrypt_mcast_mgmt = true, 637 .rx_desc_ops = &qca99x0_rx_desc_ops, 638 .hw_ops = &qca99x0_ops, 639 .decap_align_bytes = 1, 640 .spectral_bin_discard = 4, 641 .spectral_bin_offset = 0, 642 .vht160_mcs_rx_highest = 0, 643 .vht160_mcs_tx_highest = 0, 644 .n_cipher_suites = 11, 645 .ast_skid_limit = 0x10, 646 .num_wds_entries = 0x20, 647 .target_64bit = false, 648 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 649 .shadow_reg_support = false, 650 .rri_on_ddr = false, 651 .hw_filter_reset_required = true, 652 .fw_diag_ce_download = false, 653 .credit_size_workaround = false, 654 .tx_stats_over_pktlog = false, 655 .dynamic_sar_support = false, 656 }, 657 { 658 .id = WCN3990_HW_1_0_DEV_VERSION, 659 .dev_id = 0, 660 .bus = ATH10K_BUS_SNOC, 661 .name = "wcn3990 hw1.0", 662 .continuous_frag_desc = true, 663 .tx_chain_mask = 0x7, 664 .rx_chain_mask = 0x7, 665 .max_spatial_stream = 4, 666 .fw = { 667 .dir = WCN3990_HW_1_0_FW_DIR, 668 }, 669 .sw_decrypt_mcast_mgmt = true, 670 .rx_desc_ops = &wcn3990_rx_desc_ops, 671 .hw_ops = &wcn3990_ops, 672 .decap_align_bytes = 1, 673 .num_peers = TARGET_HL_TLV_NUM_PEERS, 674 .n_cipher_suites = 11, 675 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT, 676 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES, 677 .target_64bit = true, 678 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC, 679 .shadow_reg_support = true, 680 .rri_on_ddr = true, 681 .hw_filter_reset_required = false, 682 .fw_diag_ce_download = false, 683 .credit_size_workaround = false, 684 .tx_stats_over_pktlog = false, 685 .dynamic_sar_support = true, 686 }, 687 }; 688 689 static const char *const ath10k_core_fw_feature_str[] = { 690 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 691 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 692 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 693 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 694 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 695 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 696 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 697 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 698 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 699 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 700 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 701 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 702 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 703 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 704 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 705 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 706 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 707 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 708 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference", 709 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi", 710 [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel", 711 [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate", 712 [ATH10K_FW_FEATURE_IRAM_RECOVERY] = "iram-recovery", 713 }; 714 715 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 716 size_t buf_len, 717 enum ath10k_fw_features feat) 718 { 719 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 720 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 721 ATH10K_FW_FEATURE_COUNT); 722 723 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 724 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 725 return scnprintf(buf, buf_len, "bit%d", feat); 726 } 727 728 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 729 } 730 731 void ath10k_core_get_fw_features_str(struct ath10k *ar, 732 char *buf, 733 size_t buf_len) 734 { 735 size_t len = 0; 736 int i; 737 738 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 739 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 740 if (len > 0) 741 len += scnprintf(buf + len, buf_len - len, ","); 742 743 len += ath10k_core_get_fw_feature_str(buf + len, 744 buf_len - len, 745 i); 746 } 747 } 748 } 749 750 static void ath10k_send_suspend_complete(struct ath10k *ar) 751 { 752 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 753 754 complete(&ar->target_suspend); 755 } 756 757 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode) 758 { 759 bool mtu_workaround = ar->hw_params.credit_size_workaround; 760 int ret; 761 u32 param = 0; 762 763 ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 764 if (ret) 765 return ret; 766 767 ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 768 if (ret) 769 return ret; 770 771 ret = ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 772 if (ret) 773 return ret; 774 775 param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET; 776 777 if (mode == ATH10K_FIRMWARE_MODE_NORMAL && !mtu_workaround) 778 param |= HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE; 779 else 780 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE; 781 782 if (mode == ATH10K_FIRMWARE_MODE_UTF) 783 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET; 784 else 785 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET; 786 787 ret = ath10k_bmi_write32(ar, hi_acs_flags, param); 788 if (ret) 789 return ret; 790 791 ret = ath10k_bmi_read32(ar, hi_option_flag2, ¶m); 792 if (ret) 793 return ret; 794 795 param |= HI_OPTION_SDIO_CRASH_DUMP_ENHANCEMENT_HOST; 796 797 ret = ath10k_bmi_write32(ar, hi_option_flag2, param); 798 if (ret) 799 return ret; 800 801 return 0; 802 } 803 804 static int ath10k_init_configure_target(struct ath10k *ar) 805 { 806 u32 param_host; 807 int ret; 808 809 /* tell target which HTC version it is used*/ 810 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 811 HTC_PROTOCOL_VERSION); 812 if (ret) { 813 ath10k_err(ar, "settings HTC version failed\n"); 814 return ret; 815 } 816 817 /* set the firmware mode to STA/IBSS/AP */ 818 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 819 if (ret) { 820 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 821 return ret; 822 } 823 824 /* TODO following parameters need to be re-visited. */ 825 /* num_device */ 826 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 827 /* Firmware mode */ 828 /* FIXME: Why FW_MODE_AP ??.*/ 829 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 830 /* mac_addr_method */ 831 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 832 /* firmware_bridge */ 833 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 834 /* fwsubmode */ 835 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 836 837 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 838 if (ret) { 839 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 840 return ret; 841 } 842 843 /* We do all byte-swapping on the host */ 844 ret = ath10k_bmi_write32(ar, hi_be, 0); 845 if (ret) { 846 ath10k_err(ar, "setting host CPU BE mode failed\n"); 847 return ret; 848 } 849 850 /* FW descriptor/Data swap flags */ 851 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 852 853 if (ret) { 854 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 855 return ret; 856 } 857 858 /* Some devices have a special sanity check that verifies the PCI 859 * Device ID is written to this host interest var. It is known to be 860 * required to boot QCA6164. 861 */ 862 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 863 ar->dev_id); 864 if (ret) { 865 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 866 return ret; 867 } 868 869 return 0; 870 } 871 872 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 873 const char *dir, 874 const char *file) 875 { 876 char filename[100]; 877 const struct firmware *fw; 878 int ret; 879 880 if (file == NULL) 881 return ERR_PTR(-ENOENT); 882 883 if (dir == NULL) 884 dir = "."; 885 886 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 887 ret = firmware_request_nowarn(&fw, filename, ar->dev); 888 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 889 filename, ret); 890 891 if (ret) 892 return ERR_PTR(ret); 893 894 return fw; 895 } 896 897 #if defined(__linux__) 898 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 899 #elif defined(__FreeBSD__) 900 static int ath10k_push_board_ext_data(struct ath10k *ar, const u8 *data, 901 #endif 902 size_t data_len) 903 { 904 u32 board_data_size = ar->hw_params.fw.board_size; 905 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 906 u32 board_ext_data_addr; 907 int ret; 908 909 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 910 if (ret) { 911 ath10k_err(ar, "could not read board ext data addr (%d)\n", 912 ret); 913 return ret; 914 } 915 916 ath10k_dbg(ar, ATH10K_DBG_BOOT, 917 "boot push board extended data addr 0x%x\n", 918 board_ext_data_addr); 919 920 if (board_ext_data_addr == 0) 921 return 0; 922 923 if (data_len != (board_data_size + board_ext_data_size)) { 924 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 925 data_len, board_data_size, board_ext_data_size); 926 return -EINVAL; 927 } 928 929 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 930 data + board_data_size, 931 board_ext_data_size); 932 if (ret) { 933 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 934 return ret; 935 } 936 937 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 938 (board_ext_data_size << 16) | 1); 939 if (ret) { 940 ath10k_err(ar, "could not write board ext data bit (%d)\n", 941 ret); 942 return ret; 943 } 944 945 return 0; 946 } 947 948 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 949 { 950 u32 result, address; 951 u8 board_id, chip_id; 952 bool ext_bid_support; 953 int ret, bmi_board_id_param; 954 955 address = ar->hw_params.patch_load_addr; 956 957 if (!ar->normal_mode_fw.fw_file.otp_data || 958 !ar->normal_mode_fw.fw_file.otp_len) { 959 ath10k_warn(ar, 960 "failed to retrieve board id because of invalid otp\n"); 961 return -ENODATA; 962 } 963 964 if (ar->id.bmi_ids_valid) { 965 ath10k_dbg(ar, ATH10K_DBG_BOOT, 966 "boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n", 967 ar->id.bmi_board_id, ar->id.bmi_chip_id); 968 goto skip_otp_download; 969 } 970 971 ath10k_dbg(ar, ATH10K_DBG_BOOT, 972 "boot upload otp to 0x%x len %zd for board id\n", 973 address, ar->normal_mode_fw.fw_file.otp_len); 974 975 ret = ath10k_bmi_fast_download(ar, address, 976 ar->normal_mode_fw.fw_file.otp_data, 977 ar->normal_mode_fw.fw_file.otp_len); 978 if (ret) { 979 ath10k_err(ar, "could not write otp for board id check: %d\n", 980 ret); 981 return ret; 982 } 983 984 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 985 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE || 986 ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM) 987 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 988 else 989 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 990 991 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 992 if (ret) { 993 ath10k_err(ar, "could not execute otp for board id check: %d\n", 994 ret); 995 return ret; 996 } 997 998 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 999 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 1000 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT); 1001 1002 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1003 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n", 1004 result, board_id, chip_id, ext_bid_support); 1005 1006 ar->id.ext_bid_supported = ext_bid_support; 1007 1008 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 1009 (board_id == 0)) { 1010 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1011 "board id does not exist in otp, ignore it\n"); 1012 return -EOPNOTSUPP; 1013 } 1014 1015 ar->id.bmi_ids_valid = true; 1016 ar->id.bmi_board_id = board_id; 1017 ar->id.bmi_chip_id = chip_id; 1018 1019 skip_otp_download: 1020 1021 return 0; 1022 } 1023 1024 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 1025 { 1026 struct ath10k *ar = data; 1027 const char *bdf_ext; 1028 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 1029 u8 bdf_enabled; 1030 int i; 1031 1032 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 1033 return; 1034 1035 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 1036 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1037 "wrong smbios bdf ext type length (%d).\n", 1038 hdr->length); 1039 return; 1040 } 1041 1042 #if defined(__linux__) 1043 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 1044 #elif defined(__FreeBSD__) 1045 bdf_enabled = *((const u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 1046 #endif 1047 if (!bdf_enabled) { 1048 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 1049 return; 1050 } 1051 1052 /* Only one string exists (per spec) */ 1053 #if defined(__linux__) 1054 bdf_ext = (char *)hdr + hdr->length; 1055 #elif defined(__FreeBSD__) 1056 bdf_ext = (const char *)hdr + hdr->length; 1057 #endif 1058 1059 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 1060 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1061 "bdf variant magic does not match.\n"); 1062 return; 1063 } 1064 1065 for (i = 0; i < strlen(bdf_ext); i++) { 1066 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 1067 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1068 "bdf variant name contains non ascii chars.\n"); 1069 return; 1070 } 1071 } 1072 1073 /* Copy extension name without magic suffix */ 1074 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 1075 sizeof(ar->id.bdf_ext)) < 0) { 1076 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1077 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 1078 bdf_ext); 1079 return; 1080 } 1081 1082 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1083 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 1084 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 1085 } 1086 1087 static int ath10k_core_check_smbios(struct ath10k *ar) 1088 { 1089 ar->id.bdf_ext[0] = '\0'; 1090 dmi_walk(ath10k_core_check_bdfext, ar); 1091 1092 if (ar->id.bdf_ext[0] == '\0') 1093 return -ENODATA; 1094 1095 return 0; 1096 } 1097 1098 int ath10k_core_check_dt(struct ath10k *ar) 1099 { 1100 #if defined(__linux__) || (defined(__FreeBSD__) && defined(CONFIG_OF)) 1101 struct device_node *node; 1102 const char *variant = NULL; 1103 1104 node = ar->dev->of_node; 1105 if (!node) 1106 return -ENOENT; 1107 1108 of_property_read_string(node, "qcom,ath10k-calibration-variant", 1109 &variant); 1110 if (!variant) 1111 return -ENODATA; 1112 1113 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) 1114 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1115 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 1116 variant); 1117 1118 return 0; 1119 #else 1120 return -ENOENT; 1121 #endif 1122 } 1123 EXPORT_SYMBOL(ath10k_core_check_dt); 1124 1125 static int ath10k_download_fw(struct ath10k *ar) 1126 { 1127 u32 address, data_len; 1128 const void *data; 1129 int ret; 1130 struct pm_qos_request latency_qos; 1131 1132 address = ar->hw_params.patch_load_addr; 1133 1134 data = ar->running_fw->fw_file.firmware_data; 1135 data_len = ar->running_fw->fw_file.firmware_len; 1136 1137 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 1138 if (ret) { 1139 ath10k_err(ar, "failed to configure fw code swap: %d\n", 1140 ret); 1141 return ret; 1142 } 1143 1144 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1145 "boot uploading firmware image %pK len %d\n", 1146 data, data_len); 1147 1148 /* Check if device supports to download firmware via 1149 * diag copy engine. Downloading firmware via diag CE 1150 * greatly reduces the time to download firmware. 1151 */ 1152 if (ar->hw_params.fw_diag_ce_download) { 1153 ret = ath10k_hw_diag_fast_download(ar, address, 1154 data, data_len); 1155 if (ret == 0) 1156 /* firmware upload via diag ce was successful */ 1157 return 0; 1158 1159 ath10k_warn(ar, 1160 "failed to upload firmware via diag ce, trying BMI: %d", 1161 ret); 1162 } 1163 1164 memset(&latency_qos, 0, sizeof(latency_qos)); 1165 cpu_latency_qos_add_request(&latency_qos, 0); 1166 1167 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 1168 1169 cpu_latency_qos_remove_request(&latency_qos); 1170 1171 return ret; 1172 } 1173 1174 void ath10k_core_free_board_files(struct ath10k *ar) 1175 { 1176 if (!IS_ERR(ar->normal_mode_fw.board)) 1177 release_firmware(ar->normal_mode_fw.board); 1178 1179 if (!IS_ERR(ar->normal_mode_fw.ext_board)) 1180 release_firmware(ar->normal_mode_fw.ext_board); 1181 1182 ar->normal_mode_fw.board = NULL; 1183 ar->normal_mode_fw.board_data = NULL; 1184 ar->normal_mode_fw.board_len = 0; 1185 ar->normal_mode_fw.ext_board = NULL; 1186 ar->normal_mode_fw.ext_board_data = NULL; 1187 ar->normal_mode_fw.ext_board_len = 0; 1188 } 1189 EXPORT_SYMBOL(ath10k_core_free_board_files); 1190 1191 static void ath10k_core_free_firmware_files(struct ath10k *ar) 1192 { 1193 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 1194 release_firmware(ar->normal_mode_fw.fw_file.firmware); 1195 1196 if (!IS_ERR(ar->cal_file)) 1197 release_firmware(ar->cal_file); 1198 1199 if (!IS_ERR(ar->pre_cal_file)) 1200 release_firmware(ar->pre_cal_file); 1201 1202 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 1203 1204 ar->normal_mode_fw.fw_file.otp_data = NULL; 1205 ar->normal_mode_fw.fw_file.otp_len = 0; 1206 1207 ar->normal_mode_fw.fw_file.firmware = NULL; 1208 ar->normal_mode_fw.fw_file.firmware_data = NULL; 1209 ar->normal_mode_fw.fw_file.firmware_len = 0; 1210 1211 ar->cal_file = NULL; 1212 ar->pre_cal_file = NULL; 1213 } 1214 1215 static int ath10k_fetch_cal_file(struct ath10k *ar) 1216 { 1217 char filename[100]; 1218 1219 /* pre-cal-<bus>-<id>.bin */ 1220 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 1221 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1222 1223 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1224 if (!IS_ERR(ar->pre_cal_file)) 1225 goto success; 1226 1227 /* cal-<bus>-<id>.bin */ 1228 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1229 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1230 1231 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1232 if (IS_ERR(ar->cal_file)) 1233 /* calibration file is optional, don't print any warnings */ 1234 return PTR_ERR(ar->cal_file); 1235 success: 1236 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1237 ATH10K_FW_DIR, filename); 1238 1239 return 0; 1240 } 1241 1242 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type) 1243 { 1244 const struct firmware *fw; 1245 1246 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1247 if (!ar->hw_params.fw.board) { 1248 ath10k_err(ar, "failed to find board file fw entry\n"); 1249 return -EINVAL; 1250 } 1251 1252 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1253 ar->hw_params.fw.dir, 1254 ar->hw_params.fw.board); 1255 if (IS_ERR(ar->normal_mode_fw.board)) 1256 return PTR_ERR(ar->normal_mode_fw.board); 1257 1258 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1259 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1260 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1261 if (!ar->hw_params.fw.eboard) { 1262 ath10k_err(ar, "failed to find eboard file fw entry\n"); 1263 return -EINVAL; 1264 } 1265 1266 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1267 ar->hw_params.fw.eboard); 1268 ar->normal_mode_fw.ext_board = fw; 1269 if (IS_ERR(ar->normal_mode_fw.ext_board)) 1270 return PTR_ERR(ar->normal_mode_fw.ext_board); 1271 1272 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data; 1273 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size; 1274 } 1275 1276 return 0; 1277 } 1278 1279 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1280 #if defined(__linux__) 1281 const void *buf, size_t buf_len, 1282 #elif defined(__FreeBSD__) 1283 const u8 *buf, size_t buf_len, 1284 #endif 1285 const char *boardname, 1286 int bd_ie_type) 1287 { 1288 const struct ath10k_fw_ie *hdr; 1289 bool name_match_found; 1290 int ret, board_ie_id; 1291 size_t board_ie_len; 1292 const void *board_ie_data; 1293 1294 name_match_found = false; 1295 1296 /* go through ATH10K_BD_IE_BOARD_ elements */ 1297 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1298 #if defined(__linux__) 1299 hdr = buf; 1300 #elif defined(__FreeBSD__) 1301 hdr = (const void *)buf; 1302 #endif 1303 board_ie_id = le32_to_cpu(hdr->id); 1304 board_ie_len = le32_to_cpu(hdr->len); 1305 board_ie_data = hdr->data; 1306 1307 buf_len -= sizeof(*hdr); 1308 buf += sizeof(*hdr); 1309 1310 if (buf_len < ALIGN(board_ie_len, 4)) { 1311 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1312 buf_len, ALIGN(board_ie_len, 4)); 1313 ret = -EINVAL; 1314 goto out; 1315 } 1316 1317 switch (board_ie_id) { 1318 case ATH10K_BD_IE_BOARD_NAME: 1319 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1320 board_ie_data, board_ie_len); 1321 1322 if (board_ie_len != strlen(boardname)) 1323 break; 1324 1325 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1326 if (ret) 1327 break; 1328 1329 name_match_found = true; 1330 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1331 "boot found match for name '%s'", 1332 boardname); 1333 break; 1334 case ATH10K_BD_IE_BOARD_DATA: 1335 if (!name_match_found) 1336 /* no match found */ 1337 break; 1338 1339 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1340 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1341 "boot found board data for '%s'", 1342 boardname); 1343 1344 ar->normal_mode_fw.board_data = board_ie_data; 1345 ar->normal_mode_fw.board_len = board_ie_len; 1346 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1347 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1348 "boot found eboard data for '%s'", 1349 boardname); 1350 1351 ar->normal_mode_fw.ext_board_data = board_ie_data; 1352 ar->normal_mode_fw.ext_board_len = board_ie_len; 1353 } 1354 1355 ret = 0; 1356 goto out; 1357 default: 1358 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1359 board_ie_id); 1360 break; 1361 } 1362 1363 /* jump over the padding */ 1364 board_ie_len = ALIGN(board_ie_len, 4); 1365 1366 buf_len -= board_ie_len; 1367 buf += board_ie_len; 1368 } 1369 1370 /* no match found */ 1371 ret = -ENOENT; 1372 1373 out: 1374 return ret; 1375 } 1376 1377 static int ath10k_core_search_bd(struct ath10k *ar, 1378 const char *boardname, 1379 const u8 *data, 1380 size_t len) 1381 { 1382 size_t ie_len; 1383 #if defined(__linux__) 1384 struct ath10k_fw_ie *hdr; 1385 #elif defined(__FreeBSD__) 1386 const struct ath10k_fw_ie *hdr; 1387 #endif 1388 int ret = -ENOENT, ie_id; 1389 1390 while (len > sizeof(struct ath10k_fw_ie)) { 1391 #if defined(__linux__) 1392 hdr = (struct ath10k_fw_ie *)data; 1393 #elif defined(__FreeBSD__) 1394 hdr = (const struct ath10k_fw_ie *)data; 1395 #endif 1396 ie_id = le32_to_cpu(hdr->id); 1397 ie_len = le32_to_cpu(hdr->len); 1398 1399 len -= sizeof(*hdr); 1400 data = hdr->data; 1401 1402 if (len < ALIGN(ie_len, 4)) { 1403 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1404 ie_id, ie_len, len); 1405 return -EINVAL; 1406 } 1407 1408 switch (ie_id) { 1409 case ATH10K_BD_IE_BOARD: 1410 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1411 boardname, 1412 ATH10K_BD_IE_BOARD); 1413 if (ret == -ENOENT) 1414 /* no match found, continue */ 1415 break; 1416 1417 /* either found or error, so stop searching */ 1418 goto out; 1419 case ATH10K_BD_IE_BOARD_EXT: 1420 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1421 boardname, 1422 ATH10K_BD_IE_BOARD_EXT); 1423 if (ret == -ENOENT) 1424 /* no match found, continue */ 1425 break; 1426 1427 /* either found or error, so stop searching */ 1428 goto out; 1429 } 1430 1431 /* jump over the padding */ 1432 ie_len = ALIGN(ie_len, 4); 1433 1434 len -= ie_len; 1435 data += ie_len; 1436 } 1437 1438 out: 1439 /* return result of parse_bd_ie_board() or -ENOENT */ 1440 return ret; 1441 } 1442 1443 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1444 const char *boardname, 1445 const char *fallback_boardname1, 1446 const char *fallback_boardname2, 1447 const char *filename) 1448 { 1449 size_t len, magic_len; 1450 const u8 *data; 1451 int ret; 1452 1453 /* Skip if already fetched during board data download */ 1454 if (!ar->normal_mode_fw.board) 1455 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1456 ar->hw_params.fw.dir, 1457 filename); 1458 if (IS_ERR(ar->normal_mode_fw.board)) 1459 return PTR_ERR(ar->normal_mode_fw.board); 1460 1461 data = ar->normal_mode_fw.board->data; 1462 len = ar->normal_mode_fw.board->size; 1463 1464 /* magic has extra null byte padded */ 1465 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1466 if (len < magic_len) { 1467 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1468 ar->hw_params.fw.dir, filename, len); 1469 ret = -EINVAL; 1470 goto err; 1471 } 1472 1473 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1474 ath10k_err(ar, "found invalid board magic\n"); 1475 ret = -EINVAL; 1476 goto err; 1477 } 1478 1479 /* magic is padded to 4 bytes */ 1480 magic_len = ALIGN(magic_len, 4); 1481 if (len < magic_len) { 1482 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1483 ar->hw_params.fw.dir, filename, len); 1484 ret = -EINVAL; 1485 goto err; 1486 } 1487 1488 data += magic_len; 1489 len -= magic_len; 1490 1491 /* attempt to find boardname in the IE list */ 1492 ret = ath10k_core_search_bd(ar, boardname, data, len); 1493 1494 /* if we didn't find it and have a fallback name, try that */ 1495 if (ret == -ENOENT && fallback_boardname1) 1496 ret = ath10k_core_search_bd(ar, fallback_boardname1, data, len); 1497 1498 if (ret == -ENOENT && fallback_boardname2) 1499 ret = ath10k_core_search_bd(ar, fallback_boardname2, data, len); 1500 1501 if (ret == -ENOENT) { 1502 ath10k_err(ar, 1503 "failed to fetch board data for %s from %s/%s\n", 1504 boardname, ar->hw_params.fw.dir, filename); 1505 ret = -ENODATA; 1506 } 1507 1508 if (ret) 1509 goto err; 1510 1511 return 0; 1512 1513 err: 1514 ath10k_core_free_board_files(ar); 1515 return ret; 1516 } 1517 1518 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1519 size_t name_len, bool with_variant, 1520 bool with_chip_id) 1521 { 1522 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1523 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1524 1525 if (with_variant && ar->id.bdf_ext[0] != '\0') 1526 scnprintf(variant, sizeof(variant), ",variant=%s", 1527 ar->id.bdf_ext); 1528 1529 if (ar->id.bmi_ids_valid) { 1530 scnprintf(name, name_len, 1531 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s", 1532 ath10k_bus_str(ar->hif.bus), 1533 ar->id.bmi_chip_id, 1534 ar->id.bmi_board_id, variant); 1535 goto out; 1536 } 1537 1538 if (ar->id.qmi_ids_valid) { 1539 if (with_chip_id) 1540 scnprintf(name, name_len, 1541 "bus=%s,qmi-board-id=%x,qmi-chip-id=%x%s", 1542 ath10k_bus_str(ar->hif.bus), 1543 ar->id.qmi_board_id, ar->id.qmi_chip_id, 1544 variant); 1545 else 1546 scnprintf(name, name_len, 1547 "bus=%s,qmi-board-id=%x", 1548 ath10k_bus_str(ar->hif.bus), 1549 ar->id.qmi_board_id); 1550 goto out; 1551 } 1552 1553 scnprintf(name, name_len, 1554 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1555 ath10k_bus_str(ar->hif.bus), 1556 ar->id.vendor, ar->id.device, 1557 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1558 out: 1559 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1560 1561 return 0; 1562 } 1563 1564 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name, 1565 size_t name_len) 1566 { 1567 if (ar->id.bmi_ids_valid) { 1568 scnprintf(name, name_len, 1569 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d", 1570 ath10k_bus_str(ar->hif.bus), 1571 ar->id.bmi_chip_id, 1572 ar->id.bmi_eboard_id); 1573 1574 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name); 1575 return 0; 1576 } 1577 /* Fallback if returned board id is zero */ 1578 return -1; 1579 } 1580 1581 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type) 1582 { 1583 char boardname[100], fallback_boardname1[100], fallback_boardname2[100]; 1584 int ret; 1585 1586 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1587 /* With variant and chip id */ 1588 ret = ath10k_core_create_board_name(ar, boardname, 1589 sizeof(boardname), true, 1590 true); 1591 if (ret) { 1592 ath10k_err(ar, "failed to create board name: %d", ret); 1593 return ret; 1594 } 1595 1596 /* Without variant and only chip-id */ 1597 ret = ath10k_core_create_board_name(ar, fallback_boardname1, 1598 sizeof(boardname), false, 1599 true); 1600 if (ret) { 1601 ath10k_err(ar, "failed to create 1st fallback board name: %d", 1602 ret); 1603 return ret; 1604 } 1605 1606 /* Without variant and without chip-id */ 1607 ret = ath10k_core_create_board_name(ar, fallback_boardname2, 1608 sizeof(boardname), false, 1609 false); 1610 if (ret) { 1611 ath10k_err(ar, "failed to create 2nd fallback board name: %d", 1612 ret); 1613 return ret; 1614 } 1615 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1616 ret = ath10k_core_create_eboard_name(ar, boardname, 1617 sizeof(boardname)); 1618 if (ret) { 1619 ath10k_err(ar, "fallback to eboard.bin since board id 0"); 1620 goto fallback; 1621 } 1622 } 1623 1624 ar->bd_api = 2; 1625 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1626 fallback_boardname1, 1627 fallback_boardname2, 1628 ATH10K_BOARD_API2_FILE); 1629 if (!ret) 1630 goto success; 1631 1632 fallback: 1633 ar->bd_api = 1; 1634 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type); 1635 if (ret) { 1636 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1637 ar->hw_params.fw.dir); 1638 return ret; 1639 } 1640 1641 success: 1642 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1643 return 0; 1644 } 1645 EXPORT_SYMBOL(ath10k_core_fetch_board_file); 1646 1647 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar) 1648 { 1649 u32 result, address; 1650 u8 ext_board_id; 1651 int ret; 1652 1653 address = ar->hw_params.patch_load_addr; 1654 1655 if (!ar->normal_mode_fw.fw_file.otp_data || 1656 !ar->normal_mode_fw.fw_file.otp_len) { 1657 ath10k_warn(ar, 1658 "failed to retrieve extended board id due to otp binary missing\n"); 1659 return -ENODATA; 1660 } 1661 1662 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1663 "boot upload otp to 0x%x len %zd for ext board id\n", 1664 address, ar->normal_mode_fw.fw_file.otp_len); 1665 1666 ret = ath10k_bmi_fast_download(ar, address, 1667 ar->normal_mode_fw.fw_file.otp_data, 1668 ar->normal_mode_fw.fw_file.otp_len); 1669 if (ret) { 1670 ath10k_err(ar, "could not write otp for ext board id check: %d\n", 1671 ret); 1672 return ret; 1673 } 1674 1675 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result); 1676 if (ret) { 1677 ath10k_err(ar, "could not execute otp for ext board id check: %d\n", 1678 ret); 1679 return ret; 1680 } 1681 1682 if (!result) { 1683 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1684 "ext board id does not exist in otp, ignore it\n"); 1685 return -EOPNOTSUPP; 1686 } 1687 1688 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK; 1689 1690 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1691 "boot get otp ext board id result 0x%08x ext_board_id %d\n", 1692 result, ext_board_id); 1693 1694 ar->id.bmi_eboard_id = ext_board_id; 1695 1696 return 0; 1697 } 1698 1699 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 1700 size_t data_len) 1701 { 1702 u32 board_data_size = ar->hw_params.fw.board_size; 1703 u32 eboard_data_size = ar->hw_params.fw.ext_board_size; 1704 u32 board_address; 1705 u32 ext_board_address; 1706 int ret; 1707 1708 ret = ath10k_push_board_ext_data(ar, data, data_len); 1709 if (ret) { 1710 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 1711 goto exit; 1712 } 1713 1714 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address); 1715 if (ret) { 1716 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 1717 goto exit; 1718 } 1719 1720 ret = ath10k_bmi_write_memory(ar, board_address, data, 1721 min_t(u32, board_data_size, 1722 data_len)); 1723 if (ret) { 1724 ath10k_err(ar, "could not write board data (%d)\n", ret); 1725 goto exit; 1726 } 1727 1728 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 1729 if (ret) { 1730 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 1731 goto exit; 1732 } 1733 1734 if (!ar->id.ext_bid_supported) 1735 goto exit; 1736 1737 /* Extended board data download */ 1738 ret = ath10k_core_get_ext_board_id_from_otp(ar); 1739 if (ret == -EOPNOTSUPP) { 1740 /* Not fetching ext_board_data if ext board id is 0 */ 1741 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n"); 1742 return 0; 1743 } else if (ret) { 1744 ath10k_err(ar, "failed to get extended board id: %d\n", ret); 1745 goto exit; 1746 } 1747 1748 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT); 1749 if (ret) 1750 goto exit; 1751 1752 if (ar->normal_mode_fw.ext_board_data) { 1753 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET; 1754 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1755 "boot writing ext board data to addr 0x%x", 1756 ext_board_address); 1757 ret = ath10k_bmi_write_memory(ar, ext_board_address, 1758 ar->normal_mode_fw.ext_board_data, 1759 min_t(u32, eboard_data_size, data_len)); 1760 if (ret) 1761 ath10k_err(ar, "failed to write ext board data: %d\n", ret); 1762 } 1763 1764 exit: 1765 return ret; 1766 } 1767 1768 static int ath10k_download_and_run_otp(struct ath10k *ar) 1769 { 1770 u32 result, address = ar->hw_params.patch_load_addr; 1771 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 1772 int ret; 1773 1774 ret = ath10k_download_board_data(ar, 1775 ar->running_fw->board_data, 1776 ar->running_fw->board_len); 1777 if (ret) { 1778 ath10k_err(ar, "failed to download board data: %d\n", ret); 1779 return ret; 1780 } 1781 1782 /* OTP is optional */ 1783 1784 if (!ar->running_fw->fw_file.otp_data || 1785 !ar->running_fw->fw_file.otp_len) { 1786 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 1787 ar->running_fw->fw_file.otp_data, 1788 ar->running_fw->fw_file.otp_len); 1789 return 0; 1790 } 1791 1792 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 1793 address, ar->running_fw->fw_file.otp_len); 1794 1795 ret = ath10k_bmi_fast_download(ar, address, 1796 ar->running_fw->fw_file.otp_data, 1797 ar->running_fw->fw_file.otp_len); 1798 if (ret) { 1799 ath10k_err(ar, "could not write otp (%d)\n", ret); 1800 return ret; 1801 } 1802 1803 /* As of now pre-cal is valid for 10_4 variants */ 1804 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 1805 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE || 1806 ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM) 1807 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 1808 1809 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 1810 if (ret) { 1811 ath10k_err(ar, "could not execute otp (%d)\n", ret); 1812 return ret; 1813 } 1814 1815 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 1816 1817 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 1818 ar->running_fw->fw_file.fw_features)) && 1819 result != 0) { 1820 ath10k_err(ar, "otp calibration failed: %d", result); 1821 return -EINVAL; 1822 } 1823 1824 return 0; 1825 } 1826 1827 static int ath10k_download_cal_file(struct ath10k *ar, 1828 const struct firmware *file) 1829 { 1830 int ret; 1831 1832 if (!file) 1833 return -ENOENT; 1834 1835 if (IS_ERR(file)) 1836 return PTR_ERR(file); 1837 1838 ret = ath10k_download_board_data(ar, file->data, file->size); 1839 if (ret) { 1840 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 1841 return ret; 1842 } 1843 1844 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 1845 1846 return 0; 1847 } 1848 1849 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 1850 { 1851 #if defined(__linux__) || (defined(__FreeBSD__) && defined(CONFIG_OF)) 1852 struct device_node *node; 1853 int data_len; 1854 void *data; 1855 int ret; 1856 1857 node = ar->dev->of_node; 1858 if (!node) 1859 /* Device Tree is optional, don't print any warnings if 1860 * there's no node for ath10k. 1861 */ 1862 return -ENOENT; 1863 1864 if (!of_get_property(node, dt_name, &data_len)) { 1865 /* The calibration data node is optional */ 1866 return -ENOENT; 1867 } 1868 1869 if (data_len != ar->hw_params.cal_data_len) { 1870 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 1871 data_len); 1872 ret = -EMSGSIZE; 1873 goto out; 1874 } 1875 1876 data = kmalloc(data_len, GFP_KERNEL); 1877 if (!data) { 1878 ret = -ENOMEM; 1879 goto out; 1880 } 1881 1882 ret = of_property_read_u8_array(node, dt_name, data, data_len); 1883 if (ret) { 1884 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 1885 ret); 1886 goto out_free; 1887 } 1888 1889 ret = ath10k_download_board_data(ar, data, data_len); 1890 if (ret) { 1891 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 1892 ret); 1893 goto out_free; 1894 } 1895 1896 ret = 0; 1897 1898 out_free: 1899 kfree(data); 1900 1901 out: 1902 return ret; 1903 #else 1904 return -ENOENT; 1905 #endif 1906 } 1907 1908 static int ath10k_download_cal_eeprom(struct ath10k *ar) 1909 { 1910 size_t data_len; 1911 void *data = NULL; 1912 int ret; 1913 1914 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 1915 if (ret) { 1916 if (ret != -EOPNOTSUPP) 1917 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 1918 ret); 1919 goto out_free; 1920 } 1921 1922 ret = ath10k_download_board_data(ar, data, data_len); 1923 if (ret) { 1924 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 1925 ret); 1926 goto out_free; 1927 } 1928 1929 ret = 0; 1930 1931 out_free: 1932 kfree(data); 1933 1934 return ret; 1935 } 1936 1937 static int ath10k_download_cal_nvmem(struct ath10k *ar, const char *cell_name) 1938 { 1939 #if defined(__linux__) 1940 struct nvmem_cell *cell; 1941 void *buf; 1942 size_t len; 1943 #endif 1944 int ret; 1945 1946 #if defined(__linux__) 1947 cell = devm_nvmem_cell_get(ar->dev, cell_name); 1948 if (IS_ERR(cell)) { 1949 ret = PTR_ERR(cell); 1950 return ret; 1951 } 1952 1953 buf = nvmem_cell_read(cell, &len); 1954 if (IS_ERR(buf)) 1955 return PTR_ERR(buf); 1956 1957 if (ar->hw_params.cal_data_len != len) { 1958 kfree(buf); 1959 ath10k_warn(ar, "invalid calibration data length in nvmem-cell '%s': %zu != %u\n", 1960 cell_name, len, ar->hw_params.cal_data_len); 1961 return -EMSGSIZE; 1962 } 1963 1964 ret = ath10k_download_board_data(ar, buf, len); 1965 kfree(buf); 1966 #elif defined(__FreeBSD__) 1967 ret = -ENXIO; 1968 #endif 1969 if (ret) 1970 ath10k_warn(ar, "failed to download calibration data from nvmem-cell '%s': %d\n", 1971 cell_name, ret); 1972 1973 return ret; 1974 } 1975 1976 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1977 struct ath10k_fw_file *fw_file) 1978 { 1979 size_t magic_len, len, ie_len; 1980 int ie_id, i, index, bit, ret; 1981 #if defined(__linux__) 1982 struct ath10k_fw_ie *hdr; 1983 #elif defined(__FreeBSD__) 1984 const struct ath10k_fw_ie *hdr; 1985 #endif 1986 const u8 *data; 1987 #if defined(__linux__) 1988 __le32 *timestamp, *version; 1989 #elif defined(__FreeBSD__) 1990 const __le32 *timestamp, *version; 1991 #endif 1992 1993 /* first fetch the firmware file (firmware-*.bin) */ 1994 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1995 name); 1996 if (IS_ERR(fw_file->firmware)) 1997 return PTR_ERR(fw_file->firmware); 1998 1999 data = fw_file->firmware->data; 2000 len = fw_file->firmware->size; 2001 2002 /* magic also includes the null byte, check that as well */ 2003 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 2004 2005 if (len < magic_len) { 2006 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 2007 ar->hw_params.fw.dir, name, len); 2008 ret = -EINVAL; 2009 goto err; 2010 } 2011 2012 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 2013 ath10k_err(ar, "invalid firmware magic\n"); 2014 ret = -EINVAL; 2015 goto err; 2016 } 2017 2018 /* jump over the padding */ 2019 magic_len = ALIGN(magic_len, 4); 2020 2021 len -= magic_len; 2022 data += magic_len; 2023 2024 /* loop elements */ 2025 while (len > sizeof(struct ath10k_fw_ie)) { 2026 #if defined(__linux__) 2027 hdr = (struct ath10k_fw_ie *)data; 2028 #elif defined(__FreeBSD__) 2029 hdr = (const struct ath10k_fw_ie *)data; 2030 #endif 2031 2032 ie_id = le32_to_cpu(hdr->id); 2033 ie_len = le32_to_cpu(hdr->len); 2034 2035 len -= sizeof(*hdr); 2036 data += sizeof(*hdr); 2037 2038 if (len < ie_len) { 2039 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 2040 ie_id, len, ie_len); 2041 ret = -EINVAL; 2042 goto err; 2043 } 2044 2045 switch (ie_id) { 2046 case ATH10K_FW_IE_FW_VERSION: 2047 if (ie_len > sizeof(fw_file->fw_version) - 1) 2048 break; 2049 2050 memcpy(fw_file->fw_version, data, ie_len); 2051 fw_file->fw_version[ie_len] = '\0'; 2052 2053 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2054 "found fw version %s\n", 2055 fw_file->fw_version); 2056 break; 2057 case ATH10K_FW_IE_TIMESTAMP: 2058 if (ie_len != sizeof(u32)) 2059 break; 2060 2061 #if defined(__linux__) 2062 timestamp = (__le32 *)data; 2063 #elif defined(__FreeBSD__) 2064 timestamp = (const __le32 *)data; 2065 #endif 2066 2067 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 2068 le32_to_cpup(timestamp)); 2069 break; 2070 case ATH10K_FW_IE_FEATURES: 2071 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2072 "found firmware features ie (%zd B)\n", 2073 ie_len); 2074 2075 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 2076 index = i / 8; 2077 bit = i % 8; 2078 2079 if (index == ie_len) 2080 break; 2081 2082 if (data[index] & (1 << bit)) { 2083 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2084 "Enabling feature bit: %i\n", 2085 i); 2086 __set_bit(i, fw_file->fw_features); 2087 } 2088 } 2089 2090 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 2091 fw_file->fw_features, 2092 sizeof(fw_file->fw_features)); 2093 break; 2094 case ATH10K_FW_IE_FW_IMAGE: 2095 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2096 "found fw image ie (%zd B)\n", 2097 ie_len); 2098 2099 fw_file->firmware_data = data; 2100 fw_file->firmware_len = ie_len; 2101 2102 break; 2103 case ATH10K_FW_IE_OTP_IMAGE: 2104 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2105 "found otp image ie (%zd B)\n", 2106 ie_len); 2107 2108 fw_file->otp_data = data; 2109 fw_file->otp_len = ie_len; 2110 2111 break; 2112 case ATH10K_FW_IE_WMI_OP_VERSION: 2113 if (ie_len != sizeof(u32)) 2114 break; 2115 2116 #if defined(__linux__) 2117 version = (__le32 *)data; 2118 #elif defined(__FreeBSD__) 2119 version = (const __le32 *)data; 2120 #endif 2121 2122 fw_file->wmi_op_version = le32_to_cpup(version); 2123 2124 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 2125 fw_file->wmi_op_version); 2126 break; 2127 case ATH10K_FW_IE_HTT_OP_VERSION: 2128 if (ie_len != sizeof(u32)) 2129 break; 2130 2131 #if defined(__linux__) 2132 version = (__le32 *)data; 2133 #elif defined(__FreeBSD__) 2134 version = (const __le32 *)data; 2135 #endif 2136 2137 fw_file->htt_op_version = le32_to_cpup(version); 2138 2139 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 2140 fw_file->htt_op_version); 2141 break; 2142 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 2143 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2144 "found fw code swap image ie (%zd B)\n", 2145 ie_len); 2146 fw_file->codeswap_data = data; 2147 fw_file->codeswap_len = ie_len; 2148 break; 2149 default: 2150 ath10k_warn(ar, "Unknown FW IE: %u\n", 2151 le32_to_cpu(hdr->id)); 2152 break; 2153 } 2154 2155 /* jump over the padding */ 2156 ie_len = ALIGN(ie_len, 4); 2157 2158 len -= ie_len; 2159 data += ie_len; 2160 } 2161 2162 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) && 2163 (!fw_file->firmware_data || !fw_file->firmware_len)) { 2164 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 2165 ar->hw_params.fw.dir, name); 2166 ret = -ENOMEDIUM; 2167 goto err; 2168 } 2169 2170 return 0; 2171 2172 err: 2173 ath10k_core_free_firmware_files(ar); 2174 return ret; 2175 } 2176 2177 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 2178 size_t fw_name_len, int fw_api) 2179 { 2180 switch (ar->hif.bus) { 2181 case ATH10K_BUS_SDIO: 2182 case ATH10K_BUS_USB: 2183 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 2184 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 2185 fw_api); 2186 break; 2187 case ATH10K_BUS_PCI: 2188 case ATH10K_BUS_AHB: 2189 case ATH10K_BUS_SNOC: 2190 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 2191 ATH10K_FW_FILE_BASE, fw_api); 2192 break; 2193 } 2194 } 2195 2196 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 2197 { 2198 int ret, i; 2199 char fw_name[100]; 2200 2201 /* calibration file is optional, don't check for any errors */ 2202 ath10k_fetch_cal_file(ar); 2203 2204 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 2205 ar->fw_api = i; 2206 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 2207 ar->fw_api); 2208 2209 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 2210 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 2211 &ar->normal_mode_fw.fw_file); 2212 if (!ret) 2213 goto success; 2214 } 2215 2216 /* we end up here if we couldn't fetch any firmware */ 2217 2218 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 2219 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 2220 ret); 2221 2222 return ret; 2223 2224 success: 2225 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 2226 2227 return 0; 2228 } 2229 2230 static int ath10k_core_pre_cal_download(struct ath10k *ar) 2231 { 2232 int ret; 2233 2234 ret = ath10k_download_cal_nvmem(ar, "pre-calibration"); 2235 if (ret == 0) { 2236 ar->cal_mode = ATH10K_PRE_CAL_MODE_NVMEM; 2237 goto success; 2238 } else if (ret == -EPROBE_DEFER) { 2239 return ret; 2240 } 2241 2242 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2243 "boot did not find a pre-calibration nvmem-cell, try file next: %d\n", 2244 ret); 2245 2246 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 2247 if (ret == 0) { 2248 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 2249 goto success; 2250 } 2251 2252 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2253 "boot did not find a pre calibration file, try DT next: %d\n", 2254 ret); 2255 2256 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 2257 if (ret) { 2258 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2259 "unable to load pre cal data from DT: %d\n", ret); 2260 return ret; 2261 } 2262 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 2263 2264 success: 2265 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2266 ath10k_cal_mode_str(ar->cal_mode)); 2267 2268 return 0; 2269 } 2270 2271 static int ath10k_core_pre_cal_config(struct ath10k *ar) 2272 { 2273 int ret; 2274 2275 ret = ath10k_core_pre_cal_download(ar); 2276 if (ret) { 2277 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2278 "failed to load pre cal data: %d\n", ret); 2279 return ret; 2280 } 2281 2282 ret = ath10k_core_get_board_id_from_otp(ar); 2283 if (ret) { 2284 ath10k_err(ar, "failed to get board id: %d\n", ret); 2285 return ret; 2286 } 2287 2288 ret = ath10k_download_and_run_otp(ar); 2289 if (ret) { 2290 ath10k_err(ar, "failed to run otp: %d\n", ret); 2291 return ret; 2292 } 2293 2294 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2295 "pre cal configuration done successfully\n"); 2296 2297 return 0; 2298 } 2299 2300 static int ath10k_download_cal_data(struct ath10k *ar) 2301 { 2302 int ret; 2303 2304 ret = ath10k_core_pre_cal_config(ar); 2305 if (ret == 0) 2306 return 0; 2307 2308 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2309 "pre cal download procedure failed, try cal file: %d\n", 2310 ret); 2311 2312 ret = ath10k_download_cal_nvmem(ar, "calibration"); 2313 if (ret == 0) { 2314 ar->cal_mode = ATH10K_CAL_MODE_NVMEM; 2315 goto done; 2316 } else if (ret == -EPROBE_DEFER) { 2317 return ret; 2318 } 2319 2320 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2321 "boot did not find a calibration nvmem-cell, try file next: %d\n", 2322 ret); 2323 2324 ret = ath10k_download_cal_file(ar, ar->cal_file); 2325 if (ret == 0) { 2326 ar->cal_mode = ATH10K_CAL_MODE_FILE; 2327 goto done; 2328 } 2329 2330 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2331 "boot did not find a calibration file, try DT next: %d\n", 2332 ret); 2333 2334 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 2335 if (ret == 0) { 2336 ar->cal_mode = ATH10K_CAL_MODE_DT; 2337 goto done; 2338 } 2339 2340 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2341 "boot did not find DT entry, try target EEPROM next: %d\n", 2342 ret); 2343 2344 ret = ath10k_download_cal_eeprom(ar); 2345 if (ret == 0) { 2346 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 2347 goto done; 2348 } 2349 2350 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2351 "boot did not find target EEPROM entry, try OTP next: %d\n", 2352 ret); 2353 2354 ret = ath10k_download_and_run_otp(ar); 2355 if (ret) { 2356 ath10k_err(ar, "failed to run otp: %d\n", ret); 2357 return ret; 2358 } 2359 2360 ar->cal_mode = ATH10K_CAL_MODE_OTP; 2361 2362 done: 2363 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2364 ath10k_cal_mode_str(ar->cal_mode)); 2365 return 0; 2366 } 2367 2368 static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar) 2369 { 2370 #if defined(__linux__) || (defined(__FreeBSD__) && defined(CONFIG_OF)) 2371 struct device_node *node; 2372 u8 coex_support = 0; 2373 int ret; 2374 2375 node = ar->dev->of_node; 2376 if (!node) 2377 goto out; 2378 2379 ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support); 2380 if (ret) { 2381 ar->coex_support = true; 2382 goto out; 2383 } 2384 2385 if (coex_support) { 2386 ar->coex_support = true; 2387 } else { 2388 ar->coex_support = false; 2389 ar->coex_gpio_pin = -1; 2390 goto out; 2391 } 2392 2393 ret = of_property_read_u32(node, "qcom,coexist-gpio-pin", 2394 &ar->coex_gpio_pin); 2395 if (ret) 2396 ar->coex_gpio_pin = -1; 2397 2398 out: 2399 #endif 2400 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n", 2401 ar->coex_support, ar->coex_gpio_pin); 2402 } 2403 2404 static int ath10k_init_uart(struct ath10k *ar) 2405 { 2406 int ret; 2407 2408 /* 2409 * Explicitly setting UART prints to zero as target turns it on 2410 * based on scratch registers. 2411 */ 2412 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 2413 if (ret) { 2414 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 2415 return ret; 2416 } 2417 2418 if (!uart_print) { 2419 if (ar->hw_params.uart_pin_workaround) { 2420 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 2421 ar->hw_params.uart_pin); 2422 if (ret) { 2423 ath10k_warn(ar, "failed to set UART TX pin: %d", 2424 ret); 2425 return ret; 2426 } 2427 } 2428 2429 return 0; 2430 } 2431 2432 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 2433 if (ret) { 2434 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2435 return ret; 2436 } 2437 2438 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 2439 if (ret) { 2440 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2441 return ret; 2442 } 2443 2444 /* Set the UART baud rate to 19200. */ 2445 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 2446 if (ret) { 2447 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 2448 return ret; 2449 } 2450 2451 ath10k_info(ar, "UART prints enabled\n"); 2452 return 0; 2453 } 2454 2455 static int ath10k_init_hw_params(struct ath10k *ar) 2456 { 2457 const struct ath10k_hw_params *hw_params; 2458 int i; 2459 2460 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 2461 hw_params = &ath10k_hw_params_list[i]; 2462 2463 if (hw_params->bus == ar->hif.bus && 2464 hw_params->id == ar->target_version && 2465 hw_params->dev_id == ar->dev_id) 2466 break; 2467 } 2468 2469 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 2470 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 2471 ar->target_version); 2472 return -EINVAL; 2473 } 2474 2475 ar->hw_params = *hw_params; 2476 2477 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 2478 ar->hw_params.name, ar->target_version); 2479 2480 return 0; 2481 } 2482 2483 void ath10k_core_start_recovery(struct ath10k *ar) 2484 { 2485 if (test_and_set_bit(ATH10K_FLAG_RESTARTING, &ar->dev_flags)) { 2486 ath10k_warn(ar, "already restarting\n"); 2487 return; 2488 } 2489 2490 queue_work(ar->workqueue, &ar->restart_work); 2491 } 2492 EXPORT_SYMBOL(ath10k_core_start_recovery); 2493 2494 void ath10k_core_napi_enable(struct ath10k *ar) 2495 { 2496 lockdep_assert_held(&ar->conf_mutex); 2497 2498 if (test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags)) 2499 return; 2500 2501 napi_enable(&ar->napi); 2502 set_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags); 2503 } 2504 EXPORT_SYMBOL(ath10k_core_napi_enable); 2505 2506 void ath10k_core_napi_sync_disable(struct ath10k *ar) 2507 { 2508 lockdep_assert_held(&ar->conf_mutex); 2509 2510 if (!test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags)) 2511 return; 2512 2513 napi_synchronize(&ar->napi); 2514 napi_disable(&ar->napi); 2515 clear_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags); 2516 } 2517 EXPORT_SYMBOL(ath10k_core_napi_sync_disable); 2518 2519 static void ath10k_core_restart(struct work_struct *work) 2520 { 2521 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 2522 int ret; 2523 2524 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2525 2526 /* Place a barrier to make sure the compiler doesn't reorder 2527 * CRASH_FLUSH and calling other functions. 2528 */ 2529 barrier(); 2530 2531 ieee80211_stop_queues(ar->hw); 2532 ath10k_drain_tx(ar); 2533 complete(&ar->scan.started); 2534 complete(&ar->scan.completed); 2535 complete(&ar->scan.on_channel); 2536 complete(&ar->offchan_tx_completed); 2537 complete(&ar->install_key_done); 2538 complete(&ar->vdev_setup_done); 2539 complete(&ar->vdev_delete_done); 2540 complete(&ar->thermal.wmi_sync); 2541 complete(&ar->bss_survey_done); 2542 wake_up(&ar->htt.empty_tx_wq); 2543 wake_up(&ar->wmi.tx_credits_wq); 2544 wake_up(&ar->peer_mapping_wq); 2545 2546 /* TODO: We can have one instance of cancelling coverage_class_work by 2547 * moving it to ath10k_halt(), so that both stop() and restart() would 2548 * call that but it takes conf_mutex() and if we call cancel_work_sync() 2549 * with conf_mutex it will deadlock. 2550 */ 2551 cancel_work_sync(&ar->set_coverage_class_work); 2552 2553 mutex_lock(&ar->conf_mutex); 2554 2555 switch (ar->state) { 2556 case ATH10K_STATE_ON: 2557 ar->state = ATH10K_STATE_RESTARTING; 2558 ath10k_halt(ar); 2559 ath10k_scan_finish(ar); 2560 ieee80211_restart_hw(ar->hw); 2561 break; 2562 case ATH10K_STATE_OFF: 2563 /* this can happen if driver is being unloaded 2564 * or if the crash happens during FW probing 2565 */ 2566 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 2567 break; 2568 case ATH10K_STATE_RESTARTING: 2569 /* hw restart might be requested from multiple places */ 2570 break; 2571 case ATH10K_STATE_RESTARTED: 2572 ar->state = ATH10K_STATE_WEDGED; 2573 fallthrough; 2574 case ATH10K_STATE_WEDGED: 2575 ath10k_warn(ar, "device is wedged, will not restart\n"); 2576 break; 2577 case ATH10K_STATE_UTF: 2578 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 2579 break; 2580 } 2581 2582 mutex_unlock(&ar->conf_mutex); 2583 2584 ret = ath10k_coredump_submit(ar); 2585 if (ret) 2586 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 2587 ret); 2588 2589 complete(&ar->driver_recovery); 2590 } 2591 2592 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 2593 { 2594 struct ath10k *ar = container_of(work, struct ath10k, 2595 set_coverage_class_work); 2596 2597 if (ar->hw_params.hw_ops->set_coverage_class) 2598 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 2599 } 2600 2601 static int ath10k_core_init_firmware_features(struct ath10k *ar) 2602 { 2603 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2604 int max_num_peers; 2605 2606 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 2607 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2608 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 2609 return -EINVAL; 2610 } 2611 2612 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 2613 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 2614 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 2615 return -EINVAL; 2616 } 2617 2618 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 2619 switch (ath10k_cryptmode_param) { 2620 case ATH10K_CRYPT_MODE_HW: 2621 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2622 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2623 break; 2624 case ATH10K_CRYPT_MODE_SW: 2625 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2626 fw_file->fw_features)) { 2627 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 2628 return -EINVAL; 2629 } 2630 2631 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2632 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2633 break; 2634 default: 2635 ath10k_info(ar, "invalid cryptmode: %d\n", 2636 ath10k_cryptmode_param); 2637 return -EINVAL; 2638 } 2639 2640 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 2641 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 2642 2643 if (rawmode) { 2644 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2645 fw_file->fw_features)) { 2646 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 2647 return -EINVAL; 2648 } 2649 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2650 } 2651 2652 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 2653 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 2654 2655 /* Workaround: 2656 * 2657 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 2658 * and causes enormous performance issues (malformed frames, 2659 * etc). 2660 * 2661 * Disabling A-MSDU makes RAW mode stable with heavy traffic 2662 * albeit a bit slower compared to regular operation. 2663 */ 2664 ar->htt.max_num_amsdu = 1; 2665 } 2666 2667 /* Backwards compatibility for firmwares without 2668 * ATH10K_FW_IE_WMI_OP_VERSION. 2669 */ 2670 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 2671 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2672 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 2673 fw_file->fw_features)) 2674 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 2675 else 2676 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 2677 } else { 2678 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 2679 } 2680 } 2681 2682 switch (fw_file->wmi_op_version) { 2683 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2684 max_num_peers = TARGET_NUM_PEERS; 2685 ar->max_num_stations = TARGET_NUM_STATIONS; 2686 ar->max_num_vdevs = TARGET_NUM_VDEVS; 2687 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 2688 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2689 WMI_STAT_PEER; 2690 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2691 break; 2692 case ATH10K_FW_WMI_OP_VERSION_10_1: 2693 case ATH10K_FW_WMI_OP_VERSION_10_2: 2694 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2695 if (ath10k_peer_stats_enabled(ar)) { 2696 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 2697 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 2698 } else { 2699 max_num_peers = TARGET_10X_NUM_PEERS; 2700 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 2701 } 2702 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 2703 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 2704 ar->fw_stats_req_mask = WMI_STAT_PEER; 2705 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2706 #if defined(CONFIG_FWLOG) 2707 ar->fwlog_max_moduleid = ATH10K_FWLOG_MODULE_ID_MAX_10_2_4; 2708 #endif 2709 break; 2710 case ATH10K_FW_WMI_OP_VERSION_TLV: 2711 max_num_peers = TARGET_TLV_NUM_PEERS; 2712 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 2713 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 2714 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 2715 if (ar->hif.bus == ATH10K_BUS_SDIO) 2716 ar->htt.max_num_pending_tx = 2717 TARGET_TLV_NUM_MSDU_DESC_HL; 2718 else 2719 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 2720 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 2721 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV | 2722 WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD; 2723 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2724 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC; 2725 break; 2726 case ATH10K_FW_WMI_OP_VERSION_10_4: 2727 max_num_peers = TARGET_10_4_NUM_PEERS; 2728 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 2729 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 2730 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 2731 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 2732 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 2733 WMI_10_4_STAT_PEER_EXTD | 2734 WMI_10_4_STAT_VDEV_EXTD; 2735 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 2736 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 2737 2738 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 2739 fw_file->fw_features)) 2740 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 2741 else 2742 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 2743 break; 2744 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2745 case ATH10K_FW_WMI_OP_VERSION_MAX: 2746 default: 2747 WARN_ON(1); 2748 return -EINVAL; 2749 } 2750 2751 if (ar->hw_params.num_peers) 2752 ar->max_num_peers = ar->hw_params.num_peers; 2753 else 2754 ar->max_num_peers = max_num_peers; 2755 2756 /* Backwards compatibility for firmwares without 2757 * ATH10K_FW_IE_HTT_OP_VERSION. 2758 */ 2759 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 2760 switch (fw_file->wmi_op_version) { 2761 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2762 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 2763 break; 2764 case ATH10K_FW_WMI_OP_VERSION_10_1: 2765 case ATH10K_FW_WMI_OP_VERSION_10_2: 2766 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2767 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 2768 break; 2769 case ATH10K_FW_WMI_OP_VERSION_TLV: 2770 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 2771 break; 2772 case ATH10K_FW_WMI_OP_VERSION_10_4: 2773 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2774 case ATH10K_FW_WMI_OP_VERSION_MAX: 2775 ath10k_err(ar, "htt op version not found from fw meta data"); 2776 return -EINVAL; 2777 } 2778 } 2779 2780 return 0; 2781 } 2782 2783 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 2784 { 2785 int ret; 2786 int vdev_id; 2787 int vdev_type; 2788 int vdev_subtype; 2789 const u8 *vdev_addr; 2790 2791 vdev_id = 0; 2792 vdev_type = WMI_VDEV_TYPE_STA; 2793 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 2794 vdev_addr = ar->mac_addr; 2795 2796 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 2797 vdev_addr); 2798 if (ret) { 2799 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 2800 return ret; 2801 } 2802 2803 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 2804 if (ret) { 2805 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 2806 return ret; 2807 } 2808 2809 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 2810 * serialized properly implicitly. 2811 * 2812 * Moreover (most) WMI commands have no explicit acknowledges. It is 2813 * possible to infer it implicitly by poking firmware with echo 2814 * command - getting a reply means all preceding comments have been 2815 * (mostly) processed. 2816 * 2817 * In case of vdev create/delete this is sufficient. 2818 * 2819 * Without this it's possible to end up with a race when HTT Rx ring is 2820 * started before vdev create/delete hack is complete allowing a short 2821 * window of opportunity to receive (and Tx ACK) a bunch of frames. 2822 */ 2823 ret = ath10k_wmi_barrier(ar); 2824 if (ret) { 2825 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 2826 return ret; 2827 } 2828 2829 return 0; 2830 } 2831 2832 static int ath10k_core_compat_services(struct ath10k *ar) 2833 { 2834 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2835 2836 /* all 10.x firmware versions support thermal throttling but don't 2837 * advertise the support via service flags so we have to hardcode 2838 * it here 2839 */ 2840 switch (fw_file->wmi_op_version) { 2841 case ATH10K_FW_WMI_OP_VERSION_10_1: 2842 case ATH10K_FW_WMI_OP_VERSION_10_2: 2843 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2844 case ATH10K_FW_WMI_OP_VERSION_10_4: 2845 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map); 2846 break; 2847 default: 2848 break; 2849 } 2850 2851 return 0; 2852 } 2853 2854 #define TGT_IRAM_READ_PER_ITR (8 * 1024) 2855 2856 static int ath10k_core_copy_target_iram(struct ath10k *ar) 2857 { 2858 const struct ath10k_hw_mem_layout *hw_mem; 2859 const struct ath10k_mem_region *tmp, *mem_region = NULL; 2860 dma_addr_t paddr; 2861 void *vaddr = NULL; 2862 u8 num_read_itr; 2863 int i, ret; 2864 u32 len, remaining_len; 2865 2866 /* copy target iram feature must work also when 2867 * ATH10K_FW_CRASH_DUMP_RAM_DATA is disabled, so 2868 * _ath10k_coredump_get_mem_layout() to accomplist that 2869 */ 2870 hw_mem = _ath10k_coredump_get_mem_layout(ar); 2871 if (!hw_mem) 2872 /* if CONFIG_DEV_COREDUMP is disabled we get NULL, then 2873 * just silently disable the feature by doing nothing 2874 */ 2875 return 0; 2876 2877 for (i = 0; i < hw_mem->region_table.size; i++) { 2878 tmp = &hw_mem->region_table.regions[i]; 2879 if (tmp->type == ATH10K_MEM_REGION_TYPE_REG) { 2880 mem_region = tmp; 2881 break; 2882 } 2883 } 2884 2885 if (!mem_region) 2886 return -ENOMEM; 2887 2888 for (i = 0; i < ar->wmi.num_mem_chunks; i++) { 2889 if (ar->wmi.mem_chunks[i].req_id == 2890 WMI_IRAM_RECOVERY_HOST_MEM_REQ_ID) { 2891 vaddr = ar->wmi.mem_chunks[i].vaddr; 2892 len = ar->wmi.mem_chunks[i].len; 2893 break; 2894 } 2895 } 2896 2897 if (!vaddr || !len) { 2898 ath10k_warn(ar, "No allocated memory for IRAM back up"); 2899 return -ENOMEM; 2900 } 2901 2902 len = (len < mem_region->len) ? len : mem_region->len; 2903 paddr = mem_region->start; 2904 num_read_itr = len / TGT_IRAM_READ_PER_ITR; 2905 remaining_len = len % TGT_IRAM_READ_PER_ITR; 2906 for (i = 0; i < num_read_itr; i++) { 2907 ret = ath10k_hif_diag_read(ar, paddr, vaddr, 2908 TGT_IRAM_READ_PER_ITR); 2909 if (ret) { 2910 ath10k_warn(ar, "failed to copy firmware IRAM contents: %d", 2911 ret); 2912 return ret; 2913 } 2914 2915 paddr += TGT_IRAM_READ_PER_ITR; 2916 #if defined(__linux__) 2917 vaddr += TGT_IRAM_READ_PER_ITR; 2918 #elif defined(__FreeBSD__) 2919 vaddr = (void *)((uintptr_t)vaddr + TGT_IRAM_READ_PER_ITR); 2920 #endif 2921 } 2922 2923 if (remaining_len) { 2924 ret = ath10k_hif_diag_read(ar, paddr, vaddr, remaining_len); 2925 if (ret) { 2926 ath10k_warn(ar, "failed to copy firmware IRAM contents: %d", 2927 ret); 2928 return ret; 2929 } 2930 } 2931 2932 ath10k_dbg(ar, ATH10K_DBG_BOOT, "target IRAM back up completed\n"); 2933 2934 return 0; 2935 } 2936 2937 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 2938 const struct ath10k_fw_components *fw) 2939 { 2940 int status; 2941 u32 val; 2942 2943 lockdep_assert_held(&ar->conf_mutex); 2944 2945 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2946 2947 ar->running_fw = fw; 2948 2949 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2950 ar->running_fw->fw_file.fw_features)) { 2951 ath10k_bmi_start(ar); 2952 2953 /* Enable hardware clock to speed up firmware download */ 2954 if (ar->hw_params.hw_ops->enable_pll_clk) { 2955 status = ar->hw_params.hw_ops->enable_pll_clk(ar); 2956 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot enable pll ret %d\n", 2957 status); 2958 } 2959 2960 if (ath10k_init_configure_target(ar)) { 2961 status = -EINVAL; 2962 goto err; 2963 } 2964 2965 status = ath10k_download_cal_data(ar); 2966 if (status) 2967 goto err; 2968 2969 /* Some of qca988x solutions are having global reset issue 2970 * during target initialization. Bypassing PLL setting before 2971 * downloading firmware and letting the SoC run on REF_CLK is 2972 * fixing the problem. Corresponding firmware change is also 2973 * needed to set the clock source once the target is 2974 * initialized. 2975 */ 2976 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2977 ar->running_fw->fw_file.fw_features)) { 2978 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2979 if (status) { 2980 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2981 status); 2982 goto err; 2983 } 2984 } 2985 2986 status = ath10k_download_fw(ar); 2987 if (status) 2988 goto err; 2989 2990 status = ath10k_init_uart(ar); 2991 if (status) 2992 goto err; 2993 2994 if (ar->hif.bus == ATH10K_BUS_SDIO) { 2995 status = ath10k_init_sdio(ar, mode); 2996 if (status) { 2997 ath10k_err(ar, "failed to init SDIO: %d\n", status); 2998 goto err; 2999 } 3000 } 3001 } 3002 3003 ar->htc.htc_ops.target_send_suspend_complete = 3004 ath10k_send_suspend_complete; 3005 3006 status = ath10k_htc_init(ar); 3007 if (status) { 3008 ath10k_err(ar, "could not init HTC (%d)\n", status); 3009 goto err; 3010 } 3011 3012 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 3013 ar->running_fw->fw_file.fw_features)) { 3014 status = ath10k_bmi_done(ar); 3015 if (status) 3016 goto err; 3017 } 3018 3019 status = ath10k_wmi_attach(ar); 3020 if (status) { 3021 ath10k_err(ar, "WMI attach failed: %d\n", status); 3022 goto err; 3023 } 3024 3025 status = ath10k_htt_init(ar); 3026 if (status) { 3027 ath10k_err(ar, "failed to init htt: %d\n", status); 3028 goto err_wmi_detach; 3029 } 3030 3031 status = ath10k_htt_tx_start(&ar->htt); 3032 if (status) { 3033 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 3034 goto err_wmi_detach; 3035 } 3036 3037 /* If firmware indicates Full Rx Reorder support it must be used in a 3038 * slightly different manner. Let HTT code know. 3039 */ 3040 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 3041 ar->wmi.svc_map)); 3042 3043 status = ath10k_htt_rx_alloc(&ar->htt); 3044 if (status) { 3045 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 3046 goto err_htt_tx_detach; 3047 } 3048 3049 status = ath10k_hif_start(ar); 3050 if (status) { 3051 ath10k_err(ar, "could not start HIF: %d\n", status); 3052 goto err_htt_rx_detach; 3053 } 3054 3055 status = ath10k_htc_wait_target(&ar->htc); 3056 if (status) { 3057 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 3058 goto err_hif_stop; 3059 } 3060 3061 status = ath10k_hif_start_post(ar); 3062 if (status) { 3063 ath10k_err(ar, "failed to swap mailbox: %d\n", status); 3064 goto err_hif_stop; 3065 } 3066 3067 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 3068 status = ath10k_htt_connect(&ar->htt); 3069 if (status) { 3070 ath10k_err(ar, "failed to connect htt (%d)\n", status); 3071 goto err_hif_stop; 3072 } 3073 } 3074 3075 status = ath10k_wmi_connect(ar); 3076 if (status) { 3077 ath10k_err(ar, "could not connect wmi: %d\n", status); 3078 goto err_hif_stop; 3079 } 3080 3081 status = ath10k_htc_start(&ar->htc); 3082 if (status) { 3083 ath10k_err(ar, "failed to start htc: %d\n", status); 3084 goto err_hif_stop; 3085 } 3086 3087 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 3088 status = ath10k_wmi_wait_for_service_ready(ar); 3089 if (status) { 3090 ath10k_warn(ar, "wmi service ready event not received"); 3091 goto err_hif_stop; 3092 } 3093 } 3094 3095 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 3096 ar->hw->wiphy->fw_version); 3097 3098 if (test_bit(ATH10K_FW_FEATURE_IRAM_RECOVERY, 3099 ar->running_fw->fw_file.fw_features)) { 3100 status = ath10k_core_copy_target_iram(ar); 3101 if (status) { 3102 ath10k_warn(ar, "failed to copy target iram contents: %d", 3103 status); 3104 goto err_hif_stop; 3105 } 3106 } 3107 3108 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 3109 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 3110 val = 0; 3111 if (ath10k_peer_stats_enabled(ar)) 3112 val = WMI_10_4_PEER_STATS; 3113 3114 /* Enable vdev stats by default */ 3115 val |= WMI_10_4_VDEV_STATS; 3116 3117 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 3118 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 3119 3120 ath10k_core_fetch_btcoex_dt(ar); 3121 3122 /* 10.4 firmware supports BT-Coex without reloading firmware 3123 * via pdev param. To support Bluetooth coexistence pdev param, 3124 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 3125 * enabled always. 3126 * 3127 * We can still enable BTCOEX if firmware has the support 3128 * eventhough btceox_support value is 3129 * ATH10K_DT_BTCOEX_NOT_FOUND 3130 */ 3131 3132 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 3133 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 3134 ar->running_fw->fw_file.fw_features) && 3135 ar->coex_support) 3136 val |= WMI_10_4_COEX_GPIO_SUPPORT; 3137 3138 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 3139 ar->wmi.svc_map)) 3140 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 3141 3142 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 3143 ar->wmi.svc_map)) 3144 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 3145 3146 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, 3147 ar->wmi.svc_map)) 3148 val |= WMI_10_4_TX_DATA_ACK_RSSI; 3149 3150 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map)) 3151 val |= WMI_10_4_REPORT_AIRTIME; 3152 3153 if (test_bit(WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT, 3154 ar->wmi.svc_map)) 3155 val |= WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT; 3156 3157 status = ath10k_mac_ext_resource_config(ar, val); 3158 if (status) { 3159 ath10k_err(ar, 3160 "failed to send ext resource cfg command : %d\n", 3161 status); 3162 goto err_hif_stop; 3163 } 3164 } 3165 3166 status = ath10k_wmi_cmd_init(ar); 3167 if (status) { 3168 ath10k_err(ar, "could not send WMI init command (%d)\n", 3169 status); 3170 goto err_hif_stop; 3171 } 3172 3173 status = ath10k_wmi_wait_for_unified_ready(ar); 3174 if (status) { 3175 ath10k_err(ar, "wmi unified ready event not received\n"); 3176 goto err_hif_stop; 3177 } 3178 3179 status = ath10k_core_compat_services(ar); 3180 if (status) { 3181 ath10k_err(ar, "compat services failed: %d\n", status); 3182 goto err_hif_stop; 3183 } 3184 3185 status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr); 3186 if (status && status != -EOPNOTSUPP) { 3187 ath10k_err(ar, 3188 "failed to set base mac address: %d\n", status); 3189 goto err_hif_stop; 3190 } 3191 3192 /* Some firmware revisions do not properly set up hardware rx filter 3193 * registers. 3194 * 3195 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 3196 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 3197 * any frames that matches MAC_PCU_RX_FILTER which is also 3198 * misconfigured to accept anything. 3199 * 3200 * The ADDR1 is programmed using internal firmware structure field and 3201 * can't be (easily/sanely) reached from the driver explicitly. It is 3202 * possible to implicitly make it correct by creating a dummy vdev and 3203 * then deleting it. 3204 */ 3205 if (ar->hw_params.hw_filter_reset_required && 3206 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 3207 status = ath10k_core_reset_rx_filter(ar); 3208 if (status) { 3209 ath10k_err(ar, 3210 "failed to reset rx filter: %d\n", status); 3211 goto err_hif_stop; 3212 } 3213 } 3214 3215 status = ath10k_htt_rx_ring_refill(ar); 3216 if (status) { 3217 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 3218 goto err_hif_stop; 3219 } 3220 3221 if (ar->max_num_vdevs >= 64) 3222 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 3223 else 3224 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 3225 3226 INIT_LIST_HEAD(&ar->arvifs); 3227 3228 /* we don't care about HTT in UTF mode */ 3229 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 3230 status = ath10k_htt_setup(&ar->htt); 3231 if (status) { 3232 ath10k_err(ar, "failed to setup htt: %d\n", status); 3233 goto err_hif_stop; 3234 } 3235 } 3236 3237 status = ath10k_debug_start(ar); 3238 if (status) 3239 goto err_hif_stop; 3240 3241 status = ath10k_hif_set_target_log_mode(ar, fw_diag_log); 3242 if (status && status != -EOPNOTSUPP) { 3243 ath10k_warn(ar, "set target log mode failed: %d\n", status); 3244 goto err_hif_stop; 3245 } 3246 3247 return 0; 3248 3249 err_hif_stop: 3250 ath10k_hif_stop(ar); 3251 err_htt_rx_detach: 3252 ath10k_htt_rx_free(&ar->htt); 3253 err_htt_tx_detach: 3254 ath10k_htt_tx_free(&ar->htt); 3255 err_wmi_detach: 3256 ath10k_wmi_detach(ar); 3257 err: 3258 return status; 3259 } 3260 EXPORT_SYMBOL(ath10k_core_start); 3261 3262 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 3263 { 3264 int ret; 3265 unsigned long time_left; 3266 3267 reinit_completion(&ar->target_suspend); 3268 3269 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 3270 if (ret) { 3271 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 3272 return ret; 3273 } 3274 3275 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 3276 3277 if (!time_left) { 3278 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 3279 return -ETIMEDOUT; 3280 } 3281 3282 return 0; 3283 } 3284 3285 void ath10k_core_stop(struct ath10k *ar) 3286 { 3287 lockdep_assert_held(&ar->conf_mutex); 3288 ath10k_debug_stop(ar); 3289 3290 /* try to suspend target */ 3291 if (ar->state != ATH10K_STATE_RESTARTING && 3292 ar->state != ATH10K_STATE_UTF) 3293 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 3294 3295 ath10k_hif_stop(ar); 3296 ath10k_htt_tx_stop(&ar->htt); 3297 ath10k_htt_rx_free(&ar->htt); 3298 ath10k_wmi_detach(ar); 3299 3300 ar->id.bmi_ids_valid = false; 3301 } 3302 EXPORT_SYMBOL(ath10k_core_stop); 3303 3304 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 3305 * order to know what hw capabilities should be advertised to mac80211 it is 3306 * necessary to load the firmware (and tear it down immediately since start 3307 * hook will try to init it again) before registering 3308 */ 3309 static int ath10k_core_probe_fw(struct ath10k *ar) 3310 { 3311 struct bmi_target_info target_info; 3312 int ret = 0; 3313 3314 ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL); 3315 if (ret) { 3316 ath10k_err(ar, "could not power on hif bus (%d)\n", ret); 3317 return ret; 3318 } 3319 3320 switch (ar->hif.bus) { 3321 case ATH10K_BUS_SDIO: 3322 memset(&target_info, 0, sizeof(target_info)); 3323 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 3324 if (ret) { 3325 ath10k_err(ar, "could not get target info (%d)\n", ret); 3326 goto err_power_down; 3327 } 3328 ar->target_version = target_info.version; 3329 ar->hw->wiphy->hw_version = target_info.version; 3330 break; 3331 case ATH10K_BUS_PCI: 3332 case ATH10K_BUS_AHB: 3333 case ATH10K_BUS_USB: 3334 memset(&target_info, 0, sizeof(target_info)); 3335 ret = ath10k_bmi_get_target_info(ar, &target_info); 3336 if (ret) { 3337 ath10k_err(ar, "could not get target info (%d)\n", ret); 3338 goto err_power_down; 3339 } 3340 ar->target_version = target_info.version; 3341 ar->hw->wiphy->hw_version = target_info.version; 3342 break; 3343 case ATH10K_BUS_SNOC: 3344 memset(&target_info, 0, sizeof(target_info)); 3345 ret = ath10k_hif_get_target_info(ar, &target_info); 3346 if (ret) { 3347 ath10k_err(ar, "could not get target info (%d)\n", ret); 3348 goto err_power_down; 3349 } 3350 ar->target_version = target_info.version; 3351 ar->hw->wiphy->hw_version = target_info.version; 3352 break; 3353 default: 3354 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus); 3355 } 3356 3357 ret = ath10k_init_hw_params(ar); 3358 if (ret) { 3359 ath10k_err(ar, "could not get hw params (%d)\n", ret); 3360 goto err_power_down; 3361 } 3362 3363 ret = ath10k_core_fetch_firmware_files(ar); 3364 if (ret) { 3365 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 3366 goto err_power_down; 3367 } 3368 3369 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 3370 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 3371 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 3372 sizeof(ar->hw->wiphy->fw_version)); 3373 3374 ath10k_debug_print_hwfw_info(ar); 3375 3376 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 3377 ar->normal_mode_fw.fw_file.fw_features)) { 3378 ret = ath10k_core_pre_cal_download(ar); 3379 if (ret) { 3380 /* pre calibration data download is not necessary 3381 * for all the chipsets. Ignore failures and continue. 3382 */ 3383 ath10k_dbg(ar, ATH10K_DBG_BOOT, 3384 "could not load pre cal data: %d\n", ret); 3385 } 3386 3387 ret = ath10k_core_get_board_id_from_otp(ar); 3388 if (ret && ret != -EOPNOTSUPP) { 3389 ath10k_err(ar, "failed to get board id from otp: %d\n", 3390 ret); 3391 goto err_free_firmware_files; 3392 } 3393 3394 ret = ath10k_core_check_smbios(ar); 3395 if (ret) 3396 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n"); 3397 3398 ret = ath10k_core_check_dt(ar); 3399 if (ret) 3400 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n"); 3401 3402 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD); 3403 if (ret) { 3404 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 3405 goto err_free_firmware_files; 3406 } 3407 3408 ath10k_debug_print_board_info(ar); 3409 } 3410 3411 device_get_mac_address(ar->dev, ar->mac_addr); 3412 3413 ret = ath10k_core_init_firmware_features(ar); 3414 if (ret) { 3415 ath10k_err(ar, "fatal problem with firmware features: %d\n", 3416 ret); 3417 goto err_free_firmware_files; 3418 } 3419 3420 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 3421 ar->normal_mode_fw.fw_file.fw_features)) { 3422 ret = ath10k_swap_code_seg_init(ar, 3423 &ar->normal_mode_fw.fw_file); 3424 if (ret) { 3425 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 3426 ret); 3427 goto err_free_firmware_files; 3428 } 3429 } 3430 3431 mutex_lock(&ar->conf_mutex); 3432 3433 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 3434 &ar->normal_mode_fw); 3435 if (ret) { 3436 ath10k_err(ar, "could not init core (%d)\n", ret); 3437 goto err_unlock; 3438 } 3439 3440 ath10k_debug_print_boot_info(ar); 3441 ath10k_core_stop(ar); 3442 3443 mutex_unlock(&ar->conf_mutex); 3444 3445 ath10k_hif_power_down(ar); 3446 return 0; 3447 3448 err_unlock: 3449 mutex_unlock(&ar->conf_mutex); 3450 3451 err_free_firmware_files: 3452 ath10k_core_free_firmware_files(ar); 3453 3454 err_power_down: 3455 ath10k_hif_power_down(ar); 3456 3457 return ret; 3458 } 3459 3460 static void ath10k_core_register_work(struct work_struct *work) 3461 { 3462 struct ath10k *ar = container_of(work, struct ath10k, register_work); 3463 int status; 3464 3465 /* peer stats are enabled by default */ 3466 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 3467 3468 status = ath10k_core_probe_fw(ar); 3469 if (status) { 3470 ath10k_err(ar, "could not probe fw (%d)\n", status); 3471 goto err; 3472 } 3473 3474 status = ath10k_mac_register(ar); 3475 if (status) { 3476 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 3477 goto err_release_fw; 3478 } 3479 3480 status = ath10k_coredump_register(ar); 3481 if (status) { 3482 ath10k_err(ar, "unable to register coredump\n"); 3483 goto err_unregister_mac; 3484 } 3485 3486 status = ath10k_debug_register(ar); 3487 if (status) { 3488 ath10k_err(ar, "unable to initialize debugfs\n"); 3489 goto err_unregister_coredump; 3490 } 3491 3492 status = ath10k_spectral_create(ar); 3493 if (status) { 3494 ath10k_err(ar, "failed to initialize spectral\n"); 3495 goto err_debug_destroy; 3496 } 3497 3498 status = ath10k_thermal_register(ar); 3499 if (status) { 3500 ath10k_err(ar, "could not register thermal device: %d\n", 3501 status); 3502 goto err_spectral_destroy; 3503 } 3504 #if defined(CONFIG_FWLOG) 3505 ath10k_fwlog_register(ar); 3506 #endif 3507 3508 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 3509 return; 3510 3511 err_spectral_destroy: 3512 ath10k_spectral_destroy(ar); 3513 err_debug_destroy: 3514 ath10k_debug_destroy(ar); 3515 err_unregister_coredump: 3516 ath10k_coredump_unregister(ar); 3517 err_unregister_mac: 3518 ath10k_mac_unregister(ar); 3519 err_release_fw: 3520 ath10k_core_free_firmware_files(ar); 3521 err: 3522 /* TODO: It's probably a good idea to release device from the driver 3523 * but calling device_release_driver() here will cause a deadlock. 3524 */ 3525 return; 3526 } 3527 3528 int ath10k_core_register(struct ath10k *ar, 3529 const struct ath10k_bus_params *bus_params) 3530 { 3531 ar->bus_param = *bus_params; 3532 3533 queue_work(ar->workqueue, &ar->register_work); 3534 3535 return 0; 3536 } 3537 EXPORT_SYMBOL(ath10k_core_register); 3538 3539 void ath10k_core_unregister(struct ath10k *ar) 3540 { 3541 cancel_work_sync(&ar->register_work); 3542 3543 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 3544 return; 3545 3546 ath10k_thermal_unregister(ar); 3547 /* Stop spectral before unregistering from mac80211 to remove the 3548 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 3549 * would be already be free'd recursively, leading to a double free. 3550 */ 3551 ath10k_spectral_destroy(ar); 3552 3553 /* We must unregister from mac80211 before we stop HTC and HIF. 3554 * Otherwise we will fail to submit commands to FW and mac80211 will be 3555 * unhappy about callback failures. 3556 */ 3557 ath10k_mac_unregister(ar); 3558 3559 ath10k_testmode_destroy(ar); 3560 3561 ath10k_core_free_firmware_files(ar); 3562 ath10k_core_free_board_files(ar); 3563 3564 ath10k_debug_unregister(ar); 3565 #if defined(CONFIG_FWLOG) 3566 ath10k_fwlog_unregister(ar); 3567 #endif 3568 } 3569 EXPORT_SYMBOL(ath10k_core_unregister); 3570 3571 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 3572 enum ath10k_bus bus, 3573 enum ath10k_hw_rev hw_rev, 3574 const struct ath10k_hif_ops *hif_ops) 3575 { 3576 struct ath10k *ar; 3577 int ret; 3578 3579 ar = ath10k_mac_create(priv_size); 3580 if (!ar) 3581 return NULL; 3582 3583 ar->ath_common.priv = ar; 3584 ar->ath_common.hw = ar->hw; 3585 ar->dev = dev; 3586 ar->hw_rev = hw_rev; 3587 ar->hif.ops = hif_ops; 3588 ar->hif.bus = bus; 3589 3590 switch (hw_rev) { 3591 case ATH10K_HW_QCA988X: 3592 case ATH10K_HW_QCA9887: 3593 ar->regs = &qca988x_regs; 3594 ar->hw_ce_regs = &qcax_ce_regs; 3595 ar->hw_values = &qca988x_values; 3596 break; 3597 case ATH10K_HW_QCA6174: 3598 case ATH10K_HW_QCA9377: 3599 ar->regs = &qca6174_regs; 3600 ar->hw_ce_regs = &qcax_ce_regs; 3601 ar->hw_values = &qca6174_values; 3602 break; 3603 case ATH10K_HW_QCA99X0: 3604 case ATH10K_HW_QCA9984: 3605 ar->regs = &qca99x0_regs; 3606 ar->hw_ce_regs = &qcax_ce_regs; 3607 ar->hw_values = &qca99x0_values; 3608 break; 3609 case ATH10K_HW_QCA9888: 3610 ar->regs = &qca99x0_regs; 3611 ar->hw_ce_regs = &qcax_ce_regs; 3612 ar->hw_values = &qca9888_values; 3613 break; 3614 case ATH10K_HW_QCA4019: 3615 ar->regs = &qca4019_regs; 3616 ar->hw_ce_regs = &qcax_ce_regs; 3617 ar->hw_values = &qca4019_values; 3618 break; 3619 case ATH10K_HW_WCN3990: 3620 ar->regs = &wcn3990_regs; 3621 ar->hw_ce_regs = &wcn3990_ce_regs; 3622 ar->hw_values = &wcn3990_values; 3623 break; 3624 default: 3625 ath10k_err(ar, "unsupported core hardware revision %d\n", 3626 hw_rev); 3627 ret = -ENOTSUPP; 3628 goto err_free_mac; 3629 } 3630 3631 init_completion(&ar->scan.started); 3632 init_completion(&ar->scan.completed); 3633 init_completion(&ar->scan.on_channel); 3634 init_completion(&ar->target_suspend); 3635 init_completion(&ar->driver_recovery); 3636 init_completion(&ar->wow.wakeup_completed); 3637 3638 init_completion(&ar->install_key_done); 3639 init_completion(&ar->vdev_setup_done); 3640 init_completion(&ar->vdev_delete_done); 3641 init_completion(&ar->thermal.wmi_sync); 3642 init_completion(&ar->bss_survey_done); 3643 init_completion(&ar->peer_delete_done); 3644 init_completion(&ar->peer_stats_info_complete); 3645 3646 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 3647 3648 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 3649 if (!ar->workqueue) 3650 goto err_free_mac; 3651 3652 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 3653 if (!ar->workqueue_aux) 3654 goto err_free_wq; 3655 3656 ar->workqueue_tx_complete = 3657 create_singlethread_workqueue("ath10k_tx_complete_wq"); 3658 if (!ar->workqueue_tx_complete) 3659 goto err_free_aux_wq; 3660 3661 mutex_init(&ar->conf_mutex); 3662 mutex_init(&ar->dump_mutex); 3663 spin_lock_init(&ar->data_lock); 3664 3665 INIT_LIST_HEAD(&ar->peers); 3666 init_waitqueue_head(&ar->peer_mapping_wq); 3667 init_waitqueue_head(&ar->htt.empty_tx_wq); 3668 init_waitqueue_head(&ar->wmi.tx_credits_wq); 3669 3670 skb_queue_head_init(&ar->htt.rx_indication_head); 3671 3672 init_completion(&ar->offchan_tx_completed); 3673 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 3674 skb_queue_head_init(&ar->offchan_tx_queue); 3675 3676 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 3677 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 3678 3679 INIT_WORK(&ar->register_work, ath10k_core_register_work); 3680 INIT_WORK(&ar->restart_work, ath10k_core_restart); 3681 INIT_WORK(&ar->set_coverage_class_work, 3682 ath10k_core_set_coverage_class_work); 3683 3684 init_dummy_netdev(&ar->napi_dev); 3685 3686 ret = ath10k_coredump_create(ar); 3687 if (ret) 3688 goto err_free_tx_complete; 3689 3690 ret = ath10k_debug_create(ar); 3691 if (ret) 3692 goto err_free_coredump; 3693 3694 return ar; 3695 3696 err_free_coredump: 3697 ath10k_coredump_destroy(ar); 3698 err_free_tx_complete: 3699 destroy_workqueue(ar->workqueue_tx_complete); 3700 err_free_aux_wq: 3701 destroy_workqueue(ar->workqueue_aux); 3702 err_free_wq: 3703 destroy_workqueue(ar->workqueue); 3704 err_free_mac: 3705 ath10k_mac_destroy(ar); 3706 3707 return NULL; 3708 } 3709 EXPORT_SYMBOL(ath10k_core_create); 3710 3711 void ath10k_core_destroy(struct ath10k *ar) 3712 { 3713 destroy_workqueue(ar->workqueue); 3714 3715 destroy_workqueue(ar->workqueue_aux); 3716 3717 destroy_workqueue(ar->workqueue_tx_complete); 3718 3719 ath10k_debug_destroy(ar); 3720 ath10k_coredump_destroy(ar); 3721 ath10k_htt_tx_destroy(&ar->htt); 3722 ath10k_wmi_free_host_mem(ar); 3723 ath10k_mac_destroy(ar); 3724 } 3725 EXPORT_SYMBOL(ath10k_core_destroy); 3726 3727 MODULE_AUTHOR("Qualcomm Atheros"); 3728 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 3729 MODULE_LICENSE("Dual BSD/GPL"); 3730