1da8fa4e3SBjoern A. Zeeb /* SPDX-License-Identifier: ISC */ 2da8fa4e3SBjoern A. Zeeb /* 3da8fa4e3SBjoern A. Zeeb * Copyright (c) 2018 The Linux Foundation. All rights reserved. 4da8fa4e3SBjoern A. Zeeb */ 5da8fa4e3SBjoern A. Zeeb #ifndef _ATH10K_QMI_H_ 6da8fa4e3SBjoern A. Zeeb #define _ATH10K_QMI_H_ 7da8fa4e3SBjoern A. Zeeb 8da8fa4e3SBjoern A. Zeeb #include <linux/soc/qcom/qmi.h> 9da8fa4e3SBjoern A. Zeeb #include <linux/qrtr.h> 10da8fa4e3SBjoern A. Zeeb #include "qmi_wlfw_v01.h" 11da8fa4e3SBjoern A. Zeeb 12da8fa4e3SBjoern A. Zeeb #define MAX_NUM_MEMORY_REGIONS 2 13da8fa4e3SBjoern A. Zeeb #define MAX_TIMESTAMP_LEN 32 14da8fa4e3SBjoern A. Zeeb #define MAX_BUILD_ID_LEN 128 15da8fa4e3SBjoern A. Zeeb #define MAX_NUM_CAL_V01 5 16da8fa4e3SBjoern A. Zeeb 17da8fa4e3SBjoern A. Zeeb enum ath10k_qmi_driver_event_type { 18da8fa4e3SBjoern A. Zeeb ATH10K_QMI_EVENT_SERVER_ARRIVE, 19da8fa4e3SBjoern A. Zeeb ATH10K_QMI_EVENT_SERVER_EXIT, 20da8fa4e3SBjoern A. Zeeb ATH10K_QMI_EVENT_FW_READY_IND, 21da8fa4e3SBjoern A. Zeeb ATH10K_QMI_EVENT_FW_DOWN_IND, 22da8fa4e3SBjoern A. Zeeb ATH10K_QMI_EVENT_MSA_READY_IND, 23da8fa4e3SBjoern A. Zeeb ATH10K_QMI_EVENT_MAX, 24da8fa4e3SBjoern A. Zeeb }; 25da8fa4e3SBjoern A. Zeeb 26da8fa4e3SBjoern A. Zeeb struct ath10k_msa_mem_info { 27da8fa4e3SBjoern A. Zeeb phys_addr_t addr; 28da8fa4e3SBjoern A. Zeeb u32 size; 29da8fa4e3SBjoern A. Zeeb bool secure; 30da8fa4e3SBjoern A. Zeeb }; 31da8fa4e3SBjoern A. Zeeb 32da8fa4e3SBjoern A. Zeeb struct ath10k_qmi_chip_info { 33da8fa4e3SBjoern A. Zeeb u32 chip_id; 34da8fa4e3SBjoern A. Zeeb u32 chip_family; 35da8fa4e3SBjoern A. Zeeb }; 36da8fa4e3SBjoern A. Zeeb 37da8fa4e3SBjoern A. Zeeb struct ath10k_qmi_board_info { 38da8fa4e3SBjoern A. Zeeb u32 board_id; 39da8fa4e3SBjoern A. Zeeb }; 40da8fa4e3SBjoern A. Zeeb 41da8fa4e3SBjoern A. Zeeb struct ath10k_qmi_soc_info { 42da8fa4e3SBjoern A. Zeeb u32 soc_id; 43da8fa4e3SBjoern A. Zeeb }; 44da8fa4e3SBjoern A. Zeeb 45da8fa4e3SBjoern A. Zeeb struct ath10k_qmi_cal_data { 46da8fa4e3SBjoern A. Zeeb u32 cal_id; 47da8fa4e3SBjoern A. Zeeb u32 total_size; 48da8fa4e3SBjoern A. Zeeb u8 *data; 49da8fa4e3SBjoern A. Zeeb }; 50da8fa4e3SBjoern A. Zeeb 51da8fa4e3SBjoern A. Zeeb struct ath10k_tgt_pipe_cfg { 52da8fa4e3SBjoern A. Zeeb __le32 pipe_num; 53da8fa4e3SBjoern A. Zeeb __le32 pipe_dir; 54da8fa4e3SBjoern A. Zeeb __le32 nentries; 55da8fa4e3SBjoern A. Zeeb __le32 nbytes_max; 56da8fa4e3SBjoern A. Zeeb __le32 flags; 57da8fa4e3SBjoern A. Zeeb __le32 reserved; 58da8fa4e3SBjoern A. Zeeb }; 59da8fa4e3SBjoern A. Zeeb 60da8fa4e3SBjoern A. Zeeb struct ath10k_svc_pipe_cfg { 61da8fa4e3SBjoern A. Zeeb __le32 service_id; 62da8fa4e3SBjoern A. Zeeb __le32 pipe_dir; 63da8fa4e3SBjoern A. Zeeb __le32 pipe_num; 64da8fa4e3SBjoern A. Zeeb }; 65da8fa4e3SBjoern A. Zeeb 66da8fa4e3SBjoern A. Zeeb struct ath10k_shadow_reg_cfg { 67da8fa4e3SBjoern A. Zeeb __le16 ce_id; 68da8fa4e3SBjoern A. Zeeb __le16 reg_offset; 69da8fa4e3SBjoern A. Zeeb }; 70da8fa4e3SBjoern A. Zeeb 71da8fa4e3SBjoern A. Zeeb struct ath10k_qmi_wlan_enable_cfg { 72da8fa4e3SBjoern A. Zeeb u32 num_ce_tgt_cfg; 73da8fa4e3SBjoern A. Zeeb struct ath10k_tgt_pipe_cfg *ce_tgt_cfg; 74da8fa4e3SBjoern A. Zeeb u32 num_ce_svc_pipe_cfg; 75da8fa4e3SBjoern A. Zeeb struct ath10k_svc_pipe_cfg *ce_svc_cfg; 76da8fa4e3SBjoern A. Zeeb u32 num_shadow_reg_cfg; 77da8fa4e3SBjoern A. Zeeb struct ath10k_shadow_reg_cfg *shadow_reg_cfg; 78da8fa4e3SBjoern A. Zeeb }; 79da8fa4e3SBjoern A. Zeeb 80da8fa4e3SBjoern A. Zeeb struct ath10k_qmi_driver_event { 81da8fa4e3SBjoern A. Zeeb struct list_head list; 82da8fa4e3SBjoern A. Zeeb enum ath10k_qmi_driver_event_type type; 83da8fa4e3SBjoern A. Zeeb void *data; 84da8fa4e3SBjoern A. Zeeb }; 85da8fa4e3SBjoern A. Zeeb 86da8fa4e3SBjoern A. Zeeb enum ath10k_qmi_state { 87da8fa4e3SBjoern A. Zeeb ATH10K_QMI_STATE_INIT_DONE, 88da8fa4e3SBjoern A. Zeeb ATH10K_QMI_STATE_DEINIT, 89da8fa4e3SBjoern A. Zeeb }; 90da8fa4e3SBjoern A. Zeeb 91da8fa4e3SBjoern A. Zeeb struct ath10k_qmi { 92da8fa4e3SBjoern A. Zeeb struct ath10k *ar; 93da8fa4e3SBjoern A. Zeeb struct qmi_handle qmi_hdl; 94da8fa4e3SBjoern A. Zeeb struct sockaddr_qrtr sq; 95da8fa4e3SBjoern A. Zeeb struct work_struct event_work; 96da8fa4e3SBjoern A. Zeeb struct workqueue_struct *event_wq; 97da8fa4e3SBjoern A. Zeeb struct list_head event_list; 98da8fa4e3SBjoern A. Zeeb spinlock_t event_lock; /* spinlock for qmi event list */ 99da8fa4e3SBjoern A. Zeeb u32 nr_mem_region; 100da8fa4e3SBjoern A. Zeeb struct ath10k_msa_mem_info mem_region[MAX_NUM_MEMORY_REGIONS]; 101da8fa4e3SBjoern A. Zeeb struct ath10k_qmi_chip_info chip_info; 102da8fa4e3SBjoern A. Zeeb struct ath10k_qmi_board_info board_info; 103da8fa4e3SBjoern A. Zeeb struct ath10k_qmi_soc_info soc_info; 104da8fa4e3SBjoern A. Zeeb char fw_build_id[MAX_BUILD_ID_LEN + 1]; 105da8fa4e3SBjoern A. Zeeb u32 fw_version; 106da8fa4e3SBjoern A. Zeeb bool fw_ready; 107da8fa4e3SBjoern A. Zeeb char fw_build_timestamp[MAX_TIMESTAMP_LEN + 1]; 108da8fa4e3SBjoern A. Zeeb struct ath10k_qmi_cal_data cal_data[MAX_NUM_CAL_V01]; 109da8fa4e3SBjoern A. Zeeb bool msa_fixed_perm; 110da8fa4e3SBjoern A. Zeeb enum ath10k_qmi_state state; 111da8fa4e3SBjoern A. Zeeb }; 112da8fa4e3SBjoern A. Zeeb 113da8fa4e3SBjoern A. Zeeb int ath10k_qmi_wlan_enable(struct ath10k *ar, 114da8fa4e3SBjoern A. Zeeb struct ath10k_qmi_wlan_enable_cfg *config, 115da8fa4e3SBjoern A. Zeeb enum wlfw_driver_mode_enum_v01 mode, 116da8fa4e3SBjoern A. Zeeb const char *version); 117da8fa4e3SBjoern A. Zeeb int ath10k_qmi_wlan_disable(struct ath10k *ar); 118da8fa4e3SBjoern A. Zeeb int ath10k_qmi_init(struct ath10k *ar, u32 msa_size); 119da8fa4e3SBjoern A. Zeeb int ath10k_qmi_deinit(struct ath10k *ar); 120da8fa4e3SBjoern A. Zeeb int ath10k_qmi_set_fw_log_mode(struct ath10k *ar, u8 fw_log_mode); 121da8fa4e3SBjoern A. Zeeb 122da8fa4e3SBjoern A. Zeeb #endif /* ATH10K_QMI_H */ 123