1dd4f32aeSBjoern A. Zeeb /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2dd4f32aeSBjoern A. Zeeb /* 3dd4f32aeSBjoern A. Zeeb * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4dd4f32aeSBjoern A. Zeeb */ 5dd4f32aeSBjoern A. Zeeb 6dd4f32aeSBjoern A. Zeeb #ifndef ATH11K_HAL_RX_H 7dd4f32aeSBjoern A. Zeeb #define ATH11K_HAL_RX_H 8dd4f32aeSBjoern A. Zeeb 9dd4f32aeSBjoern A. Zeeb struct hal_rx_wbm_rel_info { 10dd4f32aeSBjoern A. Zeeb u32 cookie; 11dd4f32aeSBjoern A. Zeeb enum hal_wbm_rel_src_module err_rel_src; 12dd4f32aeSBjoern A. Zeeb enum hal_reo_dest_ring_push_reason push_reason; 13dd4f32aeSBjoern A. Zeeb u32 err_code; 14dd4f32aeSBjoern A. Zeeb bool first_msdu; 15dd4f32aeSBjoern A. Zeeb bool last_msdu; 16dd4f32aeSBjoern A. Zeeb }; 17dd4f32aeSBjoern A. Zeeb 18dd4f32aeSBjoern A. Zeeb #define HAL_INVALID_PEERID 0xffff 19dd4f32aeSBjoern A. Zeeb #define VHT_SIG_SU_NSS_MASK 0x7 20dd4f32aeSBjoern A. Zeeb 21dd4f32aeSBjoern A. Zeeb #define HAL_RX_MAX_MCS 12 22dd4f32aeSBjoern A. Zeeb #define HAL_RX_MAX_NSS 8 23dd4f32aeSBjoern A. Zeeb 24dd4f32aeSBjoern A. Zeeb struct hal_rx_mon_status_tlv_hdr { 25dd4f32aeSBjoern A. Zeeb u32 hdr; 26dd4f32aeSBjoern A. Zeeb u8 value[]; 27dd4f32aeSBjoern A. Zeeb }; 28dd4f32aeSBjoern A. Zeeb 29dd4f32aeSBjoern A. Zeeb enum hal_rx_su_mu_coding { 30dd4f32aeSBjoern A. Zeeb HAL_RX_SU_MU_CODING_BCC, 31dd4f32aeSBjoern A. Zeeb HAL_RX_SU_MU_CODING_LDPC, 32dd4f32aeSBjoern A. Zeeb HAL_RX_SU_MU_CODING_MAX, 33dd4f32aeSBjoern A. Zeeb }; 34dd4f32aeSBjoern A. Zeeb 35dd4f32aeSBjoern A. Zeeb enum hal_rx_gi { 36dd4f32aeSBjoern A. Zeeb HAL_RX_GI_0_8_US, 37dd4f32aeSBjoern A. Zeeb HAL_RX_GI_0_4_US, 38dd4f32aeSBjoern A. Zeeb HAL_RX_GI_1_6_US, 39dd4f32aeSBjoern A. Zeeb HAL_RX_GI_3_2_US, 40dd4f32aeSBjoern A. Zeeb HAL_RX_GI_MAX, 41dd4f32aeSBjoern A. Zeeb }; 42dd4f32aeSBjoern A. Zeeb 43dd4f32aeSBjoern A. Zeeb enum hal_rx_bw { 44dd4f32aeSBjoern A. Zeeb HAL_RX_BW_20MHZ, 45dd4f32aeSBjoern A. Zeeb HAL_RX_BW_40MHZ, 46dd4f32aeSBjoern A. Zeeb HAL_RX_BW_80MHZ, 47dd4f32aeSBjoern A. Zeeb HAL_RX_BW_160MHZ, 48dd4f32aeSBjoern A. Zeeb HAL_RX_BW_MAX, 49dd4f32aeSBjoern A. Zeeb }; 50dd4f32aeSBjoern A. Zeeb 51dd4f32aeSBjoern A. Zeeb enum hal_rx_preamble { 52dd4f32aeSBjoern A. Zeeb HAL_RX_PREAMBLE_11A, 53dd4f32aeSBjoern A. Zeeb HAL_RX_PREAMBLE_11B, 54dd4f32aeSBjoern A. Zeeb HAL_RX_PREAMBLE_11N, 55dd4f32aeSBjoern A. Zeeb HAL_RX_PREAMBLE_11AC, 56dd4f32aeSBjoern A. Zeeb HAL_RX_PREAMBLE_11AX, 57dd4f32aeSBjoern A. Zeeb HAL_RX_PREAMBLE_MAX, 58dd4f32aeSBjoern A. Zeeb }; 59dd4f32aeSBjoern A. Zeeb 60dd4f32aeSBjoern A. Zeeb enum hal_rx_reception_type { 61dd4f32aeSBjoern A. Zeeb HAL_RX_RECEPTION_TYPE_SU, 62dd4f32aeSBjoern A. Zeeb HAL_RX_RECEPTION_TYPE_MU_MIMO, 63dd4f32aeSBjoern A. Zeeb HAL_RX_RECEPTION_TYPE_MU_OFDMA, 64dd4f32aeSBjoern A. Zeeb HAL_RX_RECEPTION_TYPE_MU_OFDMA_MIMO, 65dd4f32aeSBjoern A. Zeeb HAL_RX_RECEPTION_TYPE_MAX, 66dd4f32aeSBjoern A. Zeeb }; 67dd4f32aeSBjoern A. Zeeb 68dd4f32aeSBjoern A. Zeeb #define HAL_RX_FCS_LEN 4 69dd4f32aeSBjoern A. Zeeb 70dd4f32aeSBjoern A. Zeeb enum hal_rx_mon_status { 71dd4f32aeSBjoern A. Zeeb HAL_RX_MON_STATUS_PPDU_NOT_DONE, 72dd4f32aeSBjoern A. Zeeb HAL_RX_MON_STATUS_PPDU_DONE, 73dd4f32aeSBjoern A. Zeeb HAL_RX_MON_STATUS_BUF_DONE, 74dd4f32aeSBjoern A. Zeeb }; 75dd4f32aeSBjoern A. Zeeb 7628348caeSBjoern A. Zeeb struct hal_rx_user_status { 7728348caeSBjoern A. Zeeb u32 mcs:4, 7828348caeSBjoern A. Zeeb nss:3, 7928348caeSBjoern A. Zeeb ofdma_info_valid:1, 8028348caeSBjoern A. Zeeb dl_ofdma_ru_start_index:7, 8128348caeSBjoern A. Zeeb dl_ofdma_ru_width:7, 8228348caeSBjoern A. Zeeb dl_ofdma_ru_size:8; 8328348caeSBjoern A. Zeeb u32 ul_ofdma_user_v0_word0; 8428348caeSBjoern A. Zeeb u32 ul_ofdma_user_v0_word1; 8528348caeSBjoern A. Zeeb u32 ast_index; 8628348caeSBjoern A. Zeeb u32 tid; 8728348caeSBjoern A. Zeeb u16 tcp_msdu_count; 8828348caeSBjoern A. Zeeb u16 udp_msdu_count; 8928348caeSBjoern A. Zeeb u16 other_msdu_count; 9028348caeSBjoern A. Zeeb u16 frame_control; 9128348caeSBjoern A. Zeeb u8 frame_control_info_valid; 9228348caeSBjoern A. Zeeb u8 data_sequence_control_info_valid; 9328348caeSBjoern A. Zeeb u16 first_data_seq_ctrl; 9428348caeSBjoern A. Zeeb u32 preamble_type; 9528348caeSBjoern A. Zeeb u16 ht_flags; 9628348caeSBjoern A. Zeeb u16 vht_flags; 9728348caeSBjoern A. Zeeb u16 he_flags; 9828348caeSBjoern A. Zeeb u8 rs_flags; 9928348caeSBjoern A. Zeeb u32 mpdu_cnt_fcs_ok; 10028348caeSBjoern A. Zeeb u32 mpdu_cnt_fcs_err; 10128348caeSBjoern A. Zeeb u32 mpdu_fcs_ok_bitmap[8]; 10228348caeSBjoern A. Zeeb u32 mpdu_ok_byte_count; 10328348caeSBjoern A. Zeeb u32 mpdu_err_byte_count; 10428348caeSBjoern A. Zeeb }; 10528348caeSBjoern A. Zeeb 106dd4f32aeSBjoern A. Zeeb #define HAL_TLV_STATUS_PPDU_NOT_DONE HAL_RX_MON_STATUS_PPDU_NOT_DONE 107dd4f32aeSBjoern A. Zeeb #define HAL_TLV_STATUS_PPDU_DONE HAL_RX_MON_STATUS_PPDU_DONE 108dd4f32aeSBjoern A. Zeeb #define HAL_TLV_STATUS_BUF_DONE HAL_RX_MON_STATUS_BUF_DONE 109dd4f32aeSBjoern A. Zeeb 110dd4f32aeSBjoern A. Zeeb struct hal_sw_mon_ring_entries { 111dd4f32aeSBjoern A. Zeeb dma_addr_t mon_dst_paddr; 112dd4f32aeSBjoern A. Zeeb dma_addr_t mon_status_paddr; 113dd4f32aeSBjoern A. Zeeb u32 mon_dst_sw_cookie; 114dd4f32aeSBjoern A. Zeeb u32 mon_status_sw_cookie; 115dd4f32aeSBjoern A. Zeeb void *dst_buf_addr_info; 116dd4f32aeSBjoern A. Zeeb void *status_buf_addr_info; 117dd4f32aeSBjoern A. Zeeb u16 ppdu_id; 118dd4f32aeSBjoern A. Zeeb u8 status_buf_count; 119dd4f32aeSBjoern A. Zeeb u8 msdu_cnt; 120dd4f32aeSBjoern A. Zeeb bool end_of_ppdu; 121dd4f32aeSBjoern A. Zeeb bool drop_ppdu; 122dd4f32aeSBjoern A. Zeeb }; 123dd4f32aeSBjoern A. Zeeb 124dd4f32aeSBjoern A. Zeeb struct hal_rx_mon_ppdu_info { 125dd4f32aeSBjoern A. Zeeb u32 ppdu_id; 126dd4f32aeSBjoern A. Zeeb u32 ppdu_ts; 127dd4f32aeSBjoern A. Zeeb u32 num_mpdu_fcs_ok; 128dd4f32aeSBjoern A. Zeeb u32 num_mpdu_fcs_err; 129dd4f32aeSBjoern A. Zeeb u32 preamble_type; 130dd4f32aeSBjoern A. Zeeb u16 chan_num; 131dd4f32aeSBjoern A. Zeeb u16 tcp_msdu_count; 132dd4f32aeSBjoern A. Zeeb u16 tcp_ack_msdu_count; 133dd4f32aeSBjoern A. Zeeb u16 udp_msdu_count; 134dd4f32aeSBjoern A. Zeeb u16 other_msdu_count; 135dd4f32aeSBjoern A. Zeeb u16 peer_id; 136dd4f32aeSBjoern A. Zeeb u8 rate; 137dd4f32aeSBjoern A. Zeeb u8 mcs; 138dd4f32aeSBjoern A. Zeeb u8 nss; 139dd4f32aeSBjoern A. Zeeb u8 bw; 14028348caeSBjoern A. Zeeb u8 vht_flag_values1; 14128348caeSBjoern A. Zeeb u8 vht_flag_values2; 14228348caeSBjoern A. Zeeb u8 vht_flag_values3[4]; 14328348caeSBjoern A. Zeeb u8 vht_flag_values4; 14428348caeSBjoern A. Zeeb u8 vht_flag_values5; 14528348caeSBjoern A. Zeeb u16 vht_flag_values6; 146dd4f32aeSBjoern A. Zeeb u8 is_stbc; 147dd4f32aeSBjoern A. Zeeb u8 gi; 148dd4f32aeSBjoern A. Zeeb u8 ldpc; 149dd4f32aeSBjoern A. Zeeb u8 beamformed; 150dd4f32aeSBjoern A. Zeeb u8 rssi_comb; 151dd4f32aeSBjoern A. Zeeb u8 rssi_chain_pri20[HAL_RX_MAX_NSS]; 152dd4f32aeSBjoern A. Zeeb u8 tid; 15328348caeSBjoern A. Zeeb u16 ht_flags; 15428348caeSBjoern A. Zeeb u16 vht_flags; 15528348caeSBjoern A. Zeeb u16 he_flags; 15628348caeSBjoern A. Zeeb u16 he_mu_flags; 157dd4f32aeSBjoern A. Zeeb u8 dcm; 158dd4f32aeSBjoern A. Zeeb u8 ru_alloc; 159dd4f32aeSBjoern A. Zeeb u8 reception_type; 16028348caeSBjoern A. Zeeb u64 tsft; 161dd4f32aeSBjoern A. Zeeb u64 rx_duration; 16228348caeSBjoern A. Zeeb u16 frame_control; 16328348caeSBjoern A. Zeeb u32 ast_index; 16428348caeSBjoern A. Zeeb u8 rs_fcs_err; 16528348caeSBjoern A. Zeeb u8 rs_flags; 16628348caeSBjoern A. Zeeb u8 cck_flag; 16728348caeSBjoern A. Zeeb u8 ofdm_flag; 16828348caeSBjoern A. Zeeb u8 ulofdma_flag; 16928348caeSBjoern A. Zeeb u8 frame_control_info_valid; 17028348caeSBjoern A. Zeeb u16 he_per_user_1; 17128348caeSBjoern A. Zeeb u16 he_per_user_2; 17228348caeSBjoern A. Zeeb u8 he_per_user_position; 17328348caeSBjoern A. Zeeb u8 he_per_user_known; 17428348caeSBjoern A. Zeeb u16 he_flags1; 17528348caeSBjoern A. Zeeb u16 he_flags2; 17628348caeSBjoern A. Zeeb u8 he_RU[4]; 17728348caeSBjoern A. Zeeb u16 he_data1; 17828348caeSBjoern A. Zeeb u16 he_data2; 17928348caeSBjoern A. Zeeb u16 he_data3; 18028348caeSBjoern A. Zeeb u16 he_data4; 18128348caeSBjoern A. Zeeb u16 he_data5; 18228348caeSBjoern A. Zeeb u16 he_data6; 18328348caeSBjoern A. Zeeb u32 ppdu_len; 18428348caeSBjoern A. Zeeb u32 prev_ppdu_id; 18528348caeSBjoern A. Zeeb u32 device_id; 18628348caeSBjoern A. Zeeb u16 first_data_seq_ctrl; 18728348caeSBjoern A. Zeeb u8 monitor_direct_used; 18828348caeSBjoern A. Zeeb u8 data_sequence_control_info_valid; 18928348caeSBjoern A. Zeeb u8 ltf_size; 19028348caeSBjoern A. Zeeb u8 rxpcu_filter_pass; 19128348caeSBjoern A. Zeeb char rssi_chain[8][8]; 19228348caeSBjoern A. Zeeb struct hal_rx_user_status userstats; 193dd4f32aeSBjoern A. Zeeb }; 194dd4f32aeSBjoern A. Zeeb 195dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_START_INFO0_PPDU_ID GENMASK(15, 0) 196dd4f32aeSBjoern A. Zeeb 197dd4f32aeSBjoern A. Zeeb struct hal_rx_ppdu_start { 198dd4f32aeSBjoern A. Zeeb __le32 info0; 199dd4f32aeSBjoern A. Zeeb __le32 chan_num; 200dd4f32aeSBjoern A. Zeeb __le32 ppdu_start_ts; 201dd4f32aeSBjoern A. Zeeb } __packed; 202dd4f32aeSBjoern A. Zeeb 203dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_INFO0_MPDU_CNT_FCS_ERR GENMASK(25, 16) 204dd4f32aeSBjoern A. Zeeb 205dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_INFO1_MPDU_CNT_FCS_OK GENMASK(8, 0) 206dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_INFO1_FC_VALID BIT(9) 207dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_INFO1_QOS_CTRL_VALID BIT(10) 208dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_INFO1_HT_CTRL_VALID BIT(11) 209dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_INFO1_PKT_TYPE GENMASK(23, 20) 210dd4f32aeSBjoern A. Zeeb 211dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_INFO2_AST_INDEX GENMASK(15, 0) 212dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_INFO2_FRAME_CTRL GENMASK(31, 16) 213dd4f32aeSBjoern A. Zeeb 214dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_INFO3_QOS_CTRL GENMASK(31, 16) 215dd4f32aeSBjoern A. Zeeb 216dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_INFO4_UDP_MSDU_CNT GENMASK(15, 0) 217dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_INFO4_TCP_MSDU_CNT GENMASK(31, 16) 218dd4f32aeSBjoern A. Zeeb 219dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_INFO5_OTHER_MSDU_CNT GENMASK(15, 0) 220dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_INFO5_TCP_ACK_MSDU_CNT GENMASK(31, 16) 221dd4f32aeSBjoern A. Zeeb 222dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_INFO6_TID_BITMAP GENMASK(15, 0) 223dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_INFO6_TID_EOSP_BITMAP GENMASK(31, 16) 224dd4f32aeSBjoern A. Zeeb 22528348caeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_RSVD2_6_MPDU_OK_BYTE_COUNT GENMASK(24, 0) 22628348caeSBjoern A. Zeeb #define HAL_RX_PPDU_END_USER_STATS_RSVD2_8_MPDU_ERR_BYTE_COUNT GENMASK(24, 0) 22728348caeSBjoern A. Zeeb 228dd4f32aeSBjoern A. Zeeb struct hal_rx_ppdu_end_user_stats { 229dd4f32aeSBjoern A. Zeeb __le32 rsvd0[2]; 230dd4f32aeSBjoern A. Zeeb __le32 info0; 231dd4f32aeSBjoern A. Zeeb __le32 info1; 232dd4f32aeSBjoern A. Zeeb __le32 info2; 233dd4f32aeSBjoern A. Zeeb __le32 info3; 234dd4f32aeSBjoern A. Zeeb __le32 ht_ctrl; 235dd4f32aeSBjoern A. Zeeb __le32 rsvd1[2]; 236dd4f32aeSBjoern A. Zeeb __le32 info4; 237dd4f32aeSBjoern A. Zeeb __le32 info5; 238dd4f32aeSBjoern A. Zeeb __le32 info6; 239dd4f32aeSBjoern A. Zeeb __le32 rsvd2[11]; 240dd4f32aeSBjoern A. Zeeb } __packed; 241dd4f32aeSBjoern A. Zeeb 24228348caeSBjoern A. Zeeb struct hal_rx_ppdu_end_user_stats_ext { 24328348caeSBjoern A. Zeeb u32 info0; 24428348caeSBjoern A. Zeeb u32 info1; 24528348caeSBjoern A. Zeeb u32 info2; 24628348caeSBjoern A. Zeeb u32 info3; 24728348caeSBjoern A. Zeeb u32 info4; 24828348caeSBjoern A. Zeeb u32 info5; 24928348caeSBjoern A. Zeeb u32 info6; 25028348caeSBjoern A. Zeeb } __packed; 25128348caeSBjoern A. Zeeb 252dd4f32aeSBjoern A. Zeeb #define HAL_RX_HT_SIG_INFO_INFO0_MCS GENMASK(6, 0) 253dd4f32aeSBjoern A. Zeeb #define HAL_RX_HT_SIG_INFO_INFO0_BW BIT(7) 254dd4f32aeSBjoern A. Zeeb 255dd4f32aeSBjoern A. Zeeb #define HAL_RX_HT_SIG_INFO_INFO1_STBC GENMASK(5, 4) 256dd4f32aeSBjoern A. Zeeb #define HAL_RX_HT_SIG_INFO_INFO1_FEC_CODING BIT(6) 257dd4f32aeSBjoern A. Zeeb #define HAL_RX_HT_SIG_INFO_INFO1_GI BIT(7) 258dd4f32aeSBjoern A. Zeeb 259dd4f32aeSBjoern A. Zeeb struct hal_rx_ht_sig_info { 260dd4f32aeSBjoern A. Zeeb __le32 info0; 261dd4f32aeSBjoern A. Zeeb __le32 info1; 262dd4f32aeSBjoern A. Zeeb } __packed; 263dd4f32aeSBjoern A. Zeeb 264dd4f32aeSBjoern A. Zeeb #define HAL_RX_LSIG_B_INFO_INFO0_RATE GENMASK(3, 0) 265dd4f32aeSBjoern A. Zeeb #define HAL_RX_LSIG_B_INFO_INFO0_LEN GENMASK(15, 4) 266dd4f32aeSBjoern A. Zeeb 267dd4f32aeSBjoern A. Zeeb struct hal_rx_lsig_b_info { 268dd4f32aeSBjoern A. Zeeb __le32 info0; 269dd4f32aeSBjoern A. Zeeb } __packed; 270dd4f32aeSBjoern A. Zeeb 271dd4f32aeSBjoern A. Zeeb #define HAL_RX_LSIG_A_INFO_INFO0_RATE GENMASK(3, 0) 272dd4f32aeSBjoern A. Zeeb #define HAL_RX_LSIG_A_INFO_INFO0_LEN GENMASK(16, 5) 273dd4f32aeSBjoern A. Zeeb #define HAL_RX_LSIG_A_INFO_INFO0_PKT_TYPE GENMASK(27, 24) 274dd4f32aeSBjoern A. Zeeb 275dd4f32aeSBjoern A. Zeeb struct hal_rx_lsig_a_info { 276dd4f32aeSBjoern A. Zeeb __le32 info0; 277dd4f32aeSBjoern A. Zeeb } __packed; 278dd4f32aeSBjoern A. Zeeb 279dd4f32aeSBjoern A. Zeeb #define HAL_RX_VHT_SIG_A_INFO_INFO0_BW GENMASK(1, 0) 280dd4f32aeSBjoern A. Zeeb #define HAL_RX_VHT_SIG_A_INFO_INFO0_STBC BIT(3) 281dd4f32aeSBjoern A. Zeeb #define HAL_RX_VHT_SIG_A_INFO_INFO0_GROUP_ID GENMASK(9, 4) 282dd4f32aeSBjoern A. Zeeb #define HAL_RX_VHT_SIG_A_INFO_INFO0_NSTS GENMASK(21, 10) 283dd4f32aeSBjoern A. Zeeb 284dd4f32aeSBjoern A. Zeeb #define HAL_RX_VHT_SIG_A_INFO_INFO1_GI_SETTING GENMASK(1, 0) 285dd4f32aeSBjoern A. Zeeb #define HAL_RX_VHT_SIG_A_INFO_INFO1_SU_MU_CODING BIT(2) 286dd4f32aeSBjoern A. Zeeb #define HAL_RX_VHT_SIG_A_INFO_INFO1_MCS GENMASK(7, 4) 287dd4f32aeSBjoern A. Zeeb #define HAL_RX_VHT_SIG_A_INFO_INFO1_BEAMFORMED BIT(8) 288dd4f32aeSBjoern A. Zeeb 289dd4f32aeSBjoern A. Zeeb struct hal_rx_vht_sig_a_info { 290dd4f32aeSBjoern A. Zeeb __le32 info0; 291dd4f32aeSBjoern A. Zeeb __le32 info1; 292dd4f32aeSBjoern A. Zeeb } __packed; 293dd4f32aeSBjoern A. Zeeb 294dd4f32aeSBjoern A. Zeeb enum hal_rx_vht_sig_a_gi_setting { 295dd4f32aeSBjoern A. Zeeb HAL_RX_VHT_SIG_A_NORMAL_GI = 0, 296dd4f32aeSBjoern A. Zeeb HAL_RX_VHT_SIG_A_SHORT_GI = 1, 297dd4f32aeSBjoern A. Zeeb HAL_RX_VHT_SIG_A_SHORT_GI_AMBIGUITY = 3, 298dd4f32aeSBjoern A. Zeeb }; 299dd4f32aeSBjoern A. Zeeb 30028348caeSBjoern A. Zeeb #define HAL_RX_SU_MU_CODING_LDPC 0x01 30128348caeSBjoern A. Zeeb 30228348caeSBjoern A. Zeeb #define HE_GI_0_8 0 30328348caeSBjoern A. Zeeb #define HE_GI_0_4 1 30428348caeSBjoern A. Zeeb #define HE_GI_1_6 2 30528348caeSBjoern A. Zeeb #define HE_GI_3_2 3 30628348caeSBjoern A. Zeeb 30728348caeSBjoern A. Zeeb #define HE_LTF_1_X 0 30828348caeSBjoern A. Zeeb #define HE_LTF_2_X 1 30928348caeSBjoern A. Zeeb #define HE_LTF_4_X 2 31028348caeSBjoern A. Zeeb #define HE_LTF_UNKNOWN 3 31128348caeSBjoern A. Zeeb 312dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_TRANSMIT_MCS GENMASK(6, 3) 313dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_DCM BIT(7) 314dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_TRANSMIT_BW GENMASK(20, 19) 315dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_CP_LTF_SIZE GENMASK(22, 21) 316dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_NSTS GENMASK(25, 23) 31728348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_BSS_COLOR GENMASK(13, 8) 31828348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_SPATIAL_REUSE GENMASK(18, 15) 31928348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_FORMAT_IND BIT(0) 32028348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_BEAM_CHANGE BIT(1) 32128348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_DL_UL_FLAG BIT(2) 322dd4f32aeSBjoern A. Zeeb 32328348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO1_TXOP_DURATION GENMASK(6, 0) 324dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO1_CODING BIT(7) 32528348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO1_LDPC_EXTRA BIT(8) 326dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO1_STBC BIT(9) 327dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO1_TXBF BIT(10) 32828348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO1_PKT_EXT_FACTOR GENMASK(12, 11) 32928348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO1_PKT_EXT_PE_DISAM BIT(13) 33028348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_SU_INFO_INFO1_DOPPLER_IND BIT(15) 331dd4f32aeSBjoern A. Zeeb 332dd4f32aeSBjoern A. Zeeb struct hal_rx_he_sig_a_su_info { 333dd4f32aeSBjoern A. Zeeb __le32 info0; 334dd4f32aeSBjoern A. Zeeb __le32 info1; 335dd4f32aeSBjoern A. Zeeb } __packed; 336dd4f32aeSBjoern A. Zeeb 33728348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_UL_FLAG BIT(1) 33828348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_MCS_OF_SIGB GENMASK(3, 1) 33928348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_DCM_OF_SIGB BIT(4) 34028348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_BSS_COLOR GENMASK(10, 5) 34128348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_SPATIAL_REUSE GENMASK(14, 11) 342dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_TRANSMIT_BW GENMASK(17, 15) 34328348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_NUM_SIGB_SYMB GENMASK(21, 18) 34428348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_COMP_MODE_SIGB BIT(22) 345dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_CP_LTF_SIZE GENMASK(24, 23) 34628348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_DOPPLER_INDICATION BIT(25) 347dd4f32aeSBjoern A. Zeeb 34828348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_TXOP_DURATION GENMASK(6, 0) 34928348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_CODING BIT(7) 35028348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_NUM_LTF_SYMB GENMASK(10, 8) 35128348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_LDPC_EXTRA BIT(11) 352dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_STBC BIT(12) 35328348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_TXBF BIT(10) 35428348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_PKT_EXT_FACTOR GENMASK(14, 13) 35528348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_PKT_EXT_PE_DISAM BIT(15) 356dd4f32aeSBjoern A. Zeeb 357dd4f32aeSBjoern A. Zeeb struct hal_rx_he_sig_a_mu_dl_info { 358dd4f32aeSBjoern A. Zeeb __le32 info0; 359dd4f32aeSBjoern A. Zeeb __le32 info1; 360dd4f32aeSBjoern A. Zeeb } __packed; 361dd4f32aeSBjoern A. Zeeb 362dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_B1_MU_INFO_INFO0_RU_ALLOCATION GENMASK(7, 0) 363dd4f32aeSBjoern A. Zeeb 364dd4f32aeSBjoern A. Zeeb struct hal_rx_he_sig_b1_mu_info { 365dd4f32aeSBjoern A. Zeeb __le32 info0; 366dd4f32aeSBjoern A. Zeeb } __packed; 367dd4f32aeSBjoern A. Zeeb 36828348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_ID GENMASK(10, 0) 369dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_MCS GENMASK(18, 15) 370dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_CODING BIT(20) 371dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_NSTS GENMASK(31, 29) 372dd4f32aeSBjoern A. Zeeb 373dd4f32aeSBjoern A. Zeeb struct hal_rx_he_sig_b2_mu_info { 374dd4f32aeSBjoern A. Zeeb __le32 info0; 375dd4f32aeSBjoern A. Zeeb } __packed; 376dd4f32aeSBjoern A. Zeeb 37728348caeSBjoern A. Zeeb #define HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_ID GENMASK(10, 0) 378dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_NSTS GENMASK(13, 11) 379dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_TXBF BIT(19) 380dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_MCS GENMASK(18, 15) 381dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_DCM BIT(19) 382dd4f32aeSBjoern A. Zeeb #define HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_CODING BIT(20) 383dd4f32aeSBjoern A. Zeeb 384dd4f32aeSBjoern A. Zeeb struct hal_rx_he_sig_b2_ofdma_info { 385dd4f32aeSBjoern A. Zeeb __le32 info0; 386dd4f32aeSBjoern A. Zeeb } __packed; 387dd4f32aeSBjoern A. Zeeb 38828348caeSBjoern A. Zeeb #define HAL_RX_PHYRX_RSSI_LEGACY_INFO_INFO0_RSSI_COMB GENMASK(15, 8) 389dd4f32aeSBjoern A. Zeeb 390dd4f32aeSBjoern A. Zeeb #define HAL_RX_PHYRX_RSSI_PREAMBLE_PRI20 GENMASK(7, 0) 391dd4f32aeSBjoern A. Zeeb 392dd4f32aeSBjoern A. Zeeb struct hal_rx_phyrx_chain_rssi { 393dd4f32aeSBjoern A. Zeeb __le32 rssi_2040; 394dd4f32aeSBjoern A. Zeeb __le32 rssi_80; 395dd4f32aeSBjoern A. Zeeb } __packed; 396dd4f32aeSBjoern A. Zeeb 397dd4f32aeSBjoern A. Zeeb struct hal_rx_phyrx_rssi_legacy_info { 398dd4f32aeSBjoern A. Zeeb __le32 rsvd[3]; 399dd4f32aeSBjoern A. Zeeb struct hal_rx_phyrx_chain_rssi pre_rssi[HAL_RX_MAX_NSS]; 400dd4f32aeSBjoern A. Zeeb struct hal_rx_phyrx_chain_rssi preamble[HAL_RX_MAX_NSS]; 401dd4f32aeSBjoern A. Zeeb __le32 info0; 402dd4f32aeSBjoern A. Zeeb } __packed; 403dd4f32aeSBjoern A. Zeeb 404dd4f32aeSBjoern A. Zeeb #define HAL_RX_MPDU_INFO_INFO0_PEERID GENMASK(31, 16) 405dd4f32aeSBjoern A. Zeeb #define HAL_RX_MPDU_INFO_INFO0_PEERID_WCN6855 GENMASK(15, 0) 40628348caeSBjoern A. Zeeb #define HAL_RX_MPDU_INFO_INFO1_MPDU_LEN GENMASK(13, 0) 407dd4f32aeSBjoern A. Zeeb 40828348caeSBjoern A. Zeeb struct hal_rx_mpdu_info_ipq8074 { 409dd4f32aeSBjoern A. Zeeb __le32 rsvd0; 410dd4f32aeSBjoern A. Zeeb __le32 info0; 41128348caeSBjoern A. Zeeb __le32 rsvd1[11]; 41228348caeSBjoern A. Zeeb __le32 info1; 41328348caeSBjoern A. Zeeb __le32 rsvd2[9]; 41428348caeSBjoern A. Zeeb } __packed; 41528348caeSBjoern A. Zeeb 41628348caeSBjoern A. Zeeb struct hal_rx_mpdu_info_qcn9074 { 41728348caeSBjoern A. Zeeb __le32 rsvd0[10]; 41828348caeSBjoern A. Zeeb __le32 info0; 41928348caeSBjoern A. Zeeb __le32 rsvd1[2]; 42028348caeSBjoern A. Zeeb __le32 info1; 42128348caeSBjoern A. Zeeb __le32 rsvd2[9]; 422dd4f32aeSBjoern A. Zeeb } __packed; 423dd4f32aeSBjoern A. Zeeb 424dd4f32aeSBjoern A. Zeeb struct hal_rx_mpdu_info_wcn6855 { 425dd4f32aeSBjoern A. Zeeb __le32 rsvd0[8]; 426dd4f32aeSBjoern A. Zeeb __le32 info0; 427dd4f32aeSBjoern A. Zeeb __le32 rsvd1[14]; 428dd4f32aeSBjoern A. Zeeb } __packed; 429dd4f32aeSBjoern A. Zeeb 43028348caeSBjoern A. Zeeb struct hal_rx_mpdu_info { 43128348caeSBjoern A. Zeeb union { 43228348caeSBjoern A. Zeeb struct hal_rx_mpdu_info_ipq8074 ipq8074; 43328348caeSBjoern A. Zeeb struct hal_rx_mpdu_info_qcn9074 qcn9074; 43428348caeSBjoern A. Zeeb struct hal_rx_mpdu_info_wcn6855 wcn6855; 43528348caeSBjoern A. Zeeb } u; 43628348caeSBjoern A. Zeeb } __packed; 43728348caeSBjoern A. Zeeb 438dd4f32aeSBjoern A. Zeeb #define HAL_RX_PPDU_END_DURATION GENMASK(23, 0) 439dd4f32aeSBjoern A. Zeeb struct hal_rx_ppdu_end_duration { 440dd4f32aeSBjoern A. Zeeb __le32 rsvd0[9]; 441dd4f32aeSBjoern A. Zeeb __le32 info0; 442dd4f32aeSBjoern A. Zeeb __le32 rsvd1[4]; 443dd4f32aeSBjoern A. Zeeb } __packed; 444dd4f32aeSBjoern A. Zeeb 445dd4f32aeSBjoern A. Zeeb struct hal_rx_rxpcu_classification_overview { 446dd4f32aeSBjoern A. Zeeb u32 rsvd0; 447dd4f32aeSBjoern A. Zeeb } __packed; 448dd4f32aeSBjoern A. Zeeb 449dd4f32aeSBjoern A. Zeeb struct hal_rx_msdu_desc_info { 450dd4f32aeSBjoern A. Zeeb u32 msdu_flags; 451dd4f32aeSBjoern A. Zeeb u16 msdu_len; /* 14 bits for length */ 452dd4f32aeSBjoern A. Zeeb }; 453dd4f32aeSBjoern A. Zeeb 454dd4f32aeSBjoern A. Zeeb #define HAL_RX_NUM_MSDU_DESC 6 455dd4f32aeSBjoern A. Zeeb struct hal_rx_msdu_list { 456dd4f32aeSBjoern A. Zeeb struct hal_rx_msdu_desc_info msdu_info[HAL_RX_NUM_MSDU_DESC]; 457dd4f32aeSBjoern A. Zeeb u32 sw_cookie[HAL_RX_NUM_MSDU_DESC]; 458dd4f32aeSBjoern A. Zeeb u8 rbm[HAL_RX_NUM_MSDU_DESC]; 459dd4f32aeSBjoern A. Zeeb }; 460dd4f32aeSBjoern A. Zeeb 461dd4f32aeSBjoern A. Zeeb void ath11k_hal_reo_status_queue_stats(struct ath11k_base *ab, u32 *reo_desc, 462dd4f32aeSBjoern A. Zeeb struct hal_reo_status *status); 463dd4f32aeSBjoern A. Zeeb void ath11k_hal_reo_flush_queue_status(struct ath11k_base *ab, u32 *reo_desc, 464dd4f32aeSBjoern A. Zeeb struct hal_reo_status *status); 465dd4f32aeSBjoern A. Zeeb void ath11k_hal_reo_flush_cache_status(struct ath11k_base *ab, u32 *reo_desc, 466dd4f32aeSBjoern A. Zeeb struct hal_reo_status *status); 467dd4f32aeSBjoern A. Zeeb void ath11k_hal_reo_flush_cache_status(struct ath11k_base *ab, u32 *reo_desc, 468dd4f32aeSBjoern A. Zeeb struct hal_reo_status *status); 469dd4f32aeSBjoern A. Zeeb void ath11k_hal_reo_unblk_cache_status(struct ath11k_base *ab, u32 *reo_desc, 470dd4f32aeSBjoern A. Zeeb struct hal_reo_status *status); 471dd4f32aeSBjoern A. Zeeb void ath11k_hal_reo_flush_timeout_list_status(struct ath11k_base *ab, 472dd4f32aeSBjoern A. Zeeb u32 *reo_desc, 473dd4f32aeSBjoern A. Zeeb struct hal_reo_status *status); 474dd4f32aeSBjoern A. Zeeb void ath11k_hal_reo_desc_thresh_reached_status(struct ath11k_base *ab, 475dd4f32aeSBjoern A. Zeeb u32 *reo_desc, 476dd4f32aeSBjoern A. Zeeb struct hal_reo_status *status); 477dd4f32aeSBjoern A. Zeeb void ath11k_hal_reo_update_rx_reo_queue_status(struct ath11k_base *ab, 478dd4f32aeSBjoern A. Zeeb u32 *reo_desc, 479dd4f32aeSBjoern A. Zeeb struct hal_reo_status *status); 480dd4f32aeSBjoern A. Zeeb int ath11k_hal_reo_process_status(u8 *reo_desc, u8 *status); 481dd4f32aeSBjoern A. Zeeb void ath11k_hal_rx_msdu_link_info_get(void *link_desc, u32 *num_msdus, 482dd4f32aeSBjoern A. Zeeb u32 *msdu_cookies, 483dd4f32aeSBjoern A. Zeeb enum hal_rx_buf_return_buf_manager *rbm); 484dd4f32aeSBjoern A. Zeeb void ath11k_hal_rx_msdu_link_desc_set(struct ath11k_base *ab, void *desc, 485dd4f32aeSBjoern A. Zeeb void *link_desc, 486dd4f32aeSBjoern A. Zeeb enum hal_wbm_rel_bm_act action); 487dd4f32aeSBjoern A. Zeeb void ath11k_hal_rx_buf_addr_info_set(void *desc, dma_addr_t paddr, 488dd4f32aeSBjoern A. Zeeb u32 cookie, u8 manager); 489dd4f32aeSBjoern A. Zeeb void ath11k_hal_rx_buf_addr_info_get(void *desc, dma_addr_t *paddr, 490dd4f32aeSBjoern A. Zeeb u32 *cookie, u8 *rbm); 491dd4f32aeSBjoern A. Zeeb int ath11k_hal_desc_reo_parse_err(struct ath11k_base *ab, u32 *rx_desc, 492dd4f32aeSBjoern A. Zeeb dma_addr_t *paddr, u32 *desc_bank); 493dd4f32aeSBjoern A. Zeeb int ath11k_hal_wbm_desc_parse_err(struct ath11k_base *ab, void *desc, 494dd4f32aeSBjoern A. Zeeb struct hal_rx_wbm_rel_info *rel_info); 495dd4f32aeSBjoern A. Zeeb void ath11k_hal_rx_reo_ent_paddr_get(struct ath11k_base *ab, void *desc, 496dd4f32aeSBjoern A. Zeeb dma_addr_t *paddr, u32 *desc_bank); 497dd4f32aeSBjoern A. Zeeb void ath11k_hal_rx_reo_ent_buf_paddr_get(void *rx_desc, 498dd4f32aeSBjoern A. Zeeb dma_addr_t *paddr, u32 *sw_cookie, 499dd4f32aeSBjoern A. Zeeb void **pp_buf_addr_info, u8 *rbm, 500dd4f32aeSBjoern A. Zeeb u32 *msdu_cnt); 501dd4f32aeSBjoern A. Zeeb void 502dd4f32aeSBjoern A. Zeeb ath11k_hal_rx_sw_mon_ring_buf_paddr_get(void *rx_desc, 503dd4f32aeSBjoern A. Zeeb struct hal_sw_mon_ring_entries *sw_mon_ent); 504dd4f32aeSBjoern A. Zeeb enum hal_rx_mon_status 505dd4f32aeSBjoern A. Zeeb ath11k_hal_rx_parse_mon_status(struct ath11k_base *ab, 506dd4f32aeSBjoern A. Zeeb struct hal_rx_mon_ppdu_info *ppdu_info, 507dd4f32aeSBjoern A. Zeeb struct sk_buff *skb); 508dd4f32aeSBjoern A. Zeeb 509dd4f32aeSBjoern A. Zeeb #define REO_QUEUE_DESC_MAGIC_DEBUG_PATTERN_0 0xDDBEEF 510dd4f32aeSBjoern A. Zeeb #define REO_QUEUE_DESC_MAGIC_DEBUG_PATTERN_1 0xADBEEF 511dd4f32aeSBjoern A. Zeeb #define REO_QUEUE_DESC_MAGIC_DEBUG_PATTERN_2 0xBDBEEF 512dd4f32aeSBjoern A. Zeeb #define REO_QUEUE_DESC_MAGIC_DEBUG_PATTERN_3 0xCDBEEF 513dd4f32aeSBjoern A. Zeeb #endif 514