1dd4f32aeSBjoern A. Zeeb /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2dd4f32aeSBjoern A. Zeeb /* 3dd4f32aeSBjoern A. Zeeb * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 428348caeSBjoern A. Zeeb * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 5dd4f32aeSBjoern A. Zeeb */ 6dd4f32aeSBjoern A. Zeeb 7dd4f32aeSBjoern A. Zeeb #ifndef ATH11K_QMI_H 8dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_H 9dd4f32aeSBjoern A. Zeeb 10dd4f32aeSBjoern A. Zeeb #if defined(__FreeBSD__) 11dd4f32aeSBjoern A. Zeeb #include <linux/types.h> 12dd4f32aeSBjoern A. Zeeb #include <linux/list.h> 13dd4f32aeSBjoern A. Zeeb #endif 14dd4f32aeSBjoern A. Zeeb #include <linux/mutex.h> 15dd4f32aeSBjoern A. Zeeb #include <linux/soc/qcom/qmi.h> 16dd4f32aeSBjoern A. Zeeb 17dd4f32aeSBjoern A. Zeeb #define ATH11K_HOST_VERSION_STRING "WIN" 18dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_WLANFW_TIMEOUT_MS 10000 19dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_MAX_BDF_FILE_NAME_SIZE 64 20dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_CALDB_ADDRESS 0x4BA00000 21dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 128 22dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_WLFW_SERVICE_ID_V01 0x45 23dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_WLFW_SERVICE_VERS_V01 0x01 24dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01 0x02 25dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390 0x01 26dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074 0x02 27dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9074 0x07 2828348caeSBjoern A. Zeeb #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_WCN6750 0x03 29dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 32 30dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_RESP_LEN_MAX 8192 31dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01 52 32dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_CALDB_SIZE 0x480000 33dd4f32aeSBjoern A. Zeeb #define ATH11K_QMI_BDF_EXT_STR_LENGTH 0x20 3428348caeSBjoern A. Zeeb #define ATH11K_QMI_FW_MEM_REQ_SEGMENT_CNT 5 35dd4f32aeSBjoern A. Zeeb 36dd4f32aeSBjoern A. Zeeb #define QMI_WLFW_REQUEST_MEM_IND_V01 0x0035 37dd4f32aeSBjoern A. Zeeb #define QMI_WLFW_FW_MEM_READY_IND_V01 0x0037 3828348caeSBjoern A. Zeeb #define QMI_WLFW_COLD_BOOT_CAL_DONE_IND_V01 0x003E 3928348caeSBjoern A. Zeeb #define QMI_WLFW_FW_READY_IND_V01 0x0021 4028348caeSBjoern A. Zeeb #define QMI_WLFW_FW_INIT_DONE_IND_V01 0x0038 41dd4f32aeSBjoern A. Zeeb 42dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_MAX_DATA_SIZE_V01 6144 43dd4f32aeSBjoern A. Zeeb #define ATH11K_FIRMWARE_MODE_OFF 4 4428348caeSBjoern A. Zeeb #define ATH11K_COLD_BOOT_FW_RESET_DELAY (60 * HZ) 4528348caeSBjoern A. Zeeb 4628348caeSBjoern A. Zeeb #define ATH11K_QMI_DEVICE_BAR_SIZE 0x200000 47dd4f32aeSBjoern A. Zeeb 48dd4f32aeSBjoern A. Zeeb struct ath11k_base; 49dd4f32aeSBjoern A. Zeeb 50dd4f32aeSBjoern A. Zeeb enum ath11k_qmi_file_type { 51dd4f32aeSBjoern A. Zeeb ATH11K_QMI_FILE_TYPE_BDF_GOLDEN, 52dd4f32aeSBjoern A. Zeeb ATH11K_QMI_FILE_TYPE_CALDATA = 2, 53dd4f32aeSBjoern A. Zeeb ATH11K_QMI_FILE_TYPE_EEPROM, 54dd4f32aeSBjoern A. Zeeb ATH11K_QMI_MAX_FILE_TYPE, 55dd4f32aeSBjoern A. Zeeb }; 56dd4f32aeSBjoern A. Zeeb 57dd4f32aeSBjoern A. Zeeb enum ath11k_qmi_bdf_type { 58dd4f32aeSBjoern A. Zeeb ATH11K_QMI_BDF_TYPE_BIN = 0, 59dd4f32aeSBjoern A. Zeeb ATH11K_QMI_BDF_TYPE_ELF = 1, 60dd4f32aeSBjoern A. Zeeb ATH11K_QMI_BDF_TYPE_REGDB = 4, 61dd4f32aeSBjoern A. Zeeb }; 62dd4f32aeSBjoern A. Zeeb 63dd4f32aeSBjoern A. Zeeb enum ath11k_qmi_event_type { 64dd4f32aeSBjoern A. Zeeb ATH11K_QMI_EVENT_SERVER_ARRIVE, 65dd4f32aeSBjoern A. Zeeb ATH11K_QMI_EVENT_SERVER_EXIT, 66dd4f32aeSBjoern A. Zeeb ATH11K_QMI_EVENT_REQUEST_MEM, 67dd4f32aeSBjoern A. Zeeb ATH11K_QMI_EVENT_FW_MEM_READY, 68dd4f32aeSBjoern A. Zeeb ATH11K_QMI_EVENT_FW_READY, 69dd4f32aeSBjoern A. Zeeb ATH11K_QMI_EVENT_COLD_BOOT_CAL_START, 70dd4f32aeSBjoern A. Zeeb ATH11K_QMI_EVENT_COLD_BOOT_CAL_DONE, 71dd4f32aeSBjoern A. Zeeb ATH11K_QMI_EVENT_REGISTER_DRIVER, 72dd4f32aeSBjoern A. Zeeb ATH11K_QMI_EVENT_UNREGISTER_DRIVER, 73dd4f32aeSBjoern A. Zeeb ATH11K_QMI_EVENT_RECOVERY, 74dd4f32aeSBjoern A. Zeeb ATH11K_QMI_EVENT_FORCE_FW_ASSERT, 75dd4f32aeSBjoern A. Zeeb ATH11K_QMI_EVENT_POWER_UP, 76dd4f32aeSBjoern A. Zeeb ATH11K_QMI_EVENT_POWER_DOWN, 7728348caeSBjoern A. Zeeb ATH11K_QMI_EVENT_FW_INIT_DONE, 78dd4f32aeSBjoern A. Zeeb ATH11K_QMI_EVENT_MAX, 79dd4f32aeSBjoern A. Zeeb }; 80dd4f32aeSBjoern A. Zeeb 81dd4f32aeSBjoern A. Zeeb struct ath11k_qmi_driver_event { 82dd4f32aeSBjoern A. Zeeb struct list_head list; 83dd4f32aeSBjoern A. Zeeb enum ath11k_qmi_event_type type; 84dd4f32aeSBjoern A. Zeeb void *data; 85dd4f32aeSBjoern A. Zeeb }; 86dd4f32aeSBjoern A. Zeeb 87dd4f32aeSBjoern A. Zeeb struct ath11k_qmi_ce_cfg { 88dd4f32aeSBjoern A. Zeeb const struct ce_pipe_config *tgt_ce; 89dd4f32aeSBjoern A. Zeeb int tgt_ce_len; 90dd4f32aeSBjoern A. Zeeb const struct service_to_pipe *svc_to_ce_map; 91dd4f32aeSBjoern A. Zeeb int svc_to_ce_map_len; 92dd4f32aeSBjoern A. Zeeb const u8 *shadow_reg; 93dd4f32aeSBjoern A. Zeeb int shadow_reg_len; 94dd4f32aeSBjoern A. Zeeb u32 *shadow_reg_v2; 95dd4f32aeSBjoern A. Zeeb int shadow_reg_v2_len; 96dd4f32aeSBjoern A. Zeeb }; 97dd4f32aeSBjoern A. Zeeb 98dd4f32aeSBjoern A. Zeeb struct ath11k_qmi_event_msg { 99dd4f32aeSBjoern A. Zeeb struct list_head list; 100dd4f32aeSBjoern A. Zeeb enum ath11k_qmi_event_type type; 101dd4f32aeSBjoern A. Zeeb }; 102dd4f32aeSBjoern A. Zeeb 103dd4f32aeSBjoern A. Zeeb struct target_mem_chunk { 104dd4f32aeSBjoern A. Zeeb u32 size; 105dd4f32aeSBjoern A. Zeeb u32 type; 10628348caeSBjoern A. Zeeb u32 prev_size; 10728348caeSBjoern A. Zeeb u32 prev_type; 108dd4f32aeSBjoern A. Zeeb dma_addr_t paddr; 109dd4f32aeSBjoern A. Zeeb u32 *vaddr; 110dd4f32aeSBjoern A. Zeeb void __iomem *iaddr; 111dd4f32aeSBjoern A. Zeeb }; 112dd4f32aeSBjoern A. Zeeb 113dd4f32aeSBjoern A. Zeeb struct target_info { 114dd4f32aeSBjoern A. Zeeb u32 chip_id; 115dd4f32aeSBjoern A. Zeeb u32 chip_family; 116dd4f32aeSBjoern A. Zeeb u32 board_id; 117dd4f32aeSBjoern A. Zeeb u32 soc_id; 118dd4f32aeSBjoern A. Zeeb u32 fw_version; 119dd4f32aeSBjoern A. Zeeb u32 eeprom_caldata; 120dd4f32aeSBjoern A. Zeeb char fw_build_timestamp[ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 + 1]; 121dd4f32aeSBjoern A. Zeeb char fw_build_id[ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 + 1]; 122dd4f32aeSBjoern A. Zeeb char bdf_ext[ATH11K_QMI_BDF_EXT_STR_LENGTH]; 123dd4f32aeSBjoern A. Zeeb }; 124dd4f32aeSBjoern A. Zeeb 125dd4f32aeSBjoern A. Zeeb struct m3_mem_region { 126dd4f32aeSBjoern A. Zeeb u32 size; 127dd4f32aeSBjoern A. Zeeb dma_addr_t paddr; 128dd4f32aeSBjoern A. Zeeb void *vaddr; 129dd4f32aeSBjoern A. Zeeb }; 130dd4f32aeSBjoern A. Zeeb 131dd4f32aeSBjoern A. Zeeb struct ath11k_qmi { 132dd4f32aeSBjoern A. Zeeb struct ath11k_base *ab; 133dd4f32aeSBjoern A. Zeeb struct qmi_handle handle; 134dd4f32aeSBjoern A. Zeeb struct sockaddr_qrtr sq; 135dd4f32aeSBjoern A. Zeeb struct work_struct event_work; 136dd4f32aeSBjoern A. Zeeb struct workqueue_struct *event_wq; 137dd4f32aeSBjoern A. Zeeb struct list_head event_list; 138dd4f32aeSBjoern A. Zeeb spinlock_t event_lock; /* spinlock for qmi event list */ 139dd4f32aeSBjoern A. Zeeb struct ath11k_qmi_ce_cfg ce_cfg; 140dd4f32aeSBjoern A. Zeeb struct target_mem_chunk target_mem[ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01]; 141dd4f32aeSBjoern A. Zeeb u32 mem_seg_count; 142dd4f32aeSBjoern A. Zeeb u32 target_mem_mode; 143dd4f32aeSBjoern A. Zeeb bool target_mem_delayed; 144dd4f32aeSBjoern A. Zeeb u8 cal_done; 145dd4f32aeSBjoern A. Zeeb struct target_info target; 146dd4f32aeSBjoern A. Zeeb struct m3_mem_region m3_mem; 147dd4f32aeSBjoern A. Zeeb unsigned int service_ins_id; 148dd4f32aeSBjoern A. Zeeb wait_queue_head_t cold_boot_waitq; 149dd4f32aeSBjoern A. Zeeb }; 150dd4f32aeSBjoern A. Zeeb 151dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_HOST_CAP_REQ_MSG_V01_MAX_LEN 261 152dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_HOST_CAP_REQ_V01 0x0034 153dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_HOST_CAP_RESP_MSG_V01_MAX_LEN 7 154dd4f32aeSBjoern A. Zeeb #define QMI_WLFW_HOST_CAP_RESP_V01 0x0034 155dd4f32aeSBjoern A. Zeeb #define QMI_WLFW_MAX_NUM_GPIO_V01 32 156dd4f32aeSBjoern A. Zeeb #define QMI_IPQ8074_FW_MEM_MODE 0xFF 157dd4f32aeSBjoern A. Zeeb #define HOST_DDR_REGION_TYPE 0x1 158dd4f32aeSBjoern A. Zeeb #define BDF_MEM_REGION_TYPE 0x2 159dd4f32aeSBjoern A. Zeeb #define M3_DUMP_REGION_TYPE 0x3 160dd4f32aeSBjoern A. Zeeb #define CALDB_MEM_REGION_TYPE 0x4 161dd4f32aeSBjoern A. Zeeb 162dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_host_cap_req_msg_v01 { 163dd4f32aeSBjoern A. Zeeb u8 num_clients_valid; 164dd4f32aeSBjoern A. Zeeb u32 num_clients; 165dd4f32aeSBjoern A. Zeeb u8 wake_msi_valid; 166dd4f32aeSBjoern A. Zeeb u32 wake_msi; 167dd4f32aeSBjoern A. Zeeb u8 gpios_valid; 168dd4f32aeSBjoern A. Zeeb u32 gpios_len; 169dd4f32aeSBjoern A. Zeeb u32 gpios[QMI_WLFW_MAX_NUM_GPIO_V01]; 170dd4f32aeSBjoern A. Zeeb u8 nm_modem_valid; 171dd4f32aeSBjoern A. Zeeb u8 nm_modem; 172dd4f32aeSBjoern A. Zeeb u8 bdf_support_valid; 173dd4f32aeSBjoern A. Zeeb u8 bdf_support; 174dd4f32aeSBjoern A. Zeeb u8 bdf_cache_support_valid; 175dd4f32aeSBjoern A. Zeeb u8 bdf_cache_support; 176dd4f32aeSBjoern A. Zeeb u8 m3_support_valid; 177dd4f32aeSBjoern A. Zeeb u8 m3_support; 178dd4f32aeSBjoern A. Zeeb u8 m3_cache_support_valid; 179dd4f32aeSBjoern A. Zeeb u8 m3_cache_support; 180dd4f32aeSBjoern A. Zeeb u8 cal_filesys_support_valid; 181dd4f32aeSBjoern A. Zeeb u8 cal_filesys_support; 182dd4f32aeSBjoern A. Zeeb u8 cal_cache_support_valid; 183dd4f32aeSBjoern A. Zeeb u8 cal_cache_support; 184dd4f32aeSBjoern A. Zeeb u8 cal_done_valid; 185dd4f32aeSBjoern A. Zeeb u8 cal_done; 186dd4f32aeSBjoern A. Zeeb u8 mem_bucket_valid; 187dd4f32aeSBjoern A. Zeeb u32 mem_bucket; 188dd4f32aeSBjoern A. Zeeb u8 mem_cfg_mode_valid; 189dd4f32aeSBjoern A. Zeeb u8 mem_cfg_mode; 190dd4f32aeSBjoern A. Zeeb }; 191dd4f32aeSBjoern A. Zeeb 192dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_host_cap_resp_msg_v01 { 193dd4f32aeSBjoern A. Zeeb struct qmi_response_type_v01 resp; 194dd4f32aeSBjoern A. Zeeb }; 195dd4f32aeSBjoern A. Zeeb 196dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_IND_REGISTER_REQ_MSG_V01_MAX_LEN 54 197dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_IND_REGISTER_REQ_V01 0x0020 198dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_IND_REGISTER_RESP_MSG_V01_MAX_LEN 18 199dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_IND_REGISTER_RESP_V01 0x0020 200dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_CLIENT_ID 0x4b4e454c 201dd4f32aeSBjoern A. Zeeb 202dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_ind_register_req_msg_v01 { 203dd4f32aeSBjoern A. Zeeb u8 fw_ready_enable_valid; 204dd4f32aeSBjoern A. Zeeb u8 fw_ready_enable; 205dd4f32aeSBjoern A. Zeeb u8 initiate_cal_download_enable_valid; 206dd4f32aeSBjoern A. Zeeb u8 initiate_cal_download_enable; 207dd4f32aeSBjoern A. Zeeb u8 initiate_cal_update_enable_valid; 208dd4f32aeSBjoern A. Zeeb u8 initiate_cal_update_enable; 209dd4f32aeSBjoern A. Zeeb u8 msa_ready_enable_valid; 210dd4f32aeSBjoern A. Zeeb u8 msa_ready_enable; 211dd4f32aeSBjoern A. Zeeb u8 pin_connect_result_enable_valid; 212dd4f32aeSBjoern A. Zeeb u8 pin_connect_result_enable; 213dd4f32aeSBjoern A. Zeeb u8 client_id_valid; 214dd4f32aeSBjoern A. Zeeb u32 client_id; 215dd4f32aeSBjoern A. Zeeb u8 request_mem_enable_valid; 216dd4f32aeSBjoern A. Zeeb u8 request_mem_enable; 217dd4f32aeSBjoern A. Zeeb u8 fw_mem_ready_enable_valid; 218dd4f32aeSBjoern A. Zeeb u8 fw_mem_ready_enable; 219dd4f32aeSBjoern A. Zeeb u8 fw_init_done_enable_valid; 220dd4f32aeSBjoern A. Zeeb u8 fw_init_done_enable; 221dd4f32aeSBjoern A. Zeeb u8 rejuvenate_enable_valid; 222dd4f32aeSBjoern A. Zeeb u32 rejuvenate_enable; 223dd4f32aeSBjoern A. Zeeb u8 xo_cal_enable_valid; 224dd4f32aeSBjoern A. Zeeb u8 xo_cal_enable; 225dd4f32aeSBjoern A. Zeeb u8 cal_done_enable_valid; 226dd4f32aeSBjoern A. Zeeb u8 cal_done_enable; 227dd4f32aeSBjoern A. Zeeb }; 228dd4f32aeSBjoern A. Zeeb 229dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_ind_register_resp_msg_v01 { 230dd4f32aeSBjoern A. Zeeb struct qmi_response_type_v01 resp; 231dd4f32aeSBjoern A. Zeeb u8 fw_status_valid; 232dd4f32aeSBjoern A. Zeeb u64 fw_status; 233dd4f32aeSBjoern A. Zeeb }; 234dd4f32aeSBjoern A. Zeeb 235dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_REQUEST_MEM_IND_MSG_V01_MAX_LEN 1824 236dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_RESPOND_MEM_REQ_MSG_V01_MAX_LEN 888 237dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_RESPOND_MEM_RESP_MSG_V01_MAX_LEN 7 238dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_REQUEST_MEM_IND_V01 0x0035 239dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_RESPOND_MEM_REQ_V01 0x0036 240dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_RESPOND_MEM_RESP_V01 0x0036 241dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_MAX_NUM_MEM_CFG_V01 2 242dd4f32aeSBjoern A. Zeeb 243dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_mem_cfg_s_v01 { 244dd4f32aeSBjoern A. Zeeb u64 offset; 245dd4f32aeSBjoern A. Zeeb u32 size; 246dd4f32aeSBjoern A. Zeeb u8 secure_flag; 247dd4f32aeSBjoern A. Zeeb }; 248dd4f32aeSBjoern A. Zeeb 249dd4f32aeSBjoern A. Zeeb enum qmi_wlanfw_mem_type_enum_v01 { 250dd4f32aeSBjoern A. Zeeb WLANFW_MEM_TYPE_ENUM_MIN_VAL_V01 = INT_MIN, 251dd4f32aeSBjoern A. Zeeb QMI_WLANFW_MEM_TYPE_MSA_V01 = 0, 252dd4f32aeSBjoern A. Zeeb QMI_WLANFW_MEM_TYPE_DDR_V01 = 1, 253dd4f32aeSBjoern A. Zeeb QMI_WLANFW_MEM_BDF_V01 = 2, 254dd4f32aeSBjoern A. Zeeb QMI_WLANFW_MEM_M3_V01 = 3, 255dd4f32aeSBjoern A. Zeeb QMI_WLANFW_MEM_CAL_V01 = 4, 256dd4f32aeSBjoern A. Zeeb QMI_WLANFW_MEM_DPD_V01 = 5, 257dd4f32aeSBjoern A. Zeeb WLANFW_MEM_TYPE_ENUM_MAX_VAL_V01 = INT_MAX, 258dd4f32aeSBjoern A. Zeeb }; 259dd4f32aeSBjoern A. Zeeb 260dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_mem_seg_s_v01 { 261dd4f32aeSBjoern A. Zeeb u32 size; 262dd4f32aeSBjoern A. Zeeb enum qmi_wlanfw_mem_type_enum_v01 type; 263dd4f32aeSBjoern A. Zeeb u32 mem_cfg_len; 264dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_mem_cfg_s_v01 mem_cfg[QMI_WLANFW_MAX_NUM_MEM_CFG_V01]; 265dd4f32aeSBjoern A. Zeeb }; 266dd4f32aeSBjoern A. Zeeb 267dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_request_mem_ind_msg_v01 { 268dd4f32aeSBjoern A. Zeeb u32 mem_seg_len; 269dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_mem_seg_s_v01 mem_seg[ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01]; 270dd4f32aeSBjoern A. Zeeb }; 271dd4f32aeSBjoern A. Zeeb 272dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_mem_seg_resp_s_v01 { 273dd4f32aeSBjoern A. Zeeb u64 addr; 274dd4f32aeSBjoern A. Zeeb u32 size; 275dd4f32aeSBjoern A. Zeeb enum qmi_wlanfw_mem_type_enum_v01 type; 276dd4f32aeSBjoern A. Zeeb u8 restore; 277dd4f32aeSBjoern A. Zeeb }; 278dd4f32aeSBjoern A. Zeeb 279dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_respond_mem_req_msg_v01 { 280dd4f32aeSBjoern A. Zeeb u32 mem_seg_len; 281dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_mem_seg_resp_s_v01 mem_seg[ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01]; 282dd4f32aeSBjoern A. Zeeb }; 283dd4f32aeSBjoern A. Zeeb 284dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_respond_mem_resp_msg_v01 { 285dd4f32aeSBjoern A. Zeeb struct qmi_response_type_v01 resp; 286dd4f32aeSBjoern A. Zeeb }; 287dd4f32aeSBjoern A. Zeeb 288dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_fw_mem_ready_ind_msg_v01 { 289dd4f32aeSBjoern A. Zeeb char placeholder; 290dd4f32aeSBjoern A. Zeeb }; 291dd4f32aeSBjoern A. Zeeb 292dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_fw_ready_ind_msg_v01 { 293dd4f32aeSBjoern A. Zeeb char placeholder; 294dd4f32aeSBjoern A. Zeeb }; 295dd4f32aeSBjoern A. Zeeb 296dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_fw_cold_cal_done_ind_msg_v01 { 297dd4f32aeSBjoern A. Zeeb char placeholder; 298dd4f32aeSBjoern A. Zeeb }; 299dd4f32aeSBjoern A. Zeeb 30028348caeSBjoern A. Zeeb struct qmi_wlfw_fw_init_done_ind_msg_v01 { 30128348caeSBjoern A. Zeeb char placeholder; 30228348caeSBjoern A. Zeeb }; 30328348caeSBjoern A. Zeeb 304dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_CAP_REQ_MSG_V01_MAX_LEN 0 305dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_CAP_RESP_MSG_V01_MAX_LEN 235 306dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_CAP_REQ_V01 0x0024 307dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_CAP_RESP_V01 0x0024 30828348caeSBjoern A. Zeeb #define QMI_WLANFW_DEVICE_INFO_REQ_V01 0x004C 30928348caeSBjoern A. Zeeb #define QMI_WLANFW_DEVICE_INFO_REQ_MSG_V01_MAX_LEN 0 310dd4f32aeSBjoern A. Zeeb 311dd4f32aeSBjoern A. Zeeb enum qmi_wlanfw_pipedir_enum_v01 { 312dd4f32aeSBjoern A. Zeeb QMI_WLFW_PIPEDIR_NONE_V01 = 0, 313dd4f32aeSBjoern A. Zeeb QMI_WLFW_PIPEDIR_IN_V01 = 1, 314dd4f32aeSBjoern A. Zeeb QMI_WLFW_PIPEDIR_OUT_V01 = 2, 315dd4f32aeSBjoern A. Zeeb QMI_WLFW_PIPEDIR_INOUT_V01 = 3, 316dd4f32aeSBjoern A. Zeeb }; 317dd4f32aeSBjoern A. Zeeb 318dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01 { 319dd4f32aeSBjoern A. Zeeb __le32 pipe_num; 320dd4f32aeSBjoern A. Zeeb __le32 pipe_dir; 321dd4f32aeSBjoern A. Zeeb __le32 nentries; 322dd4f32aeSBjoern A. Zeeb __le32 nbytes_max; 323dd4f32aeSBjoern A. Zeeb __le32 flags; 324dd4f32aeSBjoern A. Zeeb }; 325dd4f32aeSBjoern A. Zeeb 326dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01 { 327dd4f32aeSBjoern A. Zeeb __le32 service_id; 328dd4f32aeSBjoern A. Zeeb __le32 pipe_dir; 329dd4f32aeSBjoern A. Zeeb __le32 pipe_num; 330dd4f32aeSBjoern A. Zeeb }; 331dd4f32aeSBjoern A. Zeeb 332dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_shadow_reg_cfg_s_v01 { 333dd4f32aeSBjoern A. Zeeb u16 id; 334dd4f32aeSBjoern A. Zeeb u16 offset; 335dd4f32aeSBjoern A. Zeeb }; 336dd4f32aeSBjoern A. Zeeb 337dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_shadow_reg_v2_cfg_s_v01 { 338dd4f32aeSBjoern A. Zeeb u32 addr; 339dd4f32aeSBjoern A. Zeeb }; 340dd4f32aeSBjoern A. Zeeb 341dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_memory_region_info_s_v01 { 342dd4f32aeSBjoern A. Zeeb u64 region_addr; 343dd4f32aeSBjoern A. Zeeb u32 size; 344dd4f32aeSBjoern A. Zeeb u8 secure_flag; 345dd4f32aeSBjoern A. Zeeb }; 346dd4f32aeSBjoern A. Zeeb 347dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_rf_chip_info_s_v01 { 348dd4f32aeSBjoern A. Zeeb u32 chip_id; 349dd4f32aeSBjoern A. Zeeb u32 chip_family; 350dd4f32aeSBjoern A. Zeeb }; 351dd4f32aeSBjoern A. Zeeb 352dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_rf_board_info_s_v01 { 353dd4f32aeSBjoern A. Zeeb u32 board_id; 354dd4f32aeSBjoern A. Zeeb }; 355dd4f32aeSBjoern A. Zeeb 356dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_soc_info_s_v01 { 357dd4f32aeSBjoern A. Zeeb u32 soc_id; 358dd4f32aeSBjoern A. Zeeb }; 359dd4f32aeSBjoern A. Zeeb 360dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_fw_version_info_s_v01 { 361dd4f32aeSBjoern A. Zeeb u32 fw_version; 362dd4f32aeSBjoern A. Zeeb char fw_build_timestamp[ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 + 1]; 363dd4f32aeSBjoern A. Zeeb }; 364dd4f32aeSBjoern A. Zeeb 365dd4f32aeSBjoern A. Zeeb enum qmi_wlanfw_cal_temp_id_enum_v01 { 366dd4f32aeSBjoern A. Zeeb QMI_WLANFW_CAL_TEMP_IDX_0_V01 = 0, 367dd4f32aeSBjoern A. Zeeb QMI_WLANFW_CAL_TEMP_IDX_1_V01 = 1, 368dd4f32aeSBjoern A. Zeeb QMI_WLANFW_CAL_TEMP_IDX_2_V01 = 2, 369dd4f32aeSBjoern A. Zeeb QMI_WLANFW_CAL_TEMP_IDX_3_V01 = 3, 370dd4f32aeSBjoern A. Zeeb QMI_WLANFW_CAL_TEMP_IDX_4_V01 = 4, 371dd4f32aeSBjoern A. Zeeb QMI_WLANFW_CAL_TEMP_ID_MAX_V01 = 0xFF, 372dd4f32aeSBjoern A. Zeeb }; 373dd4f32aeSBjoern A. Zeeb 374dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_cap_resp_msg_v01 { 375dd4f32aeSBjoern A. Zeeb struct qmi_response_type_v01 resp; 376dd4f32aeSBjoern A. Zeeb u8 chip_info_valid; 377dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_rf_chip_info_s_v01 chip_info; 378dd4f32aeSBjoern A. Zeeb u8 board_info_valid; 379dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_rf_board_info_s_v01 board_info; 380dd4f32aeSBjoern A. Zeeb u8 soc_info_valid; 381dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_soc_info_s_v01 soc_info; 382dd4f32aeSBjoern A. Zeeb u8 fw_version_info_valid; 383dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_fw_version_info_s_v01 fw_version_info; 384dd4f32aeSBjoern A. Zeeb u8 fw_build_id_valid; 385dd4f32aeSBjoern A. Zeeb char fw_build_id[ATH11K_QMI_WLANFW_MAX_BUILD_ID_LEN_V01 + 1]; 386dd4f32aeSBjoern A. Zeeb u8 num_macs_valid; 387dd4f32aeSBjoern A. Zeeb u8 num_macs; 388dd4f32aeSBjoern A. Zeeb u8 voltage_mv_valid; 389dd4f32aeSBjoern A. Zeeb u32 voltage_mv; 390dd4f32aeSBjoern A. Zeeb u8 time_freq_hz_valid; 391dd4f32aeSBjoern A. Zeeb u32 time_freq_hz; 392dd4f32aeSBjoern A. Zeeb u8 otp_version_valid; 393dd4f32aeSBjoern A. Zeeb u32 otp_version; 394dd4f32aeSBjoern A. Zeeb u8 eeprom_read_timeout_valid; 395dd4f32aeSBjoern A. Zeeb u32 eeprom_read_timeout; 396dd4f32aeSBjoern A. Zeeb }; 397dd4f32aeSBjoern A. Zeeb 398dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_cap_req_msg_v01 { 399dd4f32aeSBjoern A. Zeeb char placeholder; 400dd4f32aeSBjoern A. Zeeb }; 401dd4f32aeSBjoern A. Zeeb 40228348caeSBjoern A. Zeeb struct qmi_wlanfw_device_info_req_msg_v01 { 40328348caeSBjoern A. Zeeb char placeholder; 40428348caeSBjoern A. Zeeb }; 40528348caeSBjoern A. Zeeb 40628348caeSBjoern A. Zeeb struct qmi_wlanfw_device_info_resp_msg_v01 { 40728348caeSBjoern A. Zeeb struct qmi_response_type_v01 resp; 40828348caeSBjoern A. Zeeb u64 bar_addr; 40928348caeSBjoern A. Zeeb u32 bar_size; 41028348caeSBjoern A. Zeeb u8 bar_addr_valid; 41128348caeSBjoern A. Zeeb u8 bar_size_valid; 41228348caeSBjoern A. Zeeb }; 41328348caeSBjoern A. Zeeb 414dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_LEN 6182 415dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_BDF_DOWNLOAD_RESP_MSG_V01_MAX_LEN 7 416dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_BDF_DOWNLOAD_RESP_V01 0x0025 417dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_BDF_DOWNLOAD_REQ_V01 0x0025 418dd4f32aeSBjoern A. Zeeb /* TODO: Need to check with MCL and FW team that data can be pointer and 419dd4f32aeSBjoern A. Zeeb * can be last element in structure 420dd4f32aeSBjoern A. Zeeb */ 421dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_bdf_download_req_msg_v01 { 422dd4f32aeSBjoern A. Zeeb u8 valid; 423dd4f32aeSBjoern A. Zeeb u8 file_id_valid; 424dd4f32aeSBjoern A. Zeeb enum qmi_wlanfw_cal_temp_id_enum_v01 file_id; 425dd4f32aeSBjoern A. Zeeb u8 total_size_valid; 426dd4f32aeSBjoern A. Zeeb u32 total_size; 427dd4f32aeSBjoern A. Zeeb u8 seg_id_valid; 428dd4f32aeSBjoern A. Zeeb u32 seg_id; 429dd4f32aeSBjoern A. Zeeb u8 data_valid; 430dd4f32aeSBjoern A. Zeeb u32 data_len; 431dd4f32aeSBjoern A. Zeeb u8 data[QMI_WLANFW_MAX_DATA_SIZE_V01]; 432dd4f32aeSBjoern A. Zeeb u8 end_valid; 433dd4f32aeSBjoern A. Zeeb u8 end; 434dd4f32aeSBjoern A. Zeeb u8 bdf_type_valid; 435dd4f32aeSBjoern A. Zeeb u8 bdf_type; 436dd4f32aeSBjoern A. Zeeb 437dd4f32aeSBjoern A. Zeeb }; 438dd4f32aeSBjoern A. Zeeb 439dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_bdf_download_resp_msg_v01 { 440dd4f32aeSBjoern A. Zeeb struct qmi_response_type_v01 resp; 441dd4f32aeSBjoern A. Zeeb }; 442dd4f32aeSBjoern A. Zeeb 443dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN 18 444dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_M3_INFO_RESP_MSG_V01_MAX_MSG_LEN 7 445dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_M3_INFO_RESP_V01 0x003C 446dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_M3_INFO_REQ_V01 0x003C 447dd4f32aeSBjoern A. Zeeb 448dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_m3_info_req_msg_v01 { 449dd4f32aeSBjoern A. Zeeb u64 addr; 450dd4f32aeSBjoern A. Zeeb u32 size; 451dd4f32aeSBjoern A. Zeeb }; 452dd4f32aeSBjoern A. Zeeb 453dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_m3_info_resp_msg_v01 { 454dd4f32aeSBjoern A. Zeeb struct qmi_response_type_v01 resp; 455dd4f32aeSBjoern A. Zeeb }; 456dd4f32aeSBjoern A. Zeeb 457dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_WLAN_MODE_REQ_MSG_V01_MAX_LEN 11 458dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_WLAN_MODE_RESP_MSG_V01_MAX_LEN 7 459dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_WLAN_CFG_REQ_MSG_V01_MAX_LEN 803 460dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_WLAN_CFG_RESP_MSG_V01_MAX_LEN 7 461dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_WLAN_INI_REQ_MSG_V01_MAX_LEN 4 462dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_WLAN_MODE_REQ_V01 0x0022 463dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_WLAN_MODE_RESP_V01 0x0022 464dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_WLAN_CFG_REQ_V01 0x0023 465dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_WLAN_CFG_RESP_V01 0x0023 466dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_WLAN_INI_REQ_V01 0x002F 467dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_MAX_STR_LEN_V01 16 468dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_MAX_NUM_CE_V01 12 469dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_MAX_NUM_SVC_V01 24 470dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_MAX_NUM_SHADOW_REG_V01 24 471dd4f32aeSBjoern A. Zeeb #define QMI_WLANFW_MAX_NUM_SHADOW_REG_V2_V01 36 472dd4f32aeSBjoern A. Zeeb 473dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_wlan_mode_req_msg_v01 { 474dd4f32aeSBjoern A. Zeeb u32 mode; 475dd4f32aeSBjoern A. Zeeb u8 hw_debug_valid; 476dd4f32aeSBjoern A. Zeeb u8 hw_debug; 477dd4f32aeSBjoern A. Zeeb }; 478dd4f32aeSBjoern A. Zeeb 479dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_wlan_mode_resp_msg_v01 { 480dd4f32aeSBjoern A. Zeeb struct qmi_response_type_v01 resp; 481dd4f32aeSBjoern A. Zeeb }; 482dd4f32aeSBjoern A. Zeeb 483dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_wlan_cfg_req_msg_v01 { 484dd4f32aeSBjoern A. Zeeb u8 host_version_valid; 485dd4f32aeSBjoern A. Zeeb char host_version[QMI_WLANFW_MAX_STR_LEN_V01 + 1]; 486dd4f32aeSBjoern A. Zeeb u8 tgt_cfg_valid; 487dd4f32aeSBjoern A. Zeeb u32 tgt_cfg_len; 488dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_ce_tgt_pipe_cfg_s_v01 489dd4f32aeSBjoern A. Zeeb tgt_cfg[QMI_WLANFW_MAX_NUM_CE_V01]; 490dd4f32aeSBjoern A. Zeeb u8 svc_cfg_valid; 491dd4f32aeSBjoern A. Zeeb u32 svc_cfg_len; 492dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_ce_svc_pipe_cfg_s_v01 493dd4f32aeSBjoern A. Zeeb svc_cfg[QMI_WLANFW_MAX_NUM_SVC_V01]; 494dd4f32aeSBjoern A. Zeeb u8 shadow_reg_valid; 495dd4f32aeSBjoern A. Zeeb u32 shadow_reg_len; 496dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_shadow_reg_cfg_s_v01 497dd4f32aeSBjoern A. Zeeb shadow_reg[QMI_WLANFW_MAX_NUM_SHADOW_REG_V01]; 498dd4f32aeSBjoern A. Zeeb u8 shadow_reg_v2_valid; 499dd4f32aeSBjoern A. Zeeb u32 shadow_reg_v2_len; 500dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_shadow_reg_v2_cfg_s_v01 501dd4f32aeSBjoern A. Zeeb shadow_reg_v2[QMI_WLANFW_MAX_NUM_SHADOW_REG_V2_V01]; 502dd4f32aeSBjoern A. Zeeb }; 503dd4f32aeSBjoern A. Zeeb 504dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_wlan_cfg_resp_msg_v01 { 505dd4f32aeSBjoern A. Zeeb struct qmi_response_type_v01 resp; 506dd4f32aeSBjoern A. Zeeb }; 507dd4f32aeSBjoern A. Zeeb 508dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_wlan_ini_req_msg_v01 { 509dd4f32aeSBjoern A. Zeeb /* Must be set to true if enablefwlog is being passed */ 510dd4f32aeSBjoern A. Zeeb u8 enablefwlog_valid; 511dd4f32aeSBjoern A. Zeeb u8 enablefwlog; 512dd4f32aeSBjoern A. Zeeb }; 513dd4f32aeSBjoern A. Zeeb 514dd4f32aeSBjoern A. Zeeb struct qmi_wlanfw_wlan_ini_resp_msg_v01 { 515dd4f32aeSBjoern A. Zeeb struct qmi_response_type_v01 resp; 516dd4f32aeSBjoern A. Zeeb }; 517dd4f32aeSBjoern A. Zeeb 518dd4f32aeSBjoern A. Zeeb int ath11k_qmi_firmware_start(struct ath11k_base *ab, 519dd4f32aeSBjoern A. Zeeb u32 mode); 520dd4f32aeSBjoern A. Zeeb void ath11k_qmi_firmware_stop(struct ath11k_base *ab); 521dd4f32aeSBjoern A. Zeeb void ath11k_qmi_event_work(struct work_struct *work); 522dd4f32aeSBjoern A. Zeeb void ath11k_qmi_msg_recv_work(struct work_struct *work); 523dd4f32aeSBjoern A. Zeeb void ath11k_qmi_deinit_service(struct ath11k_base *ab); 524dd4f32aeSBjoern A. Zeeb int ath11k_qmi_init_service(struct ath11k_base *ab); 52528348caeSBjoern A. Zeeb void ath11k_qmi_free_resource(struct ath11k_base *ab); 52628348caeSBjoern A. Zeeb int ath11k_qmi_fwreset_from_cold_boot(struct ath11k_base *ab); 527dd4f32aeSBjoern A. Zeeb 528dd4f32aeSBjoern A. Zeeb #endif 529