xref: /freebsd/sys/contrib/dev/iwlwifi/fw/file.h (revision 681ce946)
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3  * Copyright (C) 2008-2014, 2018-2021 Intel Corporation
4  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5  * Copyright (C) 2016-2017 Intel Deutschland GmbH
6  */
7 #ifndef __iwl_fw_file_h__
8 #define __iwl_fw_file_h__
9 
10 #include <linux/netdevice.h>
11 #include <linux/nl80211.h>
12 
13 /* v1/v2 uCode file layout */
14 struct iwl_ucode_header {
15 	__le32 ver;	/* major/minor/API/serial */
16 	union {
17 		struct {
18 			__le32 inst_size;	/* bytes of runtime code */
19 			__le32 data_size;	/* bytes of runtime data */
20 			__le32 init_size;	/* bytes of init code */
21 			__le32 init_data_size;	/* bytes of init data */
22 			__le32 boot_size;	/* bytes of bootstrap code */
23 			u8 data[0];		/* in same order as sizes */
24 		} v1;
25 		struct {
26 			__le32 build;		/* build number */
27 			__le32 inst_size;	/* bytes of runtime code */
28 			__le32 data_size;	/* bytes of runtime data */
29 			__le32 init_size;	/* bytes of init code */
30 			__le32 init_data_size;	/* bytes of init data */
31 			__le32 boot_size;	/* bytes of bootstrap code */
32 			u8 data[0];		/* in same order as sizes */
33 		} v2;
34 	} u;
35 };
36 
37 #define IWL_UCODE_TLV_DEBUG_BASE	0x1000005
38 #define IWL_UCODE_TLV_CONST_BASE	0x100
39 
40 /*
41  * new TLV uCode file layout
42  *
43  * The new TLV file format contains TLVs, that each specify
44  * some piece of data.
45  */
46 
47 enum iwl_ucode_tlv_type {
48 	IWL_UCODE_TLV_INVALID		= 0, /* unused */
49 	IWL_UCODE_TLV_INST		= 1,
50 	IWL_UCODE_TLV_DATA		= 2,
51 	IWL_UCODE_TLV_INIT		= 3,
52 	IWL_UCODE_TLV_INIT_DATA		= 4,
53 	IWL_UCODE_TLV_BOOT		= 5,
54 	IWL_UCODE_TLV_PROBE_MAX_LEN	= 6, /* a u32 value */
55 	IWL_UCODE_TLV_PAN		= 7, /* deprecated -- only used in DVM */
56 	IWL_UCODE_TLV_MEM_DESC		= 7, /* replaces PAN in non-DVM */
57 	IWL_UCODE_TLV_RUNT_EVTLOG_PTR	= 8,
58 	IWL_UCODE_TLV_RUNT_EVTLOG_SIZE	= 9,
59 	IWL_UCODE_TLV_RUNT_ERRLOG_PTR	= 10,
60 	IWL_UCODE_TLV_INIT_EVTLOG_PTR	= 11,
61 	IWL_UCODE_TLV_INIT_EVTLOG_SIZE	= 12,
62 	IWL_UCODE_TLV_INIT_ERRLOG_PTR	= 13,
63 	IWL_UCODE_TLV_ENHANCE_SENS_TBL	= 14,
64 	IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
65 	IWL_UCODE_TLV_WOWLAN_INST	= 16,
66 	IWL_UCODE_TLV_WOWLAN_DATA	= 17,
67 	IWL_UCODE_TLV_FLAGS		= 18,
68 	IWL_UCODE_TLV_SEC_RT		= 19,
69 	IWL_UCODE_TLV_SEC_INIT		= 20,
70 	IWL_UCODE_TLV_SEC_WOWLAN	= 21,
71 	IWL_UCODE_TLV_DEF_CALIB		= 22,
72 	IWL_UCODE_TLV_PHY_SKU		= 23,
73 	IWL_UCODE_TLV_SECURE_SEC_RT	= 24,
74 	IWL_UCODE_TLV_SECURE_SEC_INIT	= 25,
75 	IWL_UCODE_TLV_SECURE_SEC_WOWLAN	= 26,
76 	IWL_UCODE_TLV_NUM_OF_CPU	= 27,
77 	IWL_UCODE_TLV_CSCHEME		= 28,
78 	IWL_UCODE_TLV_API_CHANGES_SET	= 29,
79 	IWL_UCODE_TLV_ENABLED_CAPABILITIES	= 30,
80 	IWL_UCODE_TLV_N_SCAN_CHANNELS		= 31,
81 	IWL_UCODE_TLV_PAGING		= 32,
82 	IWL_UCODE_TLV_SEC_RT_USNIFFER	= 34,
83 	/* 35 is unused */
84 	IWL_UCODE_TLV_FW_VERSION	= 36,
85 	IWL_UCODE_TLV_FW_DBG_DEST	= 38,
86 	IWL_UCODE_TLV_FW_DBG_CONF	= 39,
87 	IWL_UCODE_TLV_FW_DBG_TRIGGER	= 40,
88 	IWL_UCODE_TLV_CMD_VERSIONS	= 48,
89 	IWL_UCODE_TLV_FW_GSCAN_CAPA	= 50,
90 	IWL_UCODE_TLV_FW_MEM_SEG	= 51,
91 	IWL_UCODE_TLV_IML		= 52,
92 	IWL_UCODE_TLV_UMAC_DEBUG_ADDRS	= 54,
93 	IWL_UCODE_TLV_LMAC_DEBUG_ADDRS	= 55,
94 	IWL_UCODE_TLV_FW_RECOVERY_INFO	= 57,
95 	IWL_UCODE_TLV_HW_TYPE			= 58,
96 	IWL_UCODE_TLV_FW_FSEQ_VERSION		= 60,
97 	IWL_UCODE_TLV_PHY_INTEGRATION_VERSION	= 61,
98 
99 	IWL_UCODE_TLV_PNVM_VERSION		= 62,
100 	IWL_UCODE_TLV_PNVM_SKU			= 64,
101 	IWL_UCODE_TLV_TCM_DEBUG_ADDRS		= 65,
102 
103 	IWL_UCODE_TLV_SEC_TABLE_ADDR		= 66,
104 	IWL_UCODE_TLV_D3_KEK_KCK_ADDR		= 67,
105 
106 	IWL_UCODE_TLV_FW_NUM_STATIONS		= IWL_UCODE_TLV_CONST_BASE + 0,
107 
108 	IWL_UCODE_TLV_TYPE_DEBUG_INFO		= IWL_UCODE_TLV_DEBUG_BASE + 0,
109 	IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION	= IWL_UCODE_TLV_DEBUG_BASE + 1,
110 	IWL_UCODE_TLV_TYPE_HCMD			= IWL_UCODE_TLV_DEBUG_BASE + 2,
111 	IWL_UCODE_TLV_TYPE_REGIONS		= IWL_UCODE_TLV_DEBUG_BASE + 3,
112 	IWL_UCODE_TLV_TYPE_TRIGGERS		= IWL_UCODE_TLV_DEBUG_BASE + 4,
113 	IWL_UCODE_TLV_TYPE_CONF_SET		= IWL_UCODE_TLV_DEBUG_BASE + 5,
114 	IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS,
115 
116 	/* TLVs 0x1000-0x2000 are for internal driver usage */
117 	IWL_UCODE_TLV_FW_DBG_DUMP_LST	= 0x1000,
118 };
119 
120 struct iwl_ucode_tlv {
121 	__le32 type;		/* see above */
122 	__le32 length;		/* not including type/length fields */
123 	u8 data[0];
124 };
125 
126 #define IWL_TLV_UCODE_MAGIC		0x0a4c5749
127 #define FW_VER_HUMAN_READABLE_SZ	64
128 
129 struct iwl_tlv_ucode_header {
130 	/*
131 	 * The TLV style ucode header is distinguished from
132 	 * the v1/v2 style header by first four bytes being
133 	 * zero, as such is an invalid combination of
134 	 * major/minor/API/serial versions.
135 	 */
136 	__le32 zero;
137 	__le32 magic;
138 	u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
139 	/* major/minor/API/serial or major in new format */
140 	__le32 ver;
141 	__le32 build;
142 	__le64 ignore;
143 	/*
144 	 * The data contained herein has a TLV layout,
145 	 * see above for the TLV header and types.
146 	 * Note that each TLV is padded to a length
147 	 * that is a multiple of 4 for alignment.
148 	 */
149 	u8 data[0];
150 };
151 
152 /*
153  * ucode TLVs
154  *
155  * ability to get extension for: flags & capabilities from ucode binaries files
156  */
157 struct iwl_ucode_api {
158 	__le32 api_index;
159 	__le32 api_flags;
160 } __packed;
161 
162 struct iwl_ucode_capa {
163 	__le32 api_index;
164 	__le32 api_capa;
165 } __packed;
166 
167 /**
168  * enum iwl_ucode_tlv_flag - ucode API flags
169  * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
170  *	was a separate TLV but moved here to save space.
171  * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID,
172  *	treats good CRC threshold as a boolean
173  * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
174  * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD
175  * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of block list instead of 64 in scan
176  *	offload profile config command.
177  * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six
178  *	(rather than two) IPv6 addresses
179  * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element
180  *	from the probe request template.
181  * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version)
182  * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)
183  * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD
184  * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save
185  * @IWL_UCODE_TLV_FLAGS_BCAST_FILTERING: uCode supports broadcast filtering.
186  * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.
187  */
188 enum iwl_ucode_tlv_flag {
189 	IWL_UCODE_TLV_FLAGS_PAN			= BIT(0),
190 	IWL_UCODE_TLV_FLAGS_NEWSCAN		= BIT(1),
191 	IWL_UCODE_TLV_FLAGS_MFP			= BIT(2),
192 	IWL_UCODE_TLV_FLAGS_SHORT_BL		= BIT(7),
193 	IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS	= BIT(10),
194 	IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID	= BIT(12),
195 	IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL	= BIT(15),
196 	IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE	= BIT(16),
197 	IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT	= BIT(24),
198 	IWL_UCODE_TLV_FLAGS_EBS_SUPPORT		= BIT(25),
199 	IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD	= BIT(26),
200 	IWL_UCODE_TLV_FLAGS_BCAST_FILTERING	= BIT(29),
201 };
202 
203 typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
204 
205 /**
206  * enum iwl_ucode_tlv_api - ucode api
207  * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time
208  *	longer than the passive one, which is essential for fragmented scan.
209  * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
210  * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
211  * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format
212  * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan
213  *	iteration complete notification, and the timestamp reported for RX
214  *	received during scan, are reported in TSF of the mac specified in the
215  *	scan request.
216  * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
217  *	ADD_MODIFY_STA_KEY_API_S_VER_2.
218  * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
219  * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2
220  * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
221  * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field
222  *	indicating low latency direction.
223  * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is
224  *	deprecated.
225  * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8
226  *	of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8
227  * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS
228  * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of
229  *	the REDUCE_TX_POWER_CMD.
230  * @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short
231  *	version of the beacon notification.
232  * @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of
233  *	BEACON_FILTER_CONFIG_API_S_VER_4.
234  * @IWL_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of
235  *	REGULATORY_NVM_GET_INFO_RSP_API_S.
236  * @IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of
237  *	LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S.
238  * @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of
239  *	SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of
240  *	SCAN_OFFLOAD_PROFILES_QUERY_RSP_S.
241  * @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of
242  *	STA_CONTEXT_DOT11AX_API_S
243  * @IWL_UCODE_TLV_API_SAR_TABLE_VER: This ucode supports different sar
244  *	version tables.
245  * @IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG: This ucode supports v3 of
246  *  SCAN_CONFIG_DB_CMD_API_S.
247  *
248  * @NUM_IWL_UCODE_TLV_API: number of bits used
249  */
250 enum iwl_ucode_tlv_api {
251 	/* API Set 0 */
252 	IWL_UCODE_TLV_API_FRAGMENTED_SCAN	= (__force iwl_ucode_tlv_api_t)8,
253 	IWL_UCODE_TLV_API_WIFI_MCC_UPDATE	= (__force iwl_ucode_tlv_api_t)9,
254 	IWL_UCODE_TLV_API_LQ_SS_PARAMS		= (__force iwl_ucode_tlv_api_t)18,
255 	IWL_UCODE_TLV_API_NEW_VERSION		= (__force iwl_ucode_tlv_api_t)20,
256 	IWL_UCODE_TLV_API_SCAN_TSF_REPORT	= (__force iwl_ucode_tlv_api_t)28,
257 	IWL_UCODE_TLV_API_TKIP_MIC_KEYS		= (__force iwl_ucode_tlv_api_t)29,
258 	IWL_UCODE_TLV_API_STA_TYPE		= (__force iwl_ucode_tlv_api_t)30,
259 	IWL_UCODE_TLV_API_NAN2_VER2		= (__force iwl_ucode_tlv_api_t)31,
260 	/* API Set 1 */
261 	IWL_UCODE_TLV_API_ADAPTIVE_DWELL	= (__force iwl_ucode_tlv_api_t)32,
262 	IWL_UCODE_TLV_API_OCE			= (__force iwl_ucode_tlv_api_t)33,
263 	IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE	= (__force iwl_ucode_tlv_api_t)34,
264 	IWL_UCODE_TLV_API_NEW_RX_STATS		= (__force iwl_ucode_tlv_api_t)35,
265 	IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL	= (__force iwl_ucode_tlv_api_t)36,
266 	IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY	= (__force iwl_ucode_tlv_api_t)38,
267 	IWL_UCODE_TLV_API_DEPRECATE_TTAK	= (__force iwl_ucode_tlv_api_t)41,
268 	IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2	= (__force iwl_ucode_tlv_api_t)42,
269 	IWL_UCODE_TLV_API_FRAG_EBS		= (__force iwl_ucode_tlv_api_t)44,
270 	IWL_UCODE_TLV_API_REDUCE_TX_POWER	= (__force iwl_ucode_tlv_api_t)45,
271 	IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF	= (__force iwl_ucode_tlv_api_t)46,
272 	IWL_UCODE_TLV_API_BEACON_FILTER_V4      = (__force iwl_ucode_tlv_api_t)47,
273 	IWL_UCODE_TLV_API_REGULATORY_NVM_INFO   = (__force iwl_ucode_tlv_api_t)48,
274 	IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ     = (__force iwl_ucode_tlv_api_t)49,
275 	IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS    = (__force iwl_ucode_tlv_api_t)50,
276 	IWL_UCODE_TLV_API_MBSSID_HE		= (__force iwl_ucode_tlv_api_t)52,
277 	IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE	= (__force iwl_ucode_tlv_api_t)53,
278 	IWL_UCODE_TLV_API_FTM_RTT_ACCURACY      = (__force iwl_ucode_tlv_api_t)54,
279 	IWL_UCODE_TLV_API_SAR_TABLE_VER         = (__force iwl_ucode_tlv_api_t)55,
280 	IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG   = (__force iwl_ucode_tlv_api_t)56,
281 	IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP	= (__force iwl_ucode_tlv_api_t)57,
282 	IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER	= (__force iwl_ucode_tlv_api_t)58,
283 	IWL_UCODE_TLV_API_BAND_IN_RX_DATA	= (__force iwl_ucode_tlv_api_t)59,
284 
285 
286 #ifdef __CHECKER__
287 	/* sparse says it cannot increment the previous enum member */
288 #define NUM_IWL_UCODE_TLV_API 128
289 #else
290 	NUM_IWL_UCODE_TLV_API
291 #endif
292 };
293 
294 typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
295 
296 /**
297  * enum iwl_ucode_tlv_capa - ucode capabilities
298  * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
299  * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory
300  * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan.
301  * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer
302  * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality
303  * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current
304  *	tx power value into TPC Report action frame and Link Measurement Report
305  *	action frame
306  * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current
307  *	channel in DS parameter set element in probe requests.
308  * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in
309  *	probe requests.
310  * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests
311  * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA),
312  *	which also implies support for the scheduler configuration command
313  * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
314  * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image
315  * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command
316  * @IWL_UCODE_TLV_CAPA_DC2DC_SUPPORT: supports DC2DC Command
317  * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload
318  * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics
319  * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it
320  *	is standalone or with a BSS station interface in the same binding.
321  * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running
322  * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different
323  *	sources for the MCC. This TLV bit is a future replacement to
324  *	IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR
325  *	is supported.
326  * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC
327  * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used)
328  * @IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT: the firmware supports setting
329  *	stabilization latency for SoCs.
330  * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification
331  * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm
332  * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related
333  * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2
334  * IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command
335  * @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band
336  *	(6 GHz).
337  * @IWL_UCODE_TLV_CAPA_CS_MODIFY: firmware supports modify action CSA command
338  * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement
339  * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts
340  * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT
341  * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA
342  *	countdown offloading. Beacon notifications are not sent to the host.
343  *	The fw also offloads TBTT alignment.
344  * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what
345  *	antenna the beacon should be transmitted
346  * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon
347  *	from AP and will send it upon d0i3 exit.
348  * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3
349  * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill
350  * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature
351  *	thresholds reporting
352  * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command
353  * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in
354  *	regular image.
355  * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared
356  *	memory addresses from the firmware.
357  * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement
358  * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger
359  *	command size (command version 4) that supports toggling ACK TX
360  *	power reduction.
361  * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3
362  * @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax
363  *	capability.
364  * @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured
365  *	to report the CSI information with (certain) RX frames
366  * @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both
367  *	initiator and responder
368  * @IWL_UCODE_TLV_CAPA_MLME_OFFLOAD: supports MLME offload
369  * @IWL_UCODE_TLV_CAPA_PROTECTED_TWT: Supports protection of TWT action frames
370  * @IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE: Supports the firmware handshake in
371  *	reset flow
372  * @IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN: Support for passive scan on 6GHz PSC
373  *      channels even when these are not enabled.
374  *
375  * @NUM_IWL_UCODE_TLV_CAPA: number of bits used
376  */
377 enum iwl_ucode_tlv_capa {
378 	/* set 0 */
379 	IWL_UCODE_TLV_CAPA_D0I3_SUPPORT			= (__force iwl_ucode_tlv_capa_t)0,
380 	IWL_UCODE_TLV_CAPA_LAR_SUPPORT			= (__force iwl_ucode_tlv_capa_t)1,
381 	IWL_UCODE_TLV_CAPA_UMAC_SCAN			= (__force iwl_ucode_tlv_capa_t)2,
382 	IWL_UCODE_TLV_CAPA_BEAMFORMER			= (__force iwl_ucode_tlv_capa_t)3,
383 	IWL_UCODE_TLV_CAPA_TDLS_SUPPORT			= (__force iwl_ucode_tlv_capa_t)6,
384 	IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT	= (__force iwl_ucode_tlv_capa_t)8,
385 	IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)9,
386 	IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)10,
387 	IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT		= (__force iwl_ucode_tlv_capa_t)11,
388 	IWL_UCODE_TLV_CAPA_DQA_SUPPORT			= (__force iwl_ucode_tlv_capa_t)12,
389 	IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH		= (__force iwl_ucode_tlv_capa_t)13,
390 	IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG		= (__force iwl_ucode_tlv_capa_t)17,
391 	IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT		= (__force iwl_ucode_tlv_capa_t)18,
392 	IWL_UCODE_TLV_CAPA_DC2DC_CONFIG_SUPPORT		= (__force iwl_ucode_tlv_capa_t)19,
393 	IWL_UCODE_TLV_CAPA_CSUM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)21,
394 	IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS		= (__force iwl_ucode_tlv_capa_t)22,
395 	IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD		= (__force iwl_ucode_tlv_capa_t)26,
396 	IWL_UCODE_TLV_CAPA_BT_COEX_PLCR			= (__force iwl_ucode_tlv_capa_t)28,
397 	IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC		= (__force iwl_ucode_tlv_capa_t)29,
398 	IWL_UCODE_TLV_CAPA_BT_COEX_RRC			= (__force iwl_ucode_tlv_capa_t)30,
399 	IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT		= (__force iwl_ucode_tlv_capa_t)31,
400 
401 	/* set 1 */
402 	IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT		= (__force iwl_ucode_tlv_capa_t)37,
403 	IWL_UCODE_TLV_CAPA_STA_PM_NOTIF			= (__force iwl_ucode_tlv_capa_t)38,
404 	IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT		= (__force iwl_ucode_tlv_capa_t)39,
405 	IWL_UCODE_TLV_CAPA_CDB_SUPPORT			= (__force iwl_ucode_tlv_capa_t)40,
406 	IWL_UCODE_TLV_CAPA_D0I3_END_FIRST		= (__force iwl_ucode_tlv_capa_t)41,
407 	IWL_UCODE_TLV_CAPA_TLC_OFFLOAD                  = (__force iwl_ucode_tlv_capa_t)43,
408 	IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA                = (__force iwl_ucode_tlv_capa_t)44,
409 	IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2		= (__force iwl_ucode_tlv_capa_t)45,
410 	IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD		= (__force iwl_ucode_tlv_capa_t)46,
411 	IWL_UCODE_TLV_CAPA_FTM_CALIBRATED		= (__force iwl_ucode_tlv_capa_t)47,
412 	IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS		= (__force iwl_ucode_tlv_capa_t)48,
413 	IWL_UCODE_TLV_CAPA_CS_MODIFY			= (__force iwl_ucode_tlv_capa_t)49,
414 	IWL_UCODE_TLV_CAPA_SET_LTR_GEN2			= (__force iwl_ucode_tlv_capa_t)50,
415 	IWL_UCODE_TLV_CAPA_SET_PPAG			= (__force iwl_ucode_tlv_capa_t)52,
416 	IWL_UCODE_TLV_CAPA_TAS_CFG			= (__force iwl_ucode_tlv_capa_t)53,
417 	IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD		= (__force iwl_ucode_tlv_capa_t)54,
418 	IWL_UCODE_TLV_CAPA_PROTECTED_TWT		= (__force iwl_ucode_tlv_capa_t)56,
419 	IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE		= (__force iwl_ucode_tlv_capa_t)57,
420 	IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN		= (__force iwl_ucode_tlv_capa_t)58,
421 	IWL_UCODE_TLV_CAPA_HIDDEN_6GHZ_SCAN		= (__force iwl_ucode_tlv_capa_t)59,
422 	IWL_UCODE_TLV_CAPA_BROADCAST_TWT		= (__force iwl_ucode_tlv_capa_t)60,
423 	IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO		= (__force iwl_ucode_tlv_capa_t)61,
424 	IWL_UCODE_TLV_CAPA_RFIM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)62,
425 
426 	/* set 2 */
427 	IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE		= (__force iwl_ucode_tlv_capa_t)64,
428 	IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS		= (__force iwl_ucode_tlv_capa_t)65,
429 	IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT		= (__force iwl_ucode_tlv_capa_t)67,
430 	IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT	= (__force iwl_ucode_tlv_capa_t)68,
431 	IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD		= (__force iwl_ucode_tlv_capa_t)70,
432 	IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION		= (__force iwl_ucode_tlv_capa_t)71,
433 	IWL_UCODE_TLV_CAPA_BEACON_STORING		= (__force iwl_ucode_tlv_capa_t)72,
434 	IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3		= (__force iwl_ucode_tlv_capa_t)73,
435 	IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW		= (__force iwl_ucode_tlv_capa_t)74,
436 	IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT	= (__force iwl_ucode_tlv_capa_t)75,
437 	IWL_UCODE_TLV_CAPA_CTDP_SUPPORT			= (__force iwl_ucode_tlv_capa_t)76,
438 	IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED		= (__force iwl_ucode_tlv_capa_t)77,
439 	IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG	= (__force iwl_ucode_tlv_capa_t)80,
440 	IWL_UCODE_TLV_CAPA_LQM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)81,
441 	IWL_UCODE_TLV_CAPA_TX_POWER_ACK			= (__force iwl_ucode_tlv_capa_t)84,
442 	IWL_UCODE_TLV_CAPA_D3_DEBUG			= (__force iwl_ucode_tlv_capa_t)87,
443 	IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT		= (__force iwl_ucode_tlv_capa_t)88,
444 	IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT	= (__force iwl_ucode_tlv_capa_t)89,
445 	IWL_UCODE_TLV_CAPA_CSI_REPORTING		= (__force iwl_ucode_tlv_capa_t)90,
446 	IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP	= (__force iwl_ucode_tlv_capa_t)92,
447 	IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP	= (__force iwl_ucode_tlv_capa_t)93,
448 
449 	/* set 3 */
450 	IWL_UCODE_TLV_CAPA_MLME_OFFLOAD			= (__force iwl_ucode_tlv_capa_t)96,
451 
452 	/*
453 	 * @IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT: supports PSC channels
454 	 */
455 	IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT		= (__force iwl_ucode_tlv_capa_t)98,
456 
457 	IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT		= (__force iwl_ucode_tlv_capa_t)100,
458 	IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT		= (__force iwl_ucode_tlv_capa_t)104,
459 
460 #ifdef __CHECKER__
461 	/* sparse says it cannot increment the previous enum member */
462 #define NUM_IWL_UCODE_TLV_CAPA 128
463 #else
464 	NUM_IWL_UCODE_TLV_CAPA
465 #endif
466 };
467 
468 /* The default calibrate table size if not specified by firmware file */
469 #define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE	18
470 #define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE		19
471 #define IWL_MAX_PHY_CALIBRATE_TBL_SIZE			253
472 
473 /* The default max probe length if not specified by the firmware file */
474 #define IWL_DEFAULT_MAX_PROBE_LENGTH	200
475 
476 /*
477  * For 16.0 uCode and above, there is no differentiation between sections,
478  * just an offset to the HW address.
479  */
480 #define CPU1_CPU2_SEPARATOR_SECTION	0xFFFFCCCC
481 #define PAGING_SEPARATOR_SECTION	0xAAAABBBB
482 
483 /* uCode version contains 4 values: Major/Minor/API/Serial */
484 #define IWL_UCODE_MAJOR(ver)	(((ver) & 0xFF000000) >> 24)
485 #define IWL_UCODE_MINOR(ver)	(((ver) & 0x00FF0000) >> 16)
486 #define IWL_UCODE_API(ver)	(((ver) & 0x0000FF00) >> 8)
487 #define IWL_UCODE_SERIAL(ver)	((ver) & 0x000000FF)
488 
489 /**
490  * struct iwl_tlv_calib_ctrl - Calibration control struct.
491  * Sent as part of the phy configuration command.
492  * @flow_trigger: bitmap for which calibrations to perform according to
493  *		flow triggers.
494  * @event_trigger: bitmap for which calibrations to perform according to
495  *		event triggers.
496  */
497 struct iwl_tlv_calib_ctrl {
498 	__le32 flow_trigger;
499 	__le32 event_trigger;
500 } __packed;
501 
502 enum iwl_fw_phy_cfg {
503 	FW_PHY_CFG_RADIO_TYPE_POS = 0,
504 	FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS,
505 	FW_PHY_CFG_RADIO_STEP_POS = 2,
506 	FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS,
507 	FW_PHY_CFG_RADIO_DASH_POS = 4,
508 	FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS,
509 	FW_PHY_CFG_TX_CHAIN_POS = 16,
510 	FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS,
511 	FW_PHY_CFG_RX_CHAIN_POS = 20,
512 	FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS,
513 	FW_PHY_CFG_CHAIN_SAD_POS = 23,
514 	FW_PHY_CFG_CHAIN_SAD_ENABLED = 0x1 << FW_PHY_CFG_CHAIN_SAD_POS,
515 	FW_PHY_CFG_CHAIN_SAD_ANT_A = 0x2 << FW_PHY_CFG_CHAIN_SAD_POS,
516 	FW_PHY_CFG_CHAIN_SAD_ANT_B = 0x4 << FW_PHY_CFG_CHAIN_SAD_POS,
517 	FW_PHY_CFG_SHARED_CLK = BIT(31),
518 };
519 
520 #define IWL_UCODE_MAX_CS		1
521 
522 /**
523  * struct iwl_fw_cipher_scheme - a cipher scheme supported by FW.
524  * @cipher: a cipher suite selector
525  * @flags: cipher scheme flags (currently reserved for a future use)
526  * @hdr_len: a size of MPDU security header
527  * @pn_len: a size of PN
528  * @pn_off: an offset of pn from the beginning of the security header
529  * @key_idx_off: an offset of key index byte in the security header
530  * @key_idx_mask: a bit mask of key_idx bits
531  * @key_idx_shift: bit shift needed to get key_idx
532  * @mic_len: mic length in bytes
533  * @hw_cipher: a HW cipher index used in host commands
534  */
535 struct iwl_fw_cipher_scheme {
536 	__le32 cipher;
537 	u8 flags;
538 	u8 hdr_len;
539 	u8 pn_len;
540 	u8 pn_off;
541 	u8 key_idx_off;
542 	u8 key_idx_mask;
543 	u8 key_idx_shift;
544 	u8 mic_len;
545 	u8 hw_cipher;
546 } __packed;
547 
548 enum iwl_fw_dbg_reg_operator {
549 	CSR_ASSIGN,
550 	CSR_SETBIT,
551 	CSR_CLEARBIT,
552 
553 	PRPH_ASSIGN,
554 	PRPH_SETBIT,
555 	PRPH_CLEARBIT,
556 
557 	INDIRECT_ASSIGN,
558 	INDIRECT_SETBIT,
559 	INDIRECT_CLEARBIT,
560 
561 	PRPH_BLOCKBIT,
562 };
563 
564 /**
565  * struct iwl_fw_dbg_reg_op - an operation on a register
566  *
567  * @op: &enum iwl_fw_dbg_reg_operator
568  * @addr: offset of the register
569  * @val: value
570  */
571 struct iwl_fw_dbg_reg_op {
572 	u8 op;
573 	u8 reserved[3];
574 	__le32 addr;
575 	__le32 val;
576 } __packed;
577 
578 /**
579  * enum iwl_fw_dbg_monitor_mode - available monitor recording modes
580  *
581  * @SMEM_MODE: monitor stores the data in SMEM
582  * @EXTERNAL_MODE: monitor stores the data in allocated DRAM
583  * @MARBH_MODE: monitor stores the data in MARBH buffer
584  * @MIPI_MODE: monitor outputs the data through the MIPI interface
585  */
586 enum iwl_fw_dbg_monitor_mode {
587 	SMEM_MODE = 0,
588 	EXTERNAL_MODE = 1,
589 	MARBH_MODE = 2,
590 	MIPI_MODE = 3,
591 };
592 
593 /**
594  * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments
595  *
596  * @data_type: the memory segment type to record
597  * @ofs: the memory segment offset
598  * @len: the memory segment length, in bytes
599  *
600  * This parses IWL_UCODE_TLV_FW_MEM_SEG
601  */
602 struct iwl_fw_dbg_mem_seg_tlv {
603 	__le32 data_type;
604 	__le32 ofs;
605 	__le32 len;
606 } __packed;
607 
608 /**
609  * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data
610  *
611  * @version: version of the TLV - currently 0
612  * @monitor_mode: &enum iwl_fw_dbg_monitor_mode
613  * @size_power: buffer size will be 2^(size_power + 11)
614  * @base_reg: addr of the base addr register (PRPH)
615  * @end_reg:  addr of the end addr register (PRPH)
616  * @write_ptr_reg: the addr of the reg of the write pointer
617  * @wrap_count: the addr of the reg of the wrap_count
618  * @base_shift: shift right of the base addr reg
619  * @end_shift: shift right of the end addr reg
620  * @reg_ops: array of registers operations
621  *
622  * This parses IWL_UCODE_TLV_FW_DBG_DEST
623  */
624 struct iwl_fw_dbg_dest_tlv_v1 {
625 	u8 version;
626 	u8 monitor_mode;
627 	u8 size_power;
628 	u8 reserved;
629 	__le32 base_reg;
630 	__le32 end_reg;
631 	__le32 write_ptr_reg;
632 	__le32 wrap_count;
633 	u8 base_shift;
634 	u8 end_shift;
635 	struct iwl_fw_dbg_reg_op reg_ops[0];
636 } __packed;
637 
638 /* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */
639 #define IWL_LDBG_M2S_BUF_SIZE_MSK	0x0fff0000
640 /* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */
641 #define IWL_LDBG_M2S_BUF_BA_MSK		0x00000fff
642 /* The smem buffer chunks are in units of 256 bits */
643 #define IWL_M2S_UNIT_SIZE			0x100
644 
645 struct iwl_fw_dbg_dest_tlv {
646 	u8 version;
647 	u8 monitor_mode;
648 	u8 size_power;
649 	u8 reserved;
650 	__le32 cfg_reg;
651 	__le32 write_ptr_reg;
652 	__le32 wrap_count;
653 	u8 base_shift;
654 	u8 size_shift;
655 	struct iwl_fw_dbg_reg_op reg_ops[0];
656 } __packed;
657 
658 struct iwl_fw_dbg_conf_hcmd {
659 	u8 id;
660 	u8 reserved;
661 	__le16 len;
662 	u8 data[0];
663 } __packed;
664 
665 /**
666  * enum iwl_fw_dbg_trigger_mode - triggers functionalities
667  *
668  * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism
669  * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data
670  * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to
671  *	collect only monitor data
672  */
673 enum iwl_fw_dbg_trigger_mode {
674 	IWL_FW_DBG_TRIGGER_START = BIT(0),
675 	IWL_FW_DBG_TRIGGER_STOP = BIT(1),
676 	IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2),
677 };
678 
679 /**
680  * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers
681  * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart
682  */
683 enum iwl_fw_dbg_trigger_flags {
684 	IWL_FW_DBG_FORCE_RESTART = BIT(0),
685 };
686 
687 /**
688  * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger
689  * @IWL_FW_DBG_CONF_VIF_ANY: any vif type
690  * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode
691  * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode
692  * @IWL_FW_DBG_CONF_VIF_AP: AP mode
693  * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode
694  * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode
695  * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device
696  */
697 enum iwl_fw_dbg_trigger_vif_type {
698 	IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED,
699 	IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC,
700 	IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION,
701 	IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP,
702 	IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT,
703 	IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO,
704 	IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE,
705 };
706 
707 /**
708  * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger
709  * @id: &enum iwl_fw_dbg_trigger
710  * @vif_type: &enum iwl_fw_dbg_trigger_vif_type
711  * @stop_conf_ids: bitmap of configurations this trigger relates to.
712  *	if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding
713  *	to the currently running configuration is set, the data should be
714  *	collected.
715  * @stop_delay: how many milliseconds to wait before collecting the data
716  *	after the STOP trigger fires.
717  * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both
718  * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what
719  *	configuration should be applied when the triggers kicks in.
720  * @occurrences: number of occurrences. 0 means the trigger will never fire.
721  * @trig_dis_ms: the time, in milliseconds, after an occurrence of this
722  *	trigger in which another occurrence should be ignored.
723  * @flags: &enum iwl_fw_dbg_trigger_flags
724  */
725 struct iwl_fw_dbg_trigger_tlv {
726 	__le32 id;
727 	__le32 vif_type;
728 	__le32 stop_conf_ids;
729 	__le32 stop_delay;
730 	u8 mode;
731 	u8 start_conf_id;
732 	__le16 occurrences;
733 	__le16 trig_dis_ms;
734 	u8 flags;
735 	u8 reserved[5];
736 
737 	u8 data[0];
738 } __packed;
739 
740 #define FW_DBG_START_FROM_ALIVE	0
741 #define FW_DBG_CONF_MAX		32
742 #define FW_DBG_INVALID		0xff
743 
744 /**
745  * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons
746  * @stop_consec_missed_bcon: stop recording if threshold is crossed.
747  * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed.
748  * @start_consec_missed_bcon: start recording if threshold is crossed.
749  * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed.
750  * @reserved1: reserved
751  * @reserved2: reserved
752  */
753 struct iwl_fw_dbg_trigger_missed_bcon {
754 	__le32 stop_consec_missed_bcon;
755 	__le32 stop_consec_missed_bcon_since_rx;
756 	__le32 reserved2[2];
757 	__le32 start_consec_missed_bcon;
758 	__le32 start_consec_missed_bcon_since_rx;
759 	__le32 reserved1[2];
760 } __packed;
761 
762 /**
763  * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW.
764  * cmds: the list of commands to trigger the collection on
765  */
766 struct iwl_fw_dbg_trigger_cmd {
767 	struct cmd {
768 		u8 cmd_id;
769 		u8 group_id;
770 	} __packed cmds[16];
771 } __packed;
772 
773 /**
774  * iwl_fw_dbg_trigger_stats - configures trigger for statistics
775  * @stop_offset: the offset of the value to be monitored
776  * @stop_threshold: the threshold above which to collect
777  * @start_offset: the offset of the value to be monitored
778  * @start_threshold: the threshold above which to start recording
779  */
780 struct iwl_fw_dbg_trigger_stats {
781 	__le32 stop_offset;
782 	__le32 stop_threshold;
783 	__le32 start_offset;
784 	__le32 start_threshold;
785 } __packed;
786 
787 /**
788  * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI
789  * @rssi: RSSI value to trigger at
790  */
791 struct iwl_fw_dbg_trigger_low_rssi {
792 	__le32 rssi;
793 } __packed;
794 
795 /**
796  * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events
797  * @stop_auth_denied: number of denied authentication to collect
798  * @stop_auth_timeout: number of authentication timeout to collect
799  * @stop_rx_deauth: number of Rx deauth before to collect
800  * @stop_tx_deauth: number of Tx deauth before to collect
801  * @stop_assoc_denied: number of denied association to collect
802  * @stop_assoc_timeout: number of association timeout to collect
803  * @stop_connection_loss: number of connection loss to collect
804  * @start_auth_denied: number of denied authentication to start recording
805  * @start_auth_timeout: number of authentication timeout to start recording
806  * @start_rx_deauth: number of Rx deauth to start recording
807  * @start_tx_deauth: number of Tx deauth to start recording
808  * @start_assoc_denied: number of denied association to start recording
809  * @start_assoc_timeout: number of association timeout to start recording
810  * @start_connection_loss: number of connection loss to start recording
811  */
812 struct iwl_fw_dbg_trigger_mlme {
813 	u8 stop_auth_denied;
814 	u8 stop_auth_timeout;
815 	u8 stop_rx_deauth;
816 	u8 stop_tx_deauth;
817 
818 	u8 stop_assoc_denied;
819 	u8 stop_assoc_timeout;
820 	u8 stop_connection_loss;
821 	u8 reserved;
822 
823 	u8 start_auth_denied;
824 	u8 start_auth_timeout;
825 	u8 start_rx_deauth;
826 	u8 start_tx_deauth;
827 
828 	u8 start_assoc_denied;
829 	u8 start_assoc_timeout;
830 	u8 start_connection_loss;
831 	u8 reserved2;
832 } __packed;
833 
834 /**
835  * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer
836  * @command_queue: timeout for the command queue in ms
837  * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms
838  * @softap: timeout for the queues of a softAP in ms
839  * @p2p_go: timeout for the queues of a P2P GO in ms
840  * @p2p_client: timeout for the queues of a P2P client in ms
841  * @p2p_device: timeout for the queues of a P2P device in ms
842  * @ibss: timeout for the queues of an IBSS in ms
843  * @tdls: timeout for the queues of a TDLS station in ms
844  */
845 struct iwl_fw_dbg_trigger_txq_timer {
846 	__le32 command_queue;
847 	__le32 bss;
848 	__le32 softap;
849 	__le32 p2p_go;
850 	__le32 p2p_client;
851 	__le32 p2p_device;
852 	__le32 ibss;
853 	__le32 tdls;
854 	__le32 reserved[4];
855 } __packed;
856 
857 /**
858  * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger
859  * time_Events: a list of tuples <id, action_bitmap>. The driver will issue a
860  *	trigger each time a time event notification that relates to time event
861  *	id with one of the actions in the bitmap is received and
862  *	BIT(notif->status) is set in status_bitmap.
863  *
864  */
865 struct iwl_fw_dbg_trigger_time_event {
866 	struct {
867 		__le32 id;
868 		__le32 action_bitmap;
869 		__le32 status_bitmap;
870 	} __packed time_events[16];
871 } __packed;
872 
873 /**
874  * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger
875  * rx_ba_start: tid bitmap to configure on what tid the trigger should occur
876  *	when an Rx BlockAck session is started.
877  * rx_ba_stop: tid bitmap to configure on what tid the trigger should occur
878  *	when an Rx BlockAck session is stopped.
879  * tx_ba_start: tid bitmap to configure on what tid the trigger should occur
880  *	when a Tx BlockAck session is started.
881  * tx_ba_stop: tid bitmap to configure on what tid the trigger should occur
882  *	when a Tx BlockAck session is stopped.
883  * rx_bar: tid bitmap to configure on what tid the trigger should occur
884  *	when a BAR is received (for a Tx BlockAck session).
885  * tx_bar: tid bitmap to configure on what tid the trigger should occur
886  *	when a BAR is send (for an Rx BlocAck session).
887  * frame_timeout: tid bitmap to configure on what tid the trigger should occur
888  *	when a frame times out in the reordering buffer.
889  */
890 struct iwl_fw_dbg_trigger_ba {
891 	__le16 rx_ba_start;
892 	__le16 rx_ba_stop;
893 	__le16 tx_ba_start;
894 	__le16 tx_ba_stop;
895 	__le16 rx_bar;
896 	__le16 tx_bar;
897 	__le16 frame_timeout;
898 } __packed;
899 
900 /**
901  * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events.
902  * @action_bitmap: the TDLS action to trigger the collection upon
903  * @peer_mode: trigger on specific peer or all
904  * @peer: the TDLS peer to trigger the collection on
905  */
906 struct iwl_fw_dbg_trigger_tdls {
907 	u8 action_bitmap;
908 	u8 peer_mode;
909 	u8 peer[ETH_ALEN];
910 	u8 reserved[4];
911 } __packed;
912 
913 /**
914  * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response
915  *  status.
916  * @statuses: the list of statuses to trigger the collection on
917  */
918 struct iwl_fw_dbg_trigger_tx_status {
919 	struct tx_status {
920 		u8 status;
921 		u8 reserved[3];
922 	} __packed statuses[16];
923 	__le32 reserved[2];
924 } __packed;
925 
926 /**
927  * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration.
928  * @id: conf id
929  * @usniffer: should the uSniffer image be used
930  * @num_of_hcmds: how many HCMDs to send are present here
931  * @hcmd: a variable length host command to be sent to apply the configuration.
932  *	If there is more than one HCMD to send, they will appear one after the
933  *	other and be sent in the order that they appear in.
934  * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to
935  * %FW_DBG_CONF_MAX configuration per run.
936  */
937 struct iwl_fw_dbg_conf_tlv {
938 	u8 id;
939 	u8 usniffer;
940 	u8 reserved;
941 	u8 num_of_hcmds;
942 	struct iwl_fw_dbg_conf_hcmd hcmd;
943 } __packed;
944 
945 #define IWL_FW_CMD_VER_UNKNOWN 99
946 
947 /**
948  * struct iwl_fw_cmd_version - firmware command version entry
949  * @cmd: command ID
950  * @group: group ID
951  * @cmd_ver: command version
952  * @notif_ver: notification version
953  */
954 struct iwl_fw_cmd_version {
955 	u8 cmd;
956 	u8 group;
957 	u8 cmd_ver;
958 	u8 notif_ver;
959 } __packed;
960 
961 struct iwl_fw_tcm_error_addr {
962 	__le32 addr;
963 }; /* FW_TLV_TCM_ERROR_INFO_ADDRS_S */
964 
965 struct iwl_fw_dump_exclude {
966 	__le32 addr, size;
967 };
968 
969 static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv,
970 					size_t fixed_size, size_t var_size)
971 {
972 	size_t var_len = le32_to_cpu(tlv->length) - fixed_size;
973 
974 	if (WARN_ON(var_len % var_size))
975 		return 0;
976 
977 	return var_len / var_size;
978 }
979 
980 #define iwl_tlv_array_len(_tlv_ptr, _struct_ptr, _memb)			\
981 	_iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)),		\
982 			   sizeof(_struct_ptr->_memb[0]))
983 
984 #endif  /* __iwl_fw_file_h__ */
985