16c92544dSBjoern A. Zeeb // SPDX-License-Identifier: ISC
26c92544dSBjoern A. Zeeb /* Copyright (C) 2019 MediaTek Inc.
36c92544dSBjoern A. Zeeb *
46c92544dSBjoern A. Zeeb * Author: Ryder Lee <ryder.lee@mediatek.com>
56c92544dSBjoern A. Zeeb * Roy Luo <royluo@google.com>
66c92544dSBjoern A. Zeeb * Felix Fietkau <nbd@nbd.name>
76c92544dSBjoern A. Zeeb * Lorenzo Bianconi <lorenzo@kernel.org>
86c92544dSBjoern A. Zeeb */
96c92544dSBjoern A. Zeeb
106c92544dSBjoern A. Zeeb #include <linux/devcoredump.h>
116c92544dSBjoern A. Zeeb #include <linux/etherdevice.h>
126c92544dSBjoern A. Zeeb #include <linux/timekeeping.h>
136c92544dSBjoern A. Zeeb #include "mt7615.h"
146c92544dSBjoern A. Zeeb #include "../trace.h"
156c92544dSBjoern A. Zeeb #include "../dma.h"
166c92544dSBjoern A. Zeeb #include "mt7615_trace.h"
176c92544dSBjoern A. Zeeb #include "mac.h"
186c92544dSBjoern A. Zeeb #include "mcu.h"
196c92544dSBjoern A. Zeeb
206c92544dSBjoern A. Zeeb #define to_rssi(field, rxv) ((FIELD_GET(field, rxv) - 220) / 2)
216c92544dSBjoern A. Zeeb
226c92544dSBjoern A. Zeeb static const struct mt7615_dfs_radar_spec etsi_radar_specs = {
236c92544dSBjoern A. Zeeb .pulse_th = { 110, -10, -80, 40, 5200, 128, 5200 },
246c92544dSBjoern A. Zeeb .radar_pattern = {
256c92544dSBjoern A. Zeeb [5] = { 1, 0, 6, 32, 28, 0, 17, 990, 5010, 1, 1 },
266c92544dSBjoern A. Zeeb [6] = { 1, 0, 9, 32, 28, 0, 27, 615, 5010, 1, 1 },
276c92544dSBjoern A. Zeeb [7] = { 1, 0, 15, 32, 28, 0, 27, 240, 445, 1, 1 },
286c92544dSBjoern A. Zeeb [8] = { 1, 0, 12, 32, 28, 0, 42, 240, 510, 1, 1 },
296c92544dSBjoern A. Zeeb [9] = { 1, 1, 0, 0, 0, 0, 14, 2490, 3343, 0, 0, 12, 32, 28 },
306c92544dSBjoern A. Zeeb [10] = { 1, 1, 0, 0, 0, 0, 14, 2490, 3343, 0, 0, 15, 32, 24 },
316c92544dSBjoern A. Zeeb [11] = { 1, 1, 0, 0, 0, 0, 14, 823, 2510, 0, 0, 18, 32, 28 },
326c92544dSBjoern A. Zeeb [12] = { 1, 1, 0, 0, 0, 0, 14, 823, 2510, 0, 0, 27, 32, 24 },
336c92544dSBjoern A. Zeeb },
346c92544dSBjoern A. Zeeb };
356c92544dSBjoern A. Zeeb
366c92544dSBjoern A. Zeeb static const struct mt7615_dfs_radar_spec fcc_radar_specs = {
376c92544dSBjoern A. Zeeb .pulse_th = { 110, -10, -80, 40, 5200, 128, 5200 },
386c92544dSBjoern A. Zeeb .radar_pattern = {
396c92544dSBjoern A. Zeeb [0] = { 1, 0, 9, 32, 28, 0, 13, 508, 3076, 1, 1 },
406c92544dSBjoern A. Zeeb [1] = { 1, 0, 12, 32, 28, 0, 17, 140, 240, 1, 1 },
416c92544dSBjoern A. Zeeb [2] = { 1, 0, 8, 32, 28, 0, 22, 190, 510, 1, 1 },
426c92544dSBjoern A. Zeeb [3] = { 1, 0, 6, 32, 28, 0, 32, 190, 510, 1, 1 },
436c92544dSBjoern A. Zeeb [4] = { 1, 0, 9, 255, 28, 0, 13, 323, 343, 1, 32 },
446c92544dSBjoern A. Zeeb },
456c92544dSBjoern A. Zeeb };
466c92544dSBjoern A. Zeeb
476c92544dSBjoern A. Zeeb static const struct mt7615_dfs_radar_spec jp_radar_specs = {
486c92544dSBjoern A. Zeeb .pulse_th = { 110, -10, -80, 40, 5200, 128, 5200 },
496c92544dSBjoern A. Zeeb .radar_pattern = {
506c92544dSBjoern A. Zeeb [0] = { 1, 0, 8, 32, 28, 0, 13, 508, 3076, 1, 1 },
516c92544dSBjoern A. Zeeb [1] = { 1, 0, 12, 32, 28, 0, 17, 140, 240, 1, 1 },
526c92544dSBjoern A. Zeeb [2] = { 1, 0, 8, 32, 28, 0, 22, 190, 510, 1, 1 },
536c92544dSBjoern A. Zeeb [3] = { 1, 0, 6, 32, 28, 0, 32, 190, 510, 1, 1 },
546c92544dSBjoern A. Zeeb [4] = { 1, 0, 9, 32, 28, 0, 13, 323, 343, 1, 32 },
556c92544dSBjoern A. Zeeb [13] = { 1, 0, 8, 32, 28, 0, 14, 3836, 3856, 1, 1 },
566c92544dSBjoern A. Zeeb [14] = { 1, 0, 8, 32, 28, 0, 14, 3990, 4010, 1, 1 },
576c92544dSBjoern A. Zeeb },
586c92544dSBjoern A. Zeeb };
596c92544dSBjoern A. Zeeb
606c92544dSBjoern A. Zeeb static enum mt76_cipher_type
mt7615_mac_get_cipher(int cipher)616c92544dSBjoern A. Zeeb mt7615_mac_get_cipher(int cipher)
626c92544dSBjoern A. Zeeb {
636c92544dSBjoern A. Zeeb switch (cipher) {
646c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_WEP40:
656c92544dSBjoern A. Zeeb return MT_CIPHER_WEP40;
666c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_WEP104:
676c92544dSBjoern A. Zeeb return MT_CIPHER_WEP104;
686c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_TKIP:
696c92544dSBjoern A. Zeeb return MT_CIPHER_TKIP;
706c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_AES_CMAC:
716c92544dSBjoern A. Zeeb return MT_CIPHER_BIP_CMAC_128;
726c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_CCMP:
736c92544dSBjoern A. Zeeb return MT_CIPHER_AES_CCMP;
746c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_CCMP_256:
756c92544dSBjoern A. Zeeb return MT_CIPHER_CCMP_256;
766c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_GCMP:
776c92544dSBjoern A. Zeeb return MT_CIPHER_GCMP;
786c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_GCMP_256:
796c92544dSBjoern A. Zeeb return MT_CIPHER_GCMP_256;
806c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_SMS4:
816c92544dSBjoern A. Zeeb return MT_CIPHER_WAPI;
826c92544dSBjoern A. Zeeb default:
836c92544dSBjoern A. Zeeb return MT_CIPHER_NONE;
846c92544dSBjoern A. Zeeb }
856c92544dSBjoern A. Zeeb }
866c92544dSBjoern A. Zeeb
mt7615_rx_get_wcid(struct mt7615_dev * dev,u8 idx,bool unicast)876c92544dSBjoern A. Zeeb static struct mt76_wcid *mt7615_rx_get_wcid(struct mt7615_dev *dev,
886c92544dSBjoern A. Zeeb u8 idx, bool unicast)
896c92544dSBjoern A. Zeeb {
906c92544dSBjoern A. Zeeb struct mt7615_sta *sta;
916c92544dSBjoern A. Zeeb struct mt76_wcid *wcid;
926c92544dSBjoern A. Zeeb
936c92544dSBjoern A. Zeeb if (idx >= MT7615_WTBL_SIZE)
946c92544dSBjoern A. Zeeb return NULL;
956c92544dSBjoern A. Zeeb
966c92544dSBjoern A. Zeeb wcid = rcu_dereference(dev->mt76.wcid[idx]);
976c92544dSBjoern A. Zeeb if (unicast || !wcid)
986c92544dSBjoern A. Zeeb return wcid;
996c92544dSBjoern A. Zeeb
1006c92544dSBjoern A. Zeeb if (!wcid->sta)
1016c92544dSBjoern A. Zeeb return NULL;
1026c92544dSBjoern A. Zeeb
1036c92544dSBjoern A. Zeeb sta = container_of(wcid, struct mt7615_sta, wcid);
1046c92544dSBjoern A. Zeeb if (!sta->vif)
1056c92544dSBjoern A. Zeeb return NULL;
1066c92544dSBjoern A. Zeeb
1076c92544dSBjoern A. Zeeb return &sta->vif->sta.wcid;
1086c92544dSBjoern A. Zeeb }
1096c92544dSBjoern A. Zeeb
mt7615_mac_reset_counters(struct mt7615_phy * phy)110cbb3ec25SBjoern A. Zeeb void mt7615_mac_reset_counters(struct mt7615_phy *phy)
1116c92544dSBjoern A. Zeeb {
112cbb3ec25SBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
1136c92544dSBjoern A. Zeeb int i;
1146c92544dSBjoern A. Zeeb
1156c92544dSBjoern A. Zeeb for (i = 0; i < 4; i++) {
1166c92544dSBjoern A. Zeeb mt76_rr(dev, MT_TX_AGG_CNT(0, i));
1176c92544dSBjoern A. Zeeb mt76_rr(dev, MT_TX_AGG_CNT(1, i));
1186c92544dSBjoern A. Zeeb }
1196c92544dSBjoern A. Zeeb
120cbb3ec25SBjoern A. Zeeb memset(phy->mt76->aggr_stats, 0, sizeof(phy->mt76->aggr_stats));
121cbb3ec25SBjoern A. Zeeb phy->mt76->survey_time = ktime_get_boottime();
1226c92544dSBjoern A. Zeeb
1236c92544dSBjoern A. Zeeb /* reset airtime counters */
1246c92544dSBjoern A. Zeeb mt76_rr(dev, MT_MIB_SDR9(0));
1256c92544dSBjoern A. Zeeb mt76_rr(dev, MT_MIB_SDR9(1));
1266c92544dSBjoern A. Zeeb
1276c92544dSBjoern A. Zeeb mt76_rr(dev, MT_MIB_SDR36(0));
1286c92544dSBjoern A. Zeeb mt76_rr(dev, MT_MIB_SDR36(1));
1296c92544dSBjoern A. Zeeb
1306c92544dSBjoern A. Zeeb mt76_rr(dev, MT_MIB_SDR37(0));
1316c92544dSBjoern A. Zeeb mt76_rr(dev, MT_MIB_SDR37(1));
1326c92544dSBjoern A. Zeeb
1336c92544dSBjoern A. Zeeb mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_CLR);
1346c92544dSBjoern A. Zeeb mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0, MT_WF_RMAC_MIB_RXTIME_CLR);
1356c92544dSBjoern A. Zeeb }
1366c92544dSBjoern A. Zeeb
mt7615_mac_set_timing(struct mt7615_phy * phy)1376c92544dSBjoern A. Zeeb void mt7615_mac_set_timing(struct mt7615_phy *phy)
1386c92544dSBjoern A. Zeeb {
1396c92544dSBjoern A. Zeeb s16 coverage_class = phy->coverage_class;
1406c92544dSBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
1416c92544dSBjoern A. Zeeb bool ext_phy = phy != &dev->phy;
1426c92544dSBjoern A. Zeeb u32 val, reg_offset;
1436c92544dSBjoern A. Zeeb u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) |
1446c92544dSBjoern A. Zeeb FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48);
1456c92544dSBjoern A. Zeeb u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) |
1466c92544dSBjoern A. Zeeb FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28);
1476c92544dSBjoern A. Zeeb int sifs, offset;
1486c92544dSBjoern A. Zeeb bool is_5ghz = phy->mt76->chandef.chan->band == NL80211_BAND_5GHZ;
1496c92544dSBjoern A. Zeeb
1506c92544dSBjoern A. Zeeb if (!test_bit(MT76_STATE_RUNNING, &phy->mt76->state))
1516c92544dSBjoern A. Zeeb return;
1526c92544dSBjoern A. Zeeb
1536c92544dSBjoern A. Zeeb if (is_5ghz)
1546c92544dSBjoern A. Zeeb sifs = 16;
1556c92544dSBjoern A. Zeeb else
1566c92544dSBjoern A. Zeeb sifs = 10;
1576c92544dSBjoern A. Zeeb
1586c92544dSBjoern A. Zeeb if (ext_phy) {
1596c92544dSBjoern A. Zeeb coverage_class = max_t(s16, dev->phy.coverage_class,
1606c92544dSBjoern A. Zeeb coverage_class);
1616c92544dSBjoern A. Zeeb mt76_set(dev, MT_ARB_SCR,
1626c92544dSBjoern A. Zeeb MT_ARB_SCR_TX1_DISABLE | MT_ARB_SCR_RX1_DISABLE);
1636c92544dSBjoern A. Zeeb } else {
1646c92544dSBjoern A. Zeeb struct mt7615_phy *phy_ext = mt7615_ext_phy(dev);
1656c92544dSBjoern A. Zeeb
1666c92544dSBjoern A. Zeeb if (phy_ext)
1676c92544dSBjoern A. Zeeb coverage_class = max_t(s16, phy_ext->coverage_class,
1686c92544dSBjoern A. Zeeb coverage_class);
1696c92544dSBjoern A. Zeeb mt76_set(dev, MT_ARB_SCR,
1706c92544dSBjoern A. Zeeb MT_ARB_SCR_TX0_DISABLE | MT_ARB_SCR_RX0_DISABLE);
1716c92544dSBjoern A. Zeeb }
1726c92544dSBjoern A. Zeeb udelay(1);
1736c92544dSBjoern A. Zeeb
1746c92544dSBjoern A. Zeeb offset = 3 * coverage_class;
1756c92544dSBjoern A. Zeeb reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) |
1766c92544dSBjoern A. Zeeb FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset);
1776c92544dSBjoern A. Zeeb mt76_wr(dev, MT_TMAC_CDTR, cck + reg_offset);
1786c92544dSBjoern A. Zeeb mt76_wr(dev, MT_TMAC_ODTR, ofdm + reg_offset);
1796c92544dSBjoern A. Zeeb
1806c92544dSBjoern A. Zeeb mt76_wr(dev, MT_TMAC_ICR(ext_phy),
1816c92544dSBjoern A. Zeeb FIELD_PREP(MT_IFS_EIFS, 360) |
1826c92544dSBjoern A. Zeeb FIELD_PREP(MT_IFS_RIFS, 2) |
1836c92544dSBjoern A. Zeeb FIELD_PREP(MT_IFS_SIFS, sifs) |
1846c92544dSBjoern A. Zeeb FIELD_PREP(MT_IFS_SLOT, phy->slottime));
1856c92544dSBjoern A. Zeeb
1866c92544dSBjoern A. Zeeb if (phy->slottime < 20 || is_5ghz)
1876c92544dSBjoern A. Zeeb val = MT7615_CFEND_RATE_DEFAULT;
1886c92544dSBjoern A. Zeeb else
1896c92544dSBjoern A. Zeeb val = MT7615_CFEND_RATE_11B;
1906c92544dSBjoern A. Zeeb
1916c92544dSBjoern A. Zeeb mt76_rmw_field(dev, MT_AGG_ACR(ext_phy), MT_AGG_ACR_CFEND_RATE, val);
1926c92544dSBjoern A. Zeeb if (ext_phy)
1936c92544dSBjoern A. Zeeb mt76_clear(dev, MT_ARB_SCR,
1946c92544dSBjoern A. Zeeb MT_ARB_SCR_TX1_DISABLE | MT_ARB_SCR_RX1_DISABLE);
1956c92544dSBjoern A. Zeeb else
1966c92544dSBjoern A. Zeeb mt76_clear(dev, MT_ARB_SCR,
1976c92544dSBjoern A. Zeeb MT_ARB_SCR_TX0_DISABLE | MT_ARB_SCR_RX0_DISABLE);
1986c92544dSBjoern A. Zeeb
1996c92544dSBjoern A. Zeeb }
2006c92544dSBjoern A. Zeeb
2016c92544dSBjoern A. Zeeb static void
mt7615_get_status_freq_info(struct mt7615_dev * dev,struct mt76_phy * mphy,struct mt76_rx_status * status,u8 chfreq)2026c92544dSBjoern A. Zeeb mt7615_get_status_freq_info(struct mt7615_dev *dev, struct mt76_phy *mphy,
2036c92544dSBjoern A. Zeeb struct mt76_rx_status *status, u8 chfreq)
2046c92544dSBjoern A. Zeeb {
2056c92544dSBjoern A. Zeeb if (!test_bit(MT76_HW_SCANNING, &mphy->state) &&
2066c92544dSBjoern A. Zeeb !test_bit(MT76_HW_SCHED_SCANNING, &mphy->state) &&
2076c92544dSBjoern A. Zeeb !test_bit(MT76_STATE_ROC, &mphy->state)) {
2086c92544dSBjoern A. Zeeb status->freq = mphy->chandef.chan->center_freq;
2096c92544dSBjoern A. Zeeb status->band = mphy->chandef.chan->band;
2106c92544dSBjoern A. Zeeb return;
2116c92544dSBjoern A. Zeeb }
2126c92544dSBjoern A. Zeeb
2136c92544dSBjoern A. Zeeb status->band = chfreq <= 14 ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
2146c92544dSBjoern A. Zeeb status->freq = ieee80211_channel_to_frequency(chfreq, status->band);
2156c92544dSBjoern A. Zeeb }
2166c92544dSBjoern A. Zeeb
mt7615_mac_fill_tm_rx(struct mt7615_phy * phy,__le32 * rxv)2176c92544dSBjoern A. Zeeb static void mt7615_mac_fill_tm_rx(struct mt7615_phy *phy, __le32 *rxv)
2186c92544dSBjoern A. Zeeb {
2196c92544dSBjoern A. Zeeb #ifdef CONFIG_NL80211_TESTMODE
2206c92544dSBjoern A. Zeeb u32 rxv1 = le32_to_cpu(rxv[0]);
2216c92544dSBjoern A. Zeeb u32 rxv3 = le32_to_cpu(rxv[2]);
2226c92544dSBjoern A. Zeeb u32 rxv4 = le32_to_cpu(rxv[3]);
2236c92544dSBjoern A. Zeeb u32 rxv5 = le32_to_cpu(rxv[4]);
2246c92544dSBjoern A. Zeeb u8 cbw = FIELD_GET(MT_RXV1_FRAME_MODE, rxv1);
2256c92544dSBjoern A. Zeeb u8 mode = FIELD_GET(MT_RXV1_TX_MODE, rxv1);
2266c92544dSBjoern A. Zeeb s16 foe = FIELD_GET(MT_RXV5_FOE, rxv5);
2276c92544dSBjoern A. Zeeb u32 foe_const = (BIT(cbw + 1) & 0xf) * 10000;
2286c92544dSBjoern A. Zeeb
2296c92544dSBjoern A. Zeeb if (!mode) {
2306c92544dSBjoern A. Zeeb /* CCK */
2316c92544dSBjoern A. Zeeb foe &= ~BIT(11);
2326c92544dSBjoern A. Zeeb foe *= 1000;
2336c92544dSBjoern A. Zeeb foe >>= 11;
2346c92544dSBjoern A. Zeeb } else {
2356c92544dSBjoern A. Zeeb if (foe > 2048)
2366c92544dSBjoern A. Zeeb foe -= 4096;
2376c92544dSBjoern A. Zeeb
2386c92544dSBjoern A. Zeeb foe = (foe * foe_const) >> 15;
2396c92544dSBjoern A. Zeeb }
2406c92544dSBjoern A. Zeeb
2416c92544dSBjoern A. Zeeb phy->test.last_freq_offset = foe;
2426c92544dSBjoern A. Zeeb phy->test.last_rcpi[0] = FIELD_GET(MT_RXV4_RCPI0, rxv4);
2436c92544dSBjoern A. Zeeb phy->test.last_rcpi[1] = FIELD_GET(MT_RXV4_RCPI1, rxv4);
2446c92544dSBjoern A. Zeeb phy->test.last_rcpi[2] = FIELD_GET(MT_RXV4_RCPI2, rxv4);
2456c92544dSBjoern A. Zeeb phy->test.last_rcpi[3] = FIELD_GET(MT_RXV4_RCPI3, rxv4);
2466c92544dSBjoern A. Zeeb phy->test.last_ib_rssi[0] = FIELD_GET(MT_RXV3_IB_RSSI, rxv3);
2476c92544dSBjoern A. Zeeb phy->test.last_wb_rssi[0] = FIELD_GET(MT_RXV3_WB_RSSI, rxv3);
2486c92544dSBjoern A. Zeeb #endif
2496c92544dSBjoern A. Zeeb }
2506c92544dSBjoern A. Zeeb
2516c92544dSBjoern A. Zeeb /* The HW does not translate the mac header to 802.3 for mesh point */
mt7615_reverse_frag0_hdr_trans(struct sk_buff * skb,u16 hdr_gap)2526c92544dSBjoern A. Zeeb static int mt7615_reverse_frag0_hdr_trans(struct sk_buff *skb, u16 hdr_gap)
2536c92544dSBjoern A. Zeeb {
2546c92544dSBjoern A. Zeeb struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
2556c92544dSBjoern A. Zeeb struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_gap);
2566c92544dSBjoern A. Zeeb struct mt7615_sta *msta = (struct mt7615_sta *)status->wcid;
2576c92544dSBjoern A. Zeeb __le32 *rxd = (__le32 *)skb->data;
2586c92544dSBjoern A. Zeeb struct ieee80211_sta *sta;
2596c92544dSBjoern A. Zeeb struct ieee80211_vif *vif;
2606c92544dSBjoern A. Zeeb struct ieee80211_hdr hdr;
2616c92544dSBjoern A. Zeeb u16 frame_control;
2626c92544dSBjoern A. Zeeb
2636c92544dSBjoern A. Zeeb if (le32_get_bits(rxd[1], MT_RXD1_NORMAL_ADDR_TYPE) !=
2646c92544dSBjoern A. Zeeb MT_RXD1_NORMAL_U2M)
2656c92544dSBjoern A. Zeeb return -EINVAL;
2666c92544dSBjoern A. Zeeb
2676c92544dSBjoern A. Zeeb if (!(le32_to_cpu(rxd[0]) & MT_RXD0_NORMAL_GROUP_4))
2686c92544dSBjoern A. Zeeb return -EINVAL;
2696c92544dSBjoern A. Zeeb
2706c92544dSBjoern A. Zeeb if (!msta || !msta->vif)
2716c92544dSBjoern A. Zeeb return -EINVAL;
2726c92544dSBjoern A. Zeeb
2736c92544dSBjoern A. Zeeb sta = container_of((void *)msta, struct ieee80211_sta, drv_priv);
2746c92544dSBjoern A. Zeeb vif = container_of((void *)msta->vif, struct ieee80211_vif, drv_priv);
2756c92544dSBjoern A. Zeeb
2766c92544dSBjoern A. Zeeb /* store the info from RXD and ethhdr to avoid being overridden */
2776c92544dSBjoern A. Zeeb frame_control = le32_get_bits(rxd[4], MT_RXD4_FRAME_CONTROL);
2786c92544dSBjoern A. Zeeb hdr.frame_control = cpu_to_le16(frame_control);
2796c92544dSBjoern A. Zeeb hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[6], MT_RXD6_SEQ_CTRL));
2806c92544dSBjoern A. Zeeb hdr.duration_id = 0;
2816c92544dSBjoern A. Zeeb
2826c92544dSBjoern A. Zeeb ether_addr_copy(hdr.addr1, vif->addr);
2836c92544dSBjoern A. Zeeb ether_addr_copy(hdr.addr2, sta->addr);
2846c92544dSBjoern A. Zeeb switch (frame_control & (IEEE80211_FCTL_TODS |
2856c92544dSBjoern A. Zeeb IEEE80211_FCTL_FROMDS)) {
2866c92544dSBjoern A. Zeeb case 0:
2876c92544dSBjoern A. Zeeb ether_addr_copy(hdr.addr3, vif->bss_conf.bssid);
2886c92544dSBjoern A. Zeeb break;
2896c92544dSBjoern A. Zeeb case IEEE80211_FCTL_FROMDS:
2906c92544dSBjoern A. Zeeb ether_addr_copy(hdr.addr3, eth_hdr->h_source);
2916c92544dSBjoern A. Zeeb break;
2926c92544dSBjoern A. Zeeb case IEEE80211_FCTL_TODS:
2936c92544dSBjoern A. Zeeb ether_addr_copy(hdr.addr3, eth_hdr->h_dest);
2946c92544dSBjoern A. Zeeb break;
2956c92544dSBjoern A. Zeeb case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS:
2966c92544dSBjoern A. Zeeb ether_addr_copy(hdr.addr3, eth_hdr->h_dest);
2976c92544dSBjoern A. Zeeb ether_addr_copy(hdr.addr4, eth_hdr->h_source);
2986c92544dSBjoern A. Zeeb break;
2996c92544dSBjoern A. Zeeb default:
3006c92544dSBjoern A. Zeeb break;
3016c92544dSBjoern A. Zeeb }
3026c92544dSBjoern A. Zeeb
3036c92544dSBjoern A. Zeeb skb_pull(skb, hdr_gap + sizeof(struct ethhdr) - 2);
3046c92544dSBjoern A. Zeeb if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) ||
3056c92544dSBjoern A. Zeeb eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX))
3066c92544dSBjoern A. Zeeb ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header);
3076c92544dSBjoern A. Zeeb else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN)
3086c92544dSBjoern A. Zeeb ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header);
3096c92544dSBjoern A. Zeeb else
3106c92544dSBjoern A. Zeeb skb_pull(skb, 2);
3116c92544dSBjoern A. Zeeb
3126c92544dSBjoern A. Zeeb if (ieee80211_has_order(hdr.frame_control))
3136c92544dSBjoern A. Zeeb memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[7],
3146c92544dSBjoern A. Zeeb IEEE80211_HT_CTL_LEN);
3156c92544dSBjoern A. Zeeb
3166c92544dSBjoern A. Zeeb if (ieee80211_is_data_qos(hdr.frame_control)) {
3176c92544dSBjoern A. Zeeb __le16 qos_ctrl;
3186c92544dSBjoern A. Zeeb
3196c92544dSBjoern A. Zeeb qos_ctrl = cpu_to_le16(le32_get_bits(rxd[6], MT_RXD6_QOS_CTL));
3206c92544dSBjoern A. Zeeb memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl,
3216c92544dSBjoern A. Zeeb IEEE80211_QOS_CTL_LEN);
3226c92544dSBjoern A. Zeeb }
3236c92544dSBjoern A. Zeeb
3246c92544dSBjoern A. Zeeb if (ieee80211_has_a4(hdr.frame_control))
3256c92544dSBjoern A. Zeeb memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr));
3266c92544dSBjoern A. Zeeb else
3276c92544dSBjoern A. Zeeb memcpy(skb_push(skb, sizeof(hdr) - 6), &hdr, sizeof(hdr) - 6);
3286c92544dSBjoern A. Zeeb
3296c92544dSBjoern A. Zeeb status->flag &= ~(RX_FLAG_RADIOTAP_HE | RX_FLAG_RADIOTAP_HE_MU);
3306c92544dSBjoern A. Zeeb return 0;
3316c92544dSBjoern A. Zeeb }
3326c92544dSBjoern A. Zeeb
mt7615_mac_fill_rx(struct mt7615_dev * dev,struct sk_buff * skb)3336c92544dSBjoern A. Zeeb static int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb)
3346c92544dSBjoern A. Zeeb {
3356c92544dSBjoern A. Zeeb struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
3366c92544dSBjoern A. Zeeb struct mt76_phy *mphy = &dev->mt76.phy;
3376c92544dSBjoern A. Zeeb struct mt7615_phy *phy = &dev->phy;
3386c92544dSBjoern A. Zeeb struct ieee80211_supported_band *sband;
3396c92544dSBjoern A. Zeeb struct ieee80211_hdr *hdr;
3406c92544dSBjoern A. Zeeb struct mt7615_phy *phy2;
3416c92544dSBjoern A. Zeeb __le32 *rxd = (__le32 *)skb->data;
3426c92544dSBjoern A. Zeeb u32 rxd0 = le32_to_cpu(rxd[0]);
3436c92544dSBjoern A. Zeeb u32 rxd1 = le32_to_cpu(rxd[1]);
3446c92544dSBjoern A. Zeeb u32 rxd2 = le32_to_cpu(rxd[2]);
3456c92544dSBjoern A. Zeeb u32 csum_mask = MT_RXD0_NORMAL_IP_SUM | MT_RXD0_NORMAL_UDP_TCP_SUM;
3466c92544dSBjoern A. Zeeb u32 csum_status = *(u32 *)skb->cb;
3476c92544dSBjoern A. Zeeb bool unicast, hdr_trans, remove_pad, insert_ccmp_hdr = false;
3486c92544dSBjoern A. Zeeb u16 hdr_gap;
3496c92544dSBjoern A. Zeeb int phy_idx;
3506c92544dSBjoern A. Zeeb int i, idx;
3516c92544dSBjoern A. Zeeb u8 chfreq, amsdu_info, qos_ctl = 0;
3526c92544dSBjoern A. Zeeb u16 seq_ctrl = 0;
3536c92544dSBjoern A. Zeeb __le16 fc = 0;
3546c92544dSBjoern A. Zeeb
3556c92544dSBjoern A. Zeeb memset(status, 0, sizeof(*status));
3566c92544dSBjoern A. Zeeb
3576c92544dSBjoern A. Zeeb chfreq = FIELD_GET(MT_RXD1_NORMAL_CH_FREQ, rxd1);
3586c92544dSBjoern A. Zeeb
3596c92544dSBjoern A. Zeeb phy2 = dev->mt76.phys[MT_BAND1] ? dev->mt76.phys[MT_BAND1]->priv : NULL;
3606c92544dSBjoern A. Zeeb if (!phy2)
3616c92544dSBjoern A. Zeeb phy_idx = 0;
3626c92544dSBjoern A. Zeeb else if (phy2->chfreq == phy->chfreq)
3636c92544dSBjoern A. Zeeb phy_idx = -1;
3646c92544dSBjoern A. Zeeb else if (phy->chfreq == chfreq)
3656c92544dSBjoern A. Zeeb phy_idx = 0;
3666c92544dSBjoern A. Zeeb else if (phy2->chfreq == chfreq)
3676c92544dSBjoern A. Zeeb phy_idx = 1;
3686c92544dSBjoern A. Zeeb else
3696c92544dSBjoern A. Zeeb phy_idx = -1;
3706c92544dSBjoern A. Zeeb
3716c92544dSBjoern A. Zeeb if (rxd2 & MT_RXD2_NORMAL_AMSDU_ERR)
3726c92544dSBjoern A. Zeeb return -EINVAL;
3736c92544dSBjoern A. Zeeb
3746c92544dSBjoern A. Zeeb hdr_trans = rxd1 & MT_RXD1_NORMAL_HDR_TRANS;
3756c92544dSBjoern A. Zeeb if (hdr_trans && (rxd2 & MT_RXD2_NORMAL_CM))
3766c92544dSBjoern A. Zeeb return -EINVAL;
3776c92544dSBjoern A. Zeeb
3786c92544dSBjoern A. Zeeb /* ICV error or CCMP/BIP/WPI MIC error */
3796c92544dSBjoern A. Zeeb if (rxd2 & MT_RXD2_NORMAL_ICV_ERR)
3806c92544dSBjoern A. Zeeb status->flag |= RX_FLAG_ONLY_MONITOR;
3816c92544dSBjoern A. Zeeb
3826c92544dSBjoern A. Zeeb unicast = (rxd1 & MT_RXD1_NORMAL_ADDR_TYPE) == MT_RXD1_NORMAL_U2M;
3836c92544dSBjoern A. Zeeb idx = FIELD_GET(MT_RXD2_NORMAL_WLAN_IDX, rxd2);
3846c92544dSBjoern A. Zeeb status->wcid = mt7615_rx_get_wcid(dev, idx, unicast);
3856c92544dSBjoern A. Zeeb
3866c92544dSBjoern A. Zeeb if (status->wcid) {
3876c92544dSBjoern A. Zeeb struct mt7615_sta *msta;
3886c92544dSBjoern A. Zeeb
3896c92544dSBjoern A. Zeeb msta = container_of(status->wcid, struct mt7615_sta, wcid);
390cbb3ec25SBjoern A. Zeeb spin_lock_bh(&dev->mt76.sta_poll_lock);
391cbb3ec25SBjoern A. Zeeb if (list_empty(&msta->wcid.poll_list))
392cbb3ec25SBjoern A. Zeeb list_add_tail(&msta->wcid.poll_list,
393cbb3ec25SBjoern A. Zeeb &dev->mt76.sta_poll_list);
394cbb3ec25SBjoern A. Zeeb spin_unlock_bh(&dev->mt76.sta_poll_lock);
3956c92544dSBjoern A. Zeeb }
3966c92544dSBjoern A. Zeeb
3976c92544dSBjoern A. Zeeb if (mt76_is_mmio(&dev->mt76) && (rxd0 & csum_mask) == csum_mask &&
3986c92544dSBjoern A. Zeeb !(csum_status & (BIT(0) | BIT(2) | BIT(3))))
3996c92544dSBjoern A. Zeeb skb->ip_summed = CHECKSUM_UNNECESSARY;
4006c92544dSBjoern A. Zeeb
4016c92544dSBjoern A. Zeeb if (rxd2 & MT_RXD2_NORMAL_FCS_ERR)
4026c92544dSBjoern A. Zeeb status->flag |= RX_FLAG_FAILED_FCS_CRC;
4036c92544dSBjoern A. Zeeb
4046c92544dSBjoern A. Zeeb if (rxd2 & MT_RXD2_NORMAL_TKIP_MIC_ERR)
4056c92544dSBjoern A. Zeeb status->flag |= RX_FLAG_MMIC_ERROR;
4066c92544dSBjoern A. Zeeb
4076c92544dSBjoern A. Zeeb if (FIELD_GET(MT_RXD2_NORMAL_SEC_MODE, rxd2) != 0 &&
4086c92544dSBjoern A. Zeeb !(rxd2 & (MT_RXD2_NORMAL_CLM | MT_RXD2_NORMAL_CM))) {
4096c92544dSBjoern A. Zeeb status->flag |= RX_FLAG_DECRYPTED;
4106c92544dSBjoern A. Zeeb status->flag |= RX_FLAG_IV_STRIPPED;
4116c92544dSBjoern A. Zeeb status->flag |= RX_FLAG_MMIC_STRIPPED | RX_FLAG_MIC_STRIPPED;
4126c92544dSBjoern A. Zeeb }
4136c92544dSBjoern A. Zeeb
4146c92544dSBjoern A. Zeeb remove_pad = rxd1 & MT_RXD1_NORMAL_HDR_OFFSET;
4156c92544dSBjoern A. Zeeb
4166c92544dSBjoern A. Zeeb if (rxd2 & MT_RXD2_NORMAL_MAX_LEN_ERROR)
4176c92544dSBjoern A. Zeeb return -EINVAL;
4186c92544dSBjoern A. Zeeb
4196c92544dSBjoern A. Zeeb rxd += 4;
4206c92544dSBjoern A. Zeeb if (rxd0 & MT_RXD0_NORMAL_GROUP_4) {
4216c92544dSBjoern A. Zeeb u32 v0 = le32_to_cpu(rxd[0]);
4226c92544dSBjoern A. Zeeb u32 v2 = le32_to_cpu(rxd[2]);
4236c92544dSBjoern A. Zeeb
4246c92544dSBjoern A. Zeeb fc = cpu_to_le16(FIELD_GET(MT_RXD4_FRAME_CONTROL, v0));
4256c92544dSBjoern A. Zeeb qos_ctl = FIELD_GET(MT_RXD6_QOS_CTL, v2);
4266c92544dSBjoern A. Zeeb seq_ctrl = FIELD_GET(MT_RXD6_SEQ_CTRL, v2);
4276c92544dSBjoern A. Zeeb
4286c92544dSBjoern A. Zeeb rxd += 4;
4296c92544dSBjoern A. Zeeb if ((u8 *)rxd - skb->data >= skb->len)
4306c92544dSBjoern A. Zeeb return -EINVAL;
4316c92544dSBjoern A. Zeeb }
4326c92544dSBjoern A. Zeeb
4336c92544dSBjoern A. Zeeb if (rxd0 & MT_RXD0_NORMAL_GROUP_1) {
4346c92544dSBjoern A. Zeeb u8 *data = (u8 *)rxd;
4356c92544dSBjoern A. Zeeb
4366c92544dSBjoern A. Zeeb if (status->flag & RX_FLAG_DECRYPTED) {
4376c92544dSBjoern A. Zeeb switch (FIELD_GET(MT_RXD2_NORMAL_SEC_MODE, rxd2)) {
4386c92544dSBjoern A. Zeeb case MT_CIPHER_AES_CCMP:
4396c92544dSBjoern A. Zeeb case MT_CIPHER_CCMP_CCX:
4406c92544dSBjoern A. Zeeb case MT_CIPHER_CCMP_256:
4416c92544dSBjoern A. Zeeb insert_ccmp_hdr =
4426c92544dSBjoern A. Zeeb FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2);
4436c92544dSBjoern A. Zeeb fallthrough;
4446c92544dSBjoern A. Zeeb case MT_CIPHER_TKIP:
4456c92544dSBjoern A. Zeeb case MT_CIPHER_TKIP_NO_MIC:
4466c92544dSBjoern A. Zeeb case MT_CIPHER_GCMP:
4476c92544dSBjoern A. Zeeb case MT_CIPHER_GCMP_256:
4486c92544dSBjoern A. Zeeb status->iv[0] = data[5];
4496c92544dSBjoern A. Zeeb status->iv[1] = data[4];
4506c92544dSBjoern A. Zeeb status->iv[2] = data[3];
4516c92544dSBjoern A. Zeeb status->iv[3] = data[2];
4526c92544dSBjoern A. Zeeb status->iv[4] = data[1];
4536c92544dSBjoern A. Zeeb status->iv[5] = data[0];
4546c92544dSBjoern A. Zeeb break;
4556c92544dSBjoern A. Zeeb default:
4566c92544dSBjoern A. Zeeb break;
4576c92544dSBjoern A. Zeeb }
4586c92544dSBjoern A. Zeeb }
4596c92544dSBjoern A. Zeeb rxd += 4;
4606c92544dSBjoern A. Zeeb if ((u8 *)rxd - skb->data >= skb->len)
4616c92544dSBjoern A. Zeeb return -EINVAL;
4626c92544dSBjoern A. Zeeb }
4636c92544dSBjoern A. Zeeb
4646c92544dSBjoern A. Zeeb if (rxd0 & MT_RXD0_NORMAL_GROUP_2) {
4656c92544dSBjoern A. Zeeb status->timestamp = le32_to_cpu(rxd[0]);
4666c92544dSBjoern A. Zeeb status->flag |= RX_FLAG_MACTIME_START;
4676c92544dSBjoern A. Zeeb
4686c92544dSBjoern A. Zeeb if (!(rxd2 & (MT_RXD2_NORMAL_NON_AMPDU_SUB |
4696c92544dSBjoern A. Zeeb MT_RXD2_NORMAL_NON_AMPDU))) {
4706c92544dSBjoern A. Zeeb status->flag |= RX_FLAG_AMPDU_DETAILS;
4716c92544dSBjoern A. Zeeb
4726c92544dSBjoern A. Zeeb /* all subframes of an A-MPDU have the same timestamp */
4736c92544dSBjoern A. Zeeb if (phy->rx_ampdu_ts != status->timestamp) {
4746c92544dSBjoern A. Zeeb if (!++phy->ampdu_ref)
4756c92544dSBjoern A. Zeeb phy->ampdu_ref++;
4766c92544dSBjoern A. Zeeb }
4776c92544dSBjoern A. Zeeb phy->rx_ampdu_ts = status->timestamp;
4786c92544dSBjoern A. Zeeb
4796c92544dSBjoern A. Zeeb status->ampdu_ref = phy->ampdu_ref;
4806c92544dSBjoern A. Zeeb }
4816c92544dSBjoern A. Zeeb
4826c92544dSBjoern A. Zeeb rxd += 2;
4836c92544dSBjoern A. Zeeb if ((u8 *)rxd - skb->data >= skb->len)
4846c92544dSBjoern A. Zeeb return -EINVAL;
4856c92544dSBjoern A. Zeeb }
4866c92544dSBjoern A. Zeeb
4876c92544dSBjoern A. Zeeb if (rxd0 & MT_RXD0_NORMAL_GROUP_3) {
4886c92544dSBjoern A. Zeeb u32 rxdg5 = le32_to_cpu(rxd[5]);
4896c92544dSBjoern A. Zeeb
4906c92544dSBjoern A. Zeeb /*
4916c92544dSBjoern A. Zeeb * If both PHYs are on the same channel and we don't have a WCID,
4926c92544dSBjoern A. Zeeb * we need to figure out which PHY this packet was received on.
4936c92544dSBjoern A. Zeeb * On the primary PHY, the noise value for the chains belonging to the
4946c92544dSBjoern A. Zeeb * second PHY will be set to the noise value of the last packet from
4956c92544dSBjoern A. Zeeb * that PHY.
4966c92544dSBjoern A. Zeeb */
4976c92544dSBjoern A. Zeeb if (phy_idx < 0) {
4986c92544dSBjoern A. Zeeb int first_chain = ffs(phy2->mt76->chainmask) - 1;
4996c92544dSBjoern A. Zeeb
5006c92544dSBjoern A. Zeeb phy_idx = ((rxdg5 >> (first_chain * 8)) & 0xff) == 0;
5016c92544dSBjoern A. Zeeb }
5026c92544dSBjoern A. Zeeb }
5036c92544dSBjoern A. Zeeb
5046c92544dSBjoern A. Zeeb if (phy_idx == 1 && phy2) {
5056c92544dSBjoern A. Zeeb mphy = dev->mt76.phys[MT_BAND1];
5066c92544dSBjoern A. Zeeb phy = phy2;
5076c92544dSBjoern A. Zeeb status->phy_idx = phy_idx;
5086c92544dSBjoern A. Zeeb }
5096c92544dSBjoern A. Zeeb
5106c92544dSBjoern A. Zeeb if (!mt7615_firmware_offload(dev) && chfreq != phy->chfreq)
5116c92544dSBjoern A. Zeeb return -EINVAL;
5126c92544dSBjoern A. Zeeb
5136c92544dSBjoern A. Zeeb mt7615_get_status_freq_info(dev, mphy, status, chfreq);
5146c92544dSBjoern A. Zeeb if (status->band == NL80211_BAND_5GHZ)
5156c92544dSBjoern A. Zeeb sband = &mphy->sband_5g.sband;
5166c92544dSBjoern A. Zeeb else
5176c92544dSBjoern A. Zeeb sband = &mphy->sband_2g.sband;
5186c92544dSBjoern A. Zeeb
5196c92544dSBjoern A. Zeeb if (!test_bit(MT76_STATE_RUNNING, &mphy->state))
5206c92544dSBjoern A. Zeeb return -EINVAL;
5216c92544dSBjoern A. Zeeb
5226c92544dSBjoern A. Zeeb if (!sband->channels)
5236c92544dSBjoern A. Zeeb return -EINVAL;
5246c92544dSBjoern A. Zeeb
5256c92544dSBjoern A. Zeeb if (rxd0 & MT_RXD0_NORMAL_GROUP_3) {
5266c92544dSBjoern A. Zeeb u32 rxdg0 = le32_to_cpu(rxd[0]);
5276c92544dSBjoern A. Zeeb u32 rxdg1 = le32_to_cpu(rxd[1]);
5286c92544dSBjoern A. Zeeb u32 rxdg3 = le32_to_cpu(rxd[3]);
5296c92544dSBjoern A. Zeeb u8 stbc = FIELD_GET(MT_RXV1_HT_STBC, rxdg0);
5306c92544dSBjoern A. Zeeb bool cck = false;
5316c92544dSBjoern A. Zeeb
5326c92544dSBjoern A. Zeeb i = FIELD_GET(MT_RXV1_TX_RATE, rxdg0);
5336c92544dSBjoern A. Zeeb switch (FIELD_GET(MT_RXV1_TX_MODE, rxdg0)) {
5346c92544dSBjoern A. Zeeb case MT_PHY_TYPE_CCK:
5356c92544dSBjoern A. Zeeb cck = true;
5366c92544dSBjoern A. Zeeb fallthrough;
5376c92544dSBjoern A. Zeeb case MT_PHY_TYPE_OFDM:
5386c92544dSBjoern A. Zeeb i = mt76_get_rate(&dev->mt76, sband, i, cck);
5396c92544dSBjoern A. Zeeb break;
5406c92544dSBjoern A. Zeeb case MT_PHY_TYPE_HT_GF:
5416c92544dSBjoern A. Zeeb case MT_PHY_TYPE_HT:
5426c92544dSBjoern A. Zeeb status->encoding = RX_ENC_HT;
5436c92544dSBjoern A. Zeeb if (i > 31)
5446c92544dSBjoern A. Zeeb return -EINVAL;
5456c92544dSBjoern A. Zeeb break;
5466c92544dSBjoern A. Zeeb case MT_PHY_TYPE_VHT:
5476c92544dSBjoern A. Zeeb status->nss = FIELD_GET(MT_RXV2_NSTS, rxdg1) + 1;
5486c92544dSBjoern A. Zeeb status->encoding = RX_ENC_VHT;
5496c92544dSBjoern A. Zeeb break;
5506c92544dSBjoern A. Zeeb default:
5516c92544dSBjoern A. Zeeb return -EINVAL;
5526c92544dSBjoern A. Zeeb }
5536c92544dSBjoern A. Zeeb status->rate_idx = i;
5546c92544dSBjoern A. Zeeb
5556c92544dSBjoern A. Zeeb switch (FIELD_GET(MT_RXV1_FRAME_MODE, rxdg0)) {
5566c92544dSBjoern A. Zeeb case MT_PHY_BW_20:
5576c92544dSBjoern A. Zeeb break;
5586c92544dSBjoern A. Zeeb case MT_PHY_BW_40:
5596c92544dSBjoern A. Zeeb status->bw = RATE_INFO_BW_40;
5606c92544dSBjoern A. Zeeb break;
5616c92544dSBjoern A. Zeeb case MT_PHY_BW_80:
5626c92544dSBjoern A. Zeeb status->bw = RATE_INFO_BW_80;
5636c92544dSBjoern A. Zeeb break;
5646c92544dSBjoern A. Zeeb case MT_PHY_BW_160:
5656c92544dSBjoern A. Zeeb status->bw = RATE_INFO_BW_160;
5666c92544dSBjoern A. Zeeb break;
5676c92544dSBjoern A. Zeeb default:
5686c92544dSBjoern A. Zeeb return -EINVAL;
5696c92544dSBjoern A. Zeeb }
5706c92544dSBjoern A. Zeeb
5716c92544dSBjoern A. Zeeb if (rxdg0 & MT_RXV1_HT_SHORT_GI)
5726c92544dSBjoern A. Zeeb status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
5736c92544dSBjoern A. Zeeb if (rxdg0 & MT_RXV1_HT_AD_CODE)
5746c92544dSBjoern A. Zeeb status->enc_flags |= RX_ENC_FLAG_LDPC;
5756c92544dSBjoern A. Zeeb
5766c92544dSBjoern A. Zeeb status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc;
5776c92544dSBjoern A. Zeeb
5786c92544dSBjoern A. Zeeb status->chains = mphy->antenna_mask;
5796c92544dSBjoern A. Zeeb status->chain_signal[0] = to_rssi(MT_RXV4_RCPI0, rxdg3);
5806c92544dSBjoern A. Zeeb status->chain_signal[1] = to_rssi(MT_RXV4_RCPI1, rxdg3);
5816c92544dSBjoern A. Zeeb status->chain_signal[2] = to_rssi(MT_RXV4_RCPI2, rxdg3);
5826c92544dSBjoern A. Zeeb status->chain_signal[3] = to_rssi(MT_RXV4_RCPI3, rxdg3);
5836c92544dSBjoern A. Zeeb
5846c92544dSBjoern A. Zeeb mt7615_mac_fill_tm_rx(mphy->priv, rxd);
5856c92544dSBjoern A. Zeeb
5866c92544dSBjoern A. Zeeb rxd += 6;
5876c92544dSBjoern A. Zeeb if ((u8 *)rxd - skb->data >= skb->len)
5886c92544dSBjoern A. Zeeb return -EINVAL;
5896c92544dSBjoern A. Zeeb }
5906c92544dSBjoern A. Zeeb
5916c92544dSBjoern A. Zeeb amsdu_info = FIELD_GET(MT_RXD1_NORMAL_PAYLOAD_FORMAT, rxd1);
5926c92544dSBjoern A. Zeeb status->amsdu = !!amsdu_info;
5936c92544dSBjoern A. Zeeb if (status->amsdu) {
5946c92544dSBjoern A. Zeeb status->first_amsdu = amsdu_info == MT_RXD1_FIRST_AMSDU_FRAME;
5956c92544dSBjoern A. Zeeb status->last_amsdu = amsdu_info == MT_RXD1_LAST_AMSDU_FRAME;
5966c92544dSBjoern A. Zeeb }
5976c92544dSBjoern A. Zeeb
5986c92544dSBjoern A. Zeeb hdr_gap = (u8 *)rxd - skb->data + 2 * remove_pad;
5996c92544dSBjoern A. Zeeb if (hdr_trans && ieee80211_has_morefrags(fc)) {
6006c92544dSBjoern A. Zeeb if (mt7615_reverse_frag0_hdr_trans(skb, hdr_gap))
6016c92544dSBjoern A. Zeeb return -EINVAL;
6026c92544dSBjoern A. Zeeb hdr_trans = false;
6036c92544dSBjoern A. Zeeb } else {
6046c92544dSBjoern A. Zeeb int pad_start = 0;
6056c92544dSBjoern A. Zeeb
6066c92544dSBjoern A. Zeeb skb_pull(skb, hdr_gap);
6076c92544dSBjoern A. Zeeb if (!hdr_trans && status->amsdu) {
6086c92544dSBjoern A. Zeeb pad_start = ieee80211_get_hdrlen_from_skb(skb);
6096c92544dSBjoern A. Zeeb } else if (hdr_trans && (rxd2 & MT_RXD2_NORMAL_HDR_TRANS_ERROR)) {
6106c92544dSBjoern A. Zeeb /*
6116c92544dSBjoern A. Zeeb * When header translation failure is indicated,
6126c92544dSBjoern A. Zeeb * the hardware will insert an extra 2-byte field
6136c92544dSBjoern A. Zeeb * containing the data length after the protocol
6146c92544dSBjoern A. Zeeb * type field. This happens either when the LLC-SNAP
6156c92544dSBjoern A. Zeeb * pattern did not match, or if a VLAN header was
6166c92544dSBjoern A. Zeeb * detected.
6176c92544dSBjoern A. Zeeb */
6186c92544dSBjoern A. Zeeb pad_start = 12;
6196c92544dSBjoern A. Zeeb if (get_unaligned_be16(skb->data + pad_start) == ETH_P_8021Q)
6206c92544dSBjoern A. Zeeb pad_start += 4;
6216c92544dSBjoern A. Zeeb else
6226c92544dSBjoern A. Zeeb pad_start = 0;
6236c92544dSBjoern A. Zeeb }
6246c92544dSBjoern A. Zeeb
6256c92544dSBjoern A. Zeeb if (pad_start) {
6266c92544dSBjoern A. Zeeb memmove(skb->data + 2, skb->data, pad_start);
6276c92544dSBjoern A. Zeeb skb_pull(skb, 2);
6286c92544dSBjoern A. Zeeb }
6296c92544dSBjoern A. Zeeb }
6306c92544dSBjoern A. Zeeb
6316c92544dSBjoern A. Zeeb if (insert_ccmp_hdr && !hdr_trans) {
6326c92544dSBjoern A. Zeeb u8 key_id = FIELD_GET(MT_RXD1_NORMAL_KEY_ID, rxd1);
6336c92544dSBjoern A. Zeeb
6346c92544dSBjoern A. Zeeb mt76_insert_ccmp_hdr(skb, key_id);
6356c92544dSBjoern A. Zeeb }
6366c92544dSBjoern A. Zeeb
6376c92544dSBjoern A. Zeeb if (!hdr_trans) {
6386c92544dSBjoern A. Zeeb hdr = (struct ieee80211_hdr *)skb->data;
6396c92544dSBjoern A. Zeeb fc = hdr->frame_control;
6406c92544dSBjoern A. Zeeb if (ieee80211_is_data_qos(fc)) {
6416c92544dSBjoern A. Zeeb seq_ctrl = le16_to_cpu(hdr->seq_ctrl);
6426c92544dSBjoern A. Zeeb qos_ctl = *ieee80211_get_qos_ctl(hdr);
6436c92544dSBjoern A. Zeeb }
6446c92544dSBjoern A. Zeeb } else {
6456c92544dSBjoern A. Zeeb status->flag |= RX_FLAG_8023;
6466c92544dSBjoern A. Zeeb }
6476c92544dSBjoern A. Zeeb
6486c92544dSBjoern A. Zeeb if (!status->wcid || !ieee80211_is_data_qos(fc))
6496c92544dSBjoern A. Zeeb return 0;
6506c92544dSBjoern A. Zeeb
6516c92544dSBjoern A. Zeeb status->aggr = unicast &&
6526c92544dSBjoern A. Zeeb !ieee80211_is_qos_nullfunc(fc);
6536c92544dSBjoern A. Zeeb status->qos_ctl = qos_ctl;
6546c92544dSBjoern A. Zeeb status->seqno = IEEE80211_SEQ_TO_SN(seq_ctrl);
6556c92544dSBjoern A. Zeeb
6566c92544dSBjoern A. Zeeb return 0;
6576c92544dSBjoern A. Zeeb }
6586c92544dSBjoern A. Zeeb
6596c92544dSBjoern A. Zeeb static u16
mt7615_mac_tx_rate_val(struct mt7615_dev * dev,struct mt76_phy * mphy,const struct ieee80211_tx_rate * rate,bool stbc,u8 * bw)6606c92544dSBjoern A. Zeeb mt7615_mac_tx_rate_val(struct mt7615_dev *dev,
6616c92544dSBjoern A. Zeeb struct mt76_phy *mphy,
6626c92544dSBjoern A. Zeeb const struct ieee80211_tx_rate *rate,
6636c92544dSBjoern A. Zeeb bool stbc, u8 *bw)
6646c92544dSBjoern A. Zeeb {
6656c92544dSBjoern A. Zeeb u8 phy, nss, rate_idx;
6666c92544dSBjoern A. Zeeb u16 rateval = 0;
6676c92544dSBjoern A. Zeeb
6686c92544dSBjoern A. Zeeb *bw = 0;
6696c92544dSBjoern A. Zeeb
6706c92544dSBjoern A. Zeeb if (rate->flags & IEEE80211_TX_RC_VHT_MCS) {
6716c92544dSBjoern A. Zeeb rate_idx = ieee80211_rate_get_vht_mcs(rate);
6726c92544dSBjoern A. Zeeb nss = ieee80211_rate_get_vht_nss(rate);
6736c92544dSBjoern A. Zeeb phy = MT_PHY_TYPE_VHT;
6746c92544dSBjoern A. Zeeb if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
6756c92544dSBjoern A. Zeeb *bw = 1;
6766c92544dSBjoern A. Zeeb else if (rate->flags & IEEE80211_TX_RC_80_MHZ_WIDTH)
6776c92544dSBjoern A. Zeeb *bw = 2;
6786c92544dSBjoern A. Zeeb else if (rate->flags & IEEE80211_TX_RC_160_MHZ_WIDTH)
6796c92544dSBjoern A. Zeeb *bw = 3;
6806c92544dSBjoern A. Zeeb } else if (rate->flags & IEEE80211_TX_RC_MCS) {
6816c92544dSBjoern A. Zeeb rate_idx = rate->idx;
6826c92544dSBjoern A. Zeeb nss = 1 + (rate->idx >> 3);
6836c92544dSBjoern A. Zeeb phy = MT_PHY_TYPE_HT;
6846c92544dSBjoern A. Zeeb if (rate->flags & IEEE80211_TX_RC_GREEN_FIELD)
6856c92544dSBjoern A. Zeeb phy = MT_PHY_TYPE_HT_GF;
6866c92544dSBjoern A. Zeeb if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
6876c92544dSBjoern A. Zeeb *bw = 1;
6886c92544dSBjoern A. Zeeb } else {
6896c92544dSBjoern A. Zeeb const struct ieee80211_rate *r;
6906c92544dSBjoern A. Zeeb int band = mphy->chandef.chan->band;
6916c92544dSBjoern A. Zeeb u16 val;
6926c92544dSBjoern A. Zeeb
6936c92544dSBjoern A. Zeeb nss = 1;
6946c92544dSBjoern A. Zeeb r = &mphy->hw->wiphy->bands[band]->bitrates[rate->idx];
6956c92544dSBjoern A. Zeeb if (rate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
6966c92544dSBjoern A. Zeeb val = r->hw_value_short;
6976c92544dSBjoern A. Zeeb else
6986c92544dSBjoern A. Zeeb val = r->hw_value;
6996c92544dSBjoern A. Zeeb
7006c92544dSBjoern A. Zeeb phy = val >> 8;
7016c92544dSBjoern A. Zeeb rate_idx = val & 0xff;
7026c92544dSBjoern A. Zeeb }
7036c92544dSBjoern A. Zeeb
7046c92544dSBjoern A. Zeeb if (stbc && nss == 1) {
7056c92544dSBjoern A. Zeeb nss++;
7066c92544dSBjoern A. Zeeb rateval |= MT_TX_RATE_STBC;
7076c92544dSBjoern A. Zeeb }
7086c92544dSBjoern A. Zeeb
7096c92544dSBjoern A. Zeeb rateval |= (FIELD_PREP(MT_TX_RATE_IDX, rate_idx) |
7106c92544dSBjoern A. Zeeb FIELD_PREP(MT_TX_RATE_MODE, phy) |
7116c92544dSBjoern A. Zeeb FIELD_PREP(MT_TX_RATE_NSS, nss - 1));
7126c92544dSBjoern A. Zeeb
7136c92544dSBjoern A. Zeeb return rateval;
7146c92544dSBjoern A. Zeeb }
7156c92544dSBjoern A. Zeeb
mt7615_mac_write_txwi(struct mt7615_dev * dev,__le32 * txwi,struct sk_buff * skb,struct mt76_wcid * wcid,struct ieee80211_sta * sta,int pid,struct ieee80211_key_conf * key,enum mt76_txq_id qid,bool beacon)7166c92544dSBjoern A. Zeeb int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
7176c92544dSBjoern A. Zeeb struct sk_buff *skb, struct mt76_wcid *wcid,
7186c92544dSBjoern A. Zeeb struct ieee80211_sta *sta, int pid,
7196c92544dSBjoern A. Zeeb struct ieee80211_key_conf *key,
7206c92544dSBjoern A. Zeeb enum mt76_txq_id qid, bool beacon)
7216c92544dSBjoern A. Zeeb {
7226c92544dSBjoern A. Zeeb struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
7236c92544dSBjoern A. Zeeb u8 fc_type, fc_stype, p_fmt, q_idx, omac_idx = 0, wmm_idx = 0;
7246c92544dSBjoern A. Zeeb struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
7256c92544dSBjoern A. Zeeb struct ieee80211_tx_rate *rate = &info->control.rates[0];
7266c92544dSBjoern A. Zeeb u8 phy_idx = (info->hw_queue & MT_TX_HW_QUEUE_PHY) >> 2;
7276c92544dSBjoern A. Zeeb bool multicast = is_multicast_ether_addr(hdr->addr1);
7286c92544dSBjoern A. Zeeb struct ieee80211_vif *vif = info->control.vif;
7296c92544dSBjoern A. Zeeb bool is_mmio = mt76_is_mmio(&dev->mt76);
7306c92544dSBjoern A. Zeeb u32 val, sz_txd = is_mmio ? MT_TXD_SIZE : MT_USB_TXD_SIZE;
7316c92544dSBjoern A. Zeeb struct mt76_phy *mphy = &dev->mphy;
7326c92544dSBjoern A. Zeeb __le16 fc = hdr->frame_control;
7336c92544dSBjoern A. Zeeb int tx_count = 8;
7346c92544dSBjoern A. Zeeb u16 seqno = 0;
7356c92544dSBjoern A. Zeeb
7366c92544dSBjoern A. Zeeb if (vif) {
7376c92544dSBjoern A. Zeeb struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
7386c92544dSBjoern A. Zeeb
7396c92544dSBjoern A. Zeeb omac_idx = mvif->omac_idx;
7406c92544dSBjoern A. Zeeb wmm_idx = mvif->wmm_idx;
7416c92544dSBjoern A. Zeeb }
7426c92544dSBjoern A. Zeeb
7436c92544dSBjoern A. Zeeb if (sta) {
7446c92544dSBjoern A. Zeeb struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv;
7456c92544dSBjoern A. Zeeb
7466c92544dSBjoern A. Zeeb tx_count = msta->rate_count;
7476c92544dSBjoern A. Zeeb }
7486c92544dSBjoern A. Zeeb
7496c92544dSBjoern A. Zeeb if (phy_idx && dev->mt76.phys[MT_BAND1])
7506c92544dSBjoern A. Zeeb mphy = dev->mt76.phys[MT_BAND1];
7516c92544dSBjoern A. Zeeb
7526c92544dSBjoern A. Zeeb fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2;
7536c92544dSBjoern A. Zeeb fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4;
7546c92544dSBjoern A. Zeeb
7556c92544dSBjoern A. Zeeb if (beacon) {
7566c92544dSBjoern A. Zeeb p_fmt = MT_TX_TYPE_FW;
7576c92544dSBjoern A. Zeeb q_idx = phy_idx ? MT_LMAC_BCN1 : MT_LMAC_BCN0;
7586c92544dSBjoern A. Zeeb } else if (qid >= MT_TXQ_PSD) {
7596c92544dSBjoern A. Zeeb p_fmt = is_mmio ? MT_TX_TYPE_CT : MT_TX_TYPE_SF;
7606c92544dSBjoern A. Zeeb q_idx = phy_idx ? MT_LMAC_ALTX1 : MT_LMAC_ALTX0;
7616c92544dSBjoern A. Zeeb } else {
7626c92544dSBjoern A. Zeeb p_fmt = is_mmio ? MT_TX_TYPE_CT : MT_TX_TYPE_SF;
7636c92544dSBjoern A. Zeeb q_idx = wmm_idx * MT7615_MAX_WMM_SETS +
7646c92544dSBjoern A. Zeeb mt7615_lmac_mapping(dev, skb_get_queue_mapping(skb));
7656c92544dSBjoern A. Zeeb }
7666c92544dSBjoern A. Zeeb
7676c92544dSBjoern A. Zeeb val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) |
7686c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD0_P_IDX, MT_TX_PORT_IDX_LMAC) |
7696c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD0_Q_IDX, q_idx);
7706c92544dSBjoern A. Zeeb txwi[0] = cpu_to_le32(val);
7716c92544dSBjoern A. Zeeb
7726c92544dSBjoern A. Zeeb val = MT_TXD1_LONG_FORMAT |
7736c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) |
7746c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) |
7756c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD1_HDR_INFO,
7766c92544dSBjoern A. Zeeb ieee80211_get_hdrlen_from_skb(skb) / 2) |
7776c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD1_TID,
7786c92544dSBjoern A. Zeeb skb->priority & IEEE80211_QOS_CTL_TID_MASK) |
7796c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD1_PKT_FMT, p_fmt) |
7806c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx);
7816c92544dSBjoern A. Zeeb txwi[1] = cpu_to_le32(val);
7826c92544dSBjoern A. Zeeb
7836c92544dSBjoern A. Zeeb val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |
7846c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype) |
7856c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD2_MULTICAST, multicast);
7866c92544dSBjoern A. Zeeb if (key) {
7876c92544dSBjoern A. Zeeb if (multicast && ieee80211_is_robust_mgmt_frame(skb) &&
7886c92544dSBjoern A. Zeeb key->cipher == WLAN_CIPHER_SUITE_AES_CMAC) {
7896c92544dSBjoern A. Zeeb val |= MT_TXD2_BIP;
7906c92544dSBjoern A. Zeeb txwi[3] = 0;
7916c92544dSBjoern A. Zeeb } else {
7926c92544dSBjoern A. Zeeb txwi[3] = cpu_to_le32(MT_TXD3_PROTECT_FRAME);
7936c92544dSBjoern A. Zeeb }
7946c92544dSBjoern A. Zeeb } else {
7956c92544dSBjoern A. Zeeb txwi[3] = 0;
7966c92544dSBjoern A. Zeeb }
7976c92544dSBjoern A. Zeeb txwi[2] = cpu_to_le32(val);
7986c92544dSBjoern A. Zeeb
7996c92544dSBjoern A. Zeeb if (!(info->flags & IEEE80211_TX_CTL_AMPDU))
8006c92544dSBjoern A. Zeeb txwi[2] |= cpu_to_le32(MT_TXD2_BA_DISABLE);
8016c92544dSBjoern A. Zeeb
8026c92544dSBjoern A. Zeeb txwi[4] = 0;
8036c92544dSBjoern A. Zeeb txwi[6] = 0;
8046c92544dSBjoern A. Zeeb
8056c92544dSBjoern A. Zeeb if (rate->idx >= 0 && rate->count &&
8066c92544dSBjoern A. Zeeb !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) {
8076c92544dSBjoern A. Zeeb bool stbc = info->flags & IEEE80211_TX_CTL_STBC;
8086c92544dSBjoern A. Zeeb u8 bw;
8096c92544dSBjoern A. Zeeb u16 rateval = mt7615_mac_tx_rate_val(dev, mphy, rate, stbc,
8106c92544dSBjoern A. Zeeb &bw);
8116c92544dSBjoern A. Zeeb
8126c92544dSBjoern A. Zeeb txwi[2] |= cpu_to_le32(MT_TXD2_FIX_RATE);
8136c92544dSBjoern A. Zeeb
8146c92544dSBjoern A. Zeeb val = MT_TXD6_FIXED_BW |
8156c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD6_BW, bw) |
8166c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD6_TX_RATE, rateval);
8176c92544dSBjoern A. Zeeb txwi[6] |= cpu_to_le32(val);
8186c92544dSBjoern A. Zeeb
8196c92544dSBjoern A. Zeeb if (rate->flags & IEEE80211_TX_RC_SHORT_GI)
8206c92544dSBjoern A. Zeeb txwi[6] |= cpu_to_le32(MT_TXD6_SGI);
8216c92544dSBjoern A. Zeeb
8226c92544dSBjoern A. Zeeb if (info->flags & IEEE80211_TX_CTL_LDPC)
8236c92544dSBjoern A. Zeeb txwi[6] |= cpu_to_le32(MT_TXD6_LDPC);
8246c92544dSBjoern A. Zeeb
8256c92544dSBjoern A. Zeeb if (!(rate->flags & (IEEE80211_TX_RC_MCS |
8266c92544dSBjoern A. Zeeb IEEE80211_TX_RC_VHT_MCS)))
8276c92544dSBjoern A. Zeeb txwi[2] |= cpu_to_le32(MT_TXD2_BA_DISABLE);
8286c92544dSBjoern A. Zeeb
8296c92544dSBjoern A. Zeeb tx_count = rate->count;
8306c92544dSBjoern A. Zeeb }
8316c92544dSBjoern A. Zeeb
8326c92544dSBjoern A. Zeeb if (!ieee80211_is_beacon(fc)) {
8336c92544dSBjoern A. Zeeb struct ieee80211_hw *hw = mt76_hw(dev);
8346c92544dSBjoern A. Zeeb
8356c92544dSBjoern A. Zeeb val = MT_TXD5_TX_STATUS_HOST | FIELD_PREP(MT_TXD5_PID, pid);
8366c92544dSBjoern A. Zeeb if (!ieee80211_hw_check(hw, SUPPORTS_PS))
8376c92544dSBjoern A. Zeeb val |= MT_TXD5_SW_POWER_MGMT;
8386c92544dSBjoern A. Zeeb txwi[5] = cpu_to_le32(val);
8396c92544dSBjoern A. Zeeb } else {
8406c92544dSBjoern A. Zeeb txwi[5] = 0;
8416c92544dSBjoern A. Zeeb /* use maximum tx count for beacons */
8426c92544dSBjoern A. Zeeb tx_count = 0x1f;
8436c92544dSBjoern A. Zeeb }
8446c92544dSBjoern A. Zeeb
8456c92544dSBjoern A. Zeeb val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, tx_count);
8466c92544dSBjoern A. Zeeb if (info->flags & IEEE80211_TX_CTL_INJECTED) {
8476c92544dSBjoern A. Zeeb seqno = le16_to_cpu(hdr->seq_ctrl);
8486c92544dSBjoern A. Zeeb
8496c92544dSBjoern A. Zeeb if (ieee80211_is_back_req(hdr->frame_control)) {
8506c92544dSBjoern A. Zeeb struct ieee80211_bar *bar;
8516c92544dSBjoern A. Zeeb
8526c92544dSBjoern A. Zeeb bar = (struct ieee80211_bar *)skb->data;
8536c92544dSBjoern A. Zeeb seqno = le16_to_cpu(bar->start_seq_num);
8546c92544dSBjoern A. Zeeb }
8556c92544dSBjoern A. Zeeb
8566c92544dSBjoern A. Zeeb val |= MT_TXD3_SN_VALID |
8576c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno));
8586c92544dSBjoern A. Zeeb }
8596c92544dSBjoern A. Zeeb
8606c92544dSBjoern A. Zeeb txwi[3] |= cpu_to_le32(val);
8616c92544dSBjoern A. Zeeb
8626c92544dSBjoern A. Zeeb if (info->flags & IEEE80211_TX_CTL_NO_ACK)
8636c92544dSBjoern A. Zeeb txwi[3] |= cpu_to_le32(MT_TXD3_NO_ACK);
8646c92544dSBjoern A. Zeeb
8656c92544dSBjoern A. Zeeb val = FIELD_PREP(MT_TXD7_TYPE, fc_type) |
8666c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype) |
8676c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD7_SPE_IDX, 0x18);
8686c92544dSBjoern A. Zeeb txwi[7] = cpu_to_le32(val);
8696c92544dSBjoern A. Zeeb if (!is_mmio) {
8706c92544dSBjoern A. Zeeb val = FIELD_PREP(MT_TXD8_L_TYPE, fc_type) |
8716c92544dSBjoern A. Zeeb FIELD_PREP(MT_TXD8_L_SUB_TYPE, fc_stype);
8726c92544dSBjoern A. Zeeb txwi[8] = cpu_to_le32(val);
8736c92544dSBjoern A. Zeeb }
8746c92544dSBjoern A. Zeeb
8756c92544dSBjoern A. Zeeb return 0;
8766c92544dSBjoern A. Zeeb }
8776c92544dSBjoern A. Zeeb EXPORT_SYMBOL_GPL(mt7615_mac_write_txwi);
8786c92544dSBjoern A. Zeeb
mt7615_mac_wtbl_update(struct mt7615_dev * dev,int idx,u32 mask)8796c92544dSBjoern A. Zeeb bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask)
8806c92544dSBjoern A. Zeeb {
8816c92544dSBjoern A. Zeeb mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX,
8826c92544dSBjoern A. Zeeb FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask);
8836c92544dSBjoern A. Zeeb
8846c92544dSBjoern A. Zeeb return mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY,
8856c92544dSBjoern A. Zeeb 0, 5000);
8866c92544dSBjoern A. Zeeb }
8876c92544dSBjoern A. Zeeb
mt7615_mac_sta_poll(struct mt7615_dev * dev)8886c92544dSBjoern A. Zeeb void mt7615_mac_sta_poll(struct mt7615_dev *dev)
8896c92544dSBjoern A. Zeeb {
8906c92544dSBjoern A. Zeeb static const u8 ac_to_tid[4] = {
8916c92544dSBjoern A. Zeeb [IEEE80211_AC_BE] = 0,
8926c92544dSBjoern A. Zeeb [IEEE80211_AC_BK] = 1,
8936c92544dSBjoern A. Zeeb [IEEE80211_AC_VI] = 4,
8946c92544dSBjoern A. Zeeb [IEEE80211_AC_VO] = 6
8956c92544dSBjoern A. Zeeb };
8966c92544dSBjoern A. Zeeb static const u8 hw_queue_map[] = {
8976c92544dSBjoern A. Zeeb [IEEE80211_AC_BK] = 0,
8986c92544dSBjoern A. Zeeb [IEEE80211_AC_BE] = 1,
8996c92544dSBjoern A. Zeeb [IEEE80211_AC_VI] = 2,
9006c92544dSBjoern A. Zeeb [IEEE80211_AC_VO] = 3,
9016c92544dSBjoern A. Zeeb };
9026c92544dSBjoern A. Zeeb struct ieee80211_sta *sta;
9036c92544dSBjoern A. Zeeb struct mt7615_sta *msta;
9046c92544dSBjoern A. Zeeb u32 addr, tx_time[4], rx_time[4];
9056c92544dSBjoern A. Zeeb struct list_head sta_poll_list;
9066c92544dSBjoern A. Zeeb int i;
9076c92544dSBjoern A. Zeeb
9086c92544dSBjoern A. Zeeb INIT_LIST_HEAD(&sta_poll_list);
909cbb3ec25SBjoern A. Zeeb spin_lock_bh(&dev->mt76.sta_poll_lock);
910cbb3ec25SBjoern A. Zeeb list_splice_init(&dev->mt76.sta_poll_list, &sta_poll_list);
911cbb3ec25SBjoern A. Zeeb spin_unlock_bh(&dev->mt76.sta_poll_lock);
9126c92544dSBjoern A. Zeeb
9136c92544dSBjoern A. Zeeb while (!list_empty(&sta_poll_list)) {
9146c92544dSBjoern A. Zeeb bool clear = false;
9156c92544dSBjoern A. Zeeb
9166c92544dSBjoern A. Zeeb msta = list_first_entry(&sta_poll_list, struct mt7615_sta,
917cbb3ec25SBjoern A. Zeeb wcid.poll_list);
918cbb3ec25SBjoern A. Zeeb
919cbb3ec25SBjoern A. Zeeb spin_lock_bh(&dev->mt76.sta_poll_lock);
920cbb3ec25SBjoern A. Zeeb list_del_init(&msta->wcid.poll_list);
921cbb3ec25SBjoern A. Zeeb spin_unlock_bh(&dev->mt76.sta_poll_lock);
9226c92544dSBjoern A. Zeeb
9236c92544dSBjoern A. Zeeb addr = mt7615_mac_wtbl_addr(dev, msta->wcid.idx) + 19 * 4;
9246c92544dSBjoern A. Zeeb
9256c92544dSBjoern A. Zeeb for (i = 0; i < 4; i++, addr += 8) {
9266c92544dSBjoern A. Zeeb u32 tx_last = msta->airtime_ac[i];
9276c92544dSBjoern A. Zeeb u32 rx_last = msta->airtime_ac[i + 4];
9286c92544dSBjoern A. Zeeb
9296c92544dSBjoern A. Zeeb msta->airtime_ac[i] = mt76_rr(dev, addr);
9306c92544dSBjoern A. Zeeb msta->airtime_ac[i + 4] = mt76_rr(dev, addr + 4);
9316c92544dSBjoern A. Zeeb tx_time[i] = msta->airtime_ac[i] - tx_last;
9326c92544dSBjoern A. Zeeb rx_time[i] = msta->airtime_ac[i + 4] - rx_last;
9336c92544dSBjoern A. Zeeb
9346c92544dSBjoern A. Zeeb if ((tx_last | rx_last) & BIT(30))
9356c92544dSBjoern A. Zeeb clear = true;
9366c92544dSBjoern A. Zeeb }
9376c92544dSBjoern A. Zeeb
9386c92544dSBjoern A. Zeeb if (clear) {
9396c92544dSBjoern A. Zeeb mt7615_mac_wtbl_update(dev, msta->wcid.idx,
9406c92544dSBjoern A. Zeeb MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
9416c92544dSBjoern A. Zeeb memset(msta->airtime_ac, 0, sizeof(msta->airtime_ac));
9426c92544dSBjoern A. Zeeb }
9436c92544dSBjoern A. Zeeb
9446c92544dSBjoern A. Zeeb if (!msta->wcid.sta)
9456c92544dSBjoern A. Zeeb continue;
9466c92544dSBjoern A. Zeeb
9476c92544dSBjoern A. Zeeb sta = container_of((void *)msta, struct ieee80211_sta,
9486c92544dSBjoern A. Zeeb drv_priv);
9496c92544dSBjoern A. Zeeb for (i = 0; i < 4; i++) {
9506c92544dSBjoern A. Zeeb u32 tx_cur = tx_time[i];
9516c92544dSBjoern A. Zeeb u32 rx_cur = rx_time[hw_queue_map[i]];
9526c92544dSBjoern A. Zeeb u8 tid = ac_to_tid[i];
9536c92544dSBjoern A. Zeeb
9546c92544dSBjoern A. Zeeb if (!tx_cur && !rx_cur)
9556c92544dSBjoern A. Zeeb continue;
9566c92544dSBjoern A. Zeeb
9576c92544dSBjoern A. Zeeb ieee80211_sta_register_airtime(sta, tid, tx_cur,
9586c92544dSBjoern A. Zeeb rx_cur);
9596c92544dSBjoern A. Zeeb }
9606c92544dSBjoern A. Zeeb }
9616c92544dSBjoern A. Zeeb }
9626c92544dSBjoern A. Zeeb EXPORT_SYMBOL_GPL(mt7615_mac_sta_poll);
9636c92544dSBjoern A. Zeeb
9646c92544dSBjoern A. Zeeb static void
mt7615_mac_update_rate_desc(struct mt7615_phy * phy,struct mt7615_sta * sta,struct ieee80211_tx_rate * probe_rate,struct ieee80211_tx_rate * rates,struct mt7615_rate_desc * rd)9656c92544dSBjoern A. Zeeb mt7615_mac_update_rate_desc(struct mt7615_phy *phy, struct mt7615_sta *sta,
9666c92544dSBjoern A. Zeeb struct ieee80211_tx_rate *probe_rate,
9676c92544dSBjoern A. Zeeb struct ieee80211_tx_rate *rates,
9686c92544dSBjoern A. Zeeb struct mt7615_rate_desc *rd)
9696c92544dSBjoern A. Zeeb {
9706c92544dSBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
9716c92544dSBjoern A. Zeeb struct mt76_phy *mphy = phy->mt76;
9726c92544dSBjoern A. Zeeb struct ieee80211_tx_rate *ref;
9736c92544dSBjoern A. Zeeb bool rateset, stbc = false;
9746c92544dSBjoern A. Zeeb int n_rates = sta->n_rates;
9756c92544dSBjoern A. Zeeb u8 bw, bw_prev;
9766c92544dSBjoern A. Zeeb int i, j;
9776c92544dSBjoern A. Zeeb
9786c92544dSBjoern A. Zeeb for (i = n_rates; i < 4; i++)
9796c92544dSBjoern A. Zeeb rates[i] = rates[n_rates - 1];
9806c92544dSBjoern A. Zeeb
9816c92544dSBjoern A. Zeeb rateset = !(sta->rate_set_tsf & BIT(0));
9826c92544dSBjoern A. Zeeb memcpy(sta->rateset[rateset].rates, rates,
9836c92544dSBjoern A. Zeeb sizeof(sta->rateset[rateset].rates));
9846c92544dSBjoern A. Zeeb if (probe_rate) {
9856c92544dSBjoern A. Zeeb sta->rateset[rateset].probe_rate = *probe_rate;
9866c92544dSBjoern A. Zeeb ref = &sta->rateset[rateset].probe_rate;
9876c92544dSBjoern A. Zeeb } else {
9886c92544dSBjoern A. Zeeb sta->rateset[rateset].probe_rate.idx = -1;
9896c92544dSBjoern A. Zeeb ref = &sta->rateset[rateset].rates[0];
9906c92544dSBjoern A. Zeeb }
9916c92544dSBjoern A. Zeeb
9926c92544dSBjoern A. Zeeb rates = sta->rateset[rateset].rates;
9936c92544dSBjoern A. Zeeb for (i = 0; i < ARRAY_SIZE(sta->rateset[rateset].rates); i++) {
9946c92544dSBjoern A. Zeeb /*
9956c92544dSBjoern A. Zeeb * We don't support switching between short and long GI
9966c92544dSBjoern A. Zeeb * within the rate set. For accurate tx status reporting, we
9976c92544dSBjoern A. Zeeb * need to make sure that flags match.
9986c92544dSBjoern A. Zeeb * For improved performance, avoid duplicate entries by
9996c92544dSBjoern A. Zeeb * decrementing the MCS index if necessary
10006c92544dSBjoern A. Zeeb */
10016c92544dSBjoern A. Zeeb if ((ref->flags ^ rates[i].flags) & IEEE80211_TX_RC_SHORT_GI)
10026c92544dSBjoern A. Zeeb rates[i].flags ^= IEEE80211_TX_RC_SHORT_GI;
10036c92544dSBjoern A. Zeeb
10046c92544dSBjoern A. Zeeb for (j = 0; j < i; j++) {
10056c92544dSBjoern A. Zeeb if (rates[i].idx != rates[j].idx)
10066c92544dSBjoern A. Zeeb continue;
10076c92544dSBjoern A. Zeeb if ((rates[i].flags ^ rates[j].flags) &
10086c92544dSBjoern A. Zeeb (IEEE80211_TX_RC_40_MHZ_WIDTH |
10096c92544dSBjoern A. Zeeb IEEE80211_TX_RC_80_MHZ_WIDTH |
10106c92544dSBjoern A. Zeeb IEEE80211_TX_RC_160_MHZ_WIDTH))
10116c92544dSBjoern A. Zeeb continue;
10126c92544dSBjoern A. Zeeb
10136c92544dSBjoern A. Zeeb if (!rates[i].idx)
10146c92544dSBjoern A. Zeeb continue;
10156c92544dSBjoern A. Zeeb
10166c92544dSBjoern A. Zeeb rates[i].idx--;
10176c92544dSBjoern A. Zeeb }
10186c92544dSBjoern A. Zeeb }
10196c92544dSBjoern A. Zeeb
10206c92544dSBjoern A. Zeeb rd->val[0] = mt7615_mac_tx_rate_val(dev, mphy, &rates[0], stbc, &bw);
10216c92544dSBjoern A. Zeeb bw_prev = bw;
10226c92544dSBjoern A. Zeeb
10236c92544dSBjoern A. Zeeb if (probe_rate) {
10246c92544dSBjoern A. Zeeb rd->probe_val = mt7615_mac_tx_rate_val(dev, mphy, probe_rate,
10256c92544dSBjoern A. Zeeb stbc, &bw);
10266c92544dSBjoern A. Zeeb if (bw)
10276c92544dSBjoern A. Zeeb rd->bw_idx = 1;
10286c92544dSBjoern A. Zeeb else
10296c92544dSBjoern A. Zeeb bw_prev = 0;
10306c92544dSBjoern A. Zeeb } else {
10316c92544dSBjoern A. Zeeb rd->probe_val = rd->val[0];
10326c92544dSBjoern A. Zeeb }
10336c92544dSBjoern A. Zeeb
10346c92544dSBjoern A. Zeeb rd->val[1] = mt7615_mac_tx_rate_val(dev, mphy, &rates[1], stbc, &bw);
10356c92544dSBjoern A. Zeeb if (bw_prev) {
10366c92544dSBjoern A. Zeeb rd->bw_idx = 3;
10376c92544dSBjoern A. Zeeb bw_prev = bw;
10386c92544dSBjoern A. Zeeb }
10396c92544dSBjoern A. Zeeb
10406c92544dSBjoern A. Zeeb rd->val[2] = mt7615_mac_tx_rate_val(dev, mphy, &rates[2], stbc, &bw);
10416c92544dSBjoern A. Zeeb if (bw_prev) {
10426c92544dSBjoern A. Zeeb rd->bw_idx = 5;
10436c92544dSBjoern A. Zeeb bw_prev = bw;
10446c92544dSBjoern A. Zeeb }
10456c92544dSBjoern A. Zeeb
10466c92544dSBjoern A. Zeeb rd->val[3] = mt7615_mac_tx_rate_val(dev, mphy, &rates[3], stbc, &bw);
10476c92544dSBjoern A. Zeeb if (bw_prev)
10486c92544dSBjoern A. Zeeb rd->bw_idx = 7;
10496c92544dSBjoern A. Zeeb
10506c92544dSBjoern A. Zeeb rd->rateset = rateset;
10516c92544dSBjoern A. Zeeb rd->bw = bw;
10526c92544dSBjoern A. Zeeb }
10536c92544dSBjoern A. Zeeb
10546c92544dSBjoern A. Zeeb static int
mt7615_mac_queue_rate_update(struct mt7615_phy * phy,struct mt7615_sta * sta,struct ieee80211_tx_rate * probe_rate,struct ieee80211_tx_rate * rates)10556c92544dSBjoern A. Zeeb mt7615_mac_queue_rate_update(struct mt7615_phy *phy, struct mt7615_sta *sta,
10566c92544dSBjoern A. Zeeb struct ieee80211_tx_rate *probe_rate,
10576c92544dSBjoern A. Zeeb struct ieee80211_tx_rate *rates)
10586c92544dSBjoern A. Zeeb {
10596c92544dSBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
10606c92544dSBjoern A. Zeeb struct mt7615_wtbl_rate_desc *wrd;
10616c92544dSBjoern A. Zeeb
10626c92544dSBjoern A. Zeeb if (work_pending(&dev->rate_work))
10636c92544dSBjoern A. Zeeb return -EBUSY;
10646c92544dSBjoern A. Zeeb
10656c92544dSBjoern A. Zeeb wrd = kzalloc(sizeof(*wrd), GFP_ATOMIC);
10666c92544dSBjoern A. Zeeb if (!wrd)
10676c92544dSBjoern A. Zeeb return -ENOMEM;
10686c92544dSBjoern A. Zeeb
10696c92544dSBjoern A. Zeeb wrd->sta = sta;
10706c92544dSBjoern A. Zeeb mt7615_mac_update_rate_desc(phy, sta, probe_rate, rates,
10716c92544dSBjoern A. Zeeb &wrd->rate);
10726c92544dSBjoern A. Zeeb list_add_tail(&wrd->node, &dev->wrd_head);
10736c92544dSBjoern A. Zeeb queue_work(dev->mt76.wq, &dev->rate_work);
10746c92544dSBjoern A. Zeeb
10756c92544dSBjoern A. Zeeb return 0;
10766c92544dSBjoern A. Zeeb }
10776c92544dSBjoern A. Zeeb
mt7615_mac_get_sta_tid_sn(struct mt7615_dev * dev,int wcid,u8 tid)10786c92544dSBjoern A. Zeeb u32 mt7615_mac_get_sta_tid_sn(struct mt7615_dev *dev, int wcid, u8 tid)
10796c92544dSBjoern A. Zeeb {
10806c92544dSBjoern A. Zeeb u32 addr, val, val2;
10816c92544dSBjoern A. Zeeb u8 offset;
10826c92544dSBjoern A. Zeeb
10836c92544dSBjoern A. Zeeb addr = mt7615_mac_wtbl_addr(dev, wcid) + 11 * 4;
10846c92544dSBjoern A. Zeeb
10856c92544dSBjoern A. Zeeb offset = tid * 12;
10866c92544dSBjoern A. Zeeb addr += 4 * (offset / 32);
10876c92544dSBjoern A. Zeeb offset %= 32;
10886c92544dSBjoern A. Zeeb
10896c92544dSBjoern A. Zeeb val = mt76_rr(dev, addr);
10906c92544dSBjoern A. Zeeb val >>= offset;
10916c92544dSBjoern A. Zeeb
10926c92544dSBjoern A. Zeeb if (offset > 20) {
10936c92544dSBjoern A. Zeeb addr += 4;
10946c92544dSBjoern A. Zeeb val2 = mt76_rr(dev, addr);
10956c92544dSBjoern A. Zeeb val |= val2 << (32 - offset);
10966c92544dSBjoern A. Zeeb }
10976c92544dSBjoern A. Zeeb
10986c92544dSBjoern A. Zeeb return val & GENMASK(11, 0);
10996c92544dSBjoern A. Zeeb }
11006c92544dSBjoern A. Zeeb
mt7615_mac_set_rates(struct mt7615_phy * phy,struct mt7615_sta * sta,struct ieee80211_tx_rate * probe_rate,struct ieee80211_tx_rate * rates)11016c92544dSBjoern A. Zeeb void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta,
11026c92544dSBjoern A. Zeeb struct ieee80211_tx_rate *probe_rate,
11036c92544dSBjoern A. Zeeb struct ieee80211_tx_rate *rates)
11046c92544dSBjoern A. Zeeb {
11056c92544dSBjoern A. Zeeb int wcid = sta->wcid.idx, n_rates = sta->n_rates;
11066c92544dSBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
11076c92544dSBjoern A. Zeeb struct mt7615_rate_desc rd;
11086c92544dSBjoern A. Zeeb u32 w5, w27, addr;
11096c92544dSBjoern A. Zeeb u16 idx = sta->vif->mt76.omac_idx;
11106c92544dSBjoern A. Zeeb
11116c92544dSBjoern A. Zeeb if (!mt76_is_mmio(&dev->mt76)) {
11126c92544dSBjoern A. Zeeb mt7615_mac_queue_rate_update(phy, sta, probe_rate, rates);
11136c92544dSBjoern A. Zeeb return;
11146c92544dSBjoern A. Zeeb }
11156c92544dSBjoern A. Zeeb
11166c92544dSBjoern A. Zeeb if (!mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000))
11176c92544dSBjoern A. Zeeb return;
11186c92544dSBjoern A. Zeeb
11196c92544dSBjoern A. Zeeb memset(&rd, 0, sizeof(struct mt7615_rate_desc));
11206c92544dSBjoern A. Zeeb mt7615_mac_update_rate_desc(phy, sta, probe_rate, rates, &rd);
11216c92544dSBjoern A. Zeeb
11226c92544dSBjoern A. Zeeb addr = mt7615_mac_wtbl_addr(dev, wcid);
11236c92544dSBjoern A. Zeeb w27 = mt76_rr(dev, addr + 27 * 4);
11246c92544dSBjoern A. Zeeb w27 &= ~MT_WTBL_W27_CC_BW_SEL;
11256c92544dSBjoern A. Zeeb w27 |= FIELD_PREP(MT_WTBL_W27_CC_BW_SEL, rd.bw);
11266c92544dSBjoern A. Zeeb
11276c92544dSBjoern A. Zeeb w5 = mt76_rr(dev, addr + 5 * 4);
11286c92544dSBjoern A. Zeeb w5 &= ~(MT_WTBL_W5_BW_CAP | MT_WTBL_W5_CHANGE_BW_RATE |
11296c92544dSBjoern A. Zeeb MT_WTBL_W5_MPDU_OK_COUNT |
11306c92544dSBjoern A. Zeeb MT_WTBL_W5_MPDU_FAIL_COUNT |
11316c92544dSBjoern A. Zeeb MT_WTBL_W5_RATE_IDX);
11326c92544dSBjoern A. Zeeb w5 |= FIELD_PREP(MT_WTBL_W5_BW_CAP, rd.bw) |
11336c92544dSBjoern A. Zeeb FIELD_PREP(MT_WTBL_W5_CHANGE_BW_RATE,
11346c92544dSBjoern A. Zeeb rd.bw_idx ? rd.bw_idx - 1 : 7);
11356c92544dSBjoern A. Zeeb
11366c92544dSBjoern A. Zeeb mt76_wr(dev, MT_WTBL_RIUCR0, w5);
11376c92544dSBjoern A. Zeeb
11386c92544dSBjoern A. Zeeb mt76_wr(dev, MT_WTBL_RIUCR1,
11396c92544dSBjoern A. Zeeb FIELD_PREP(MT_WTBL_RIUCR1_RATE0, rd.probe_val) |
11406c92544dSBjoern A. Zeeb FIELD_PREP(MT_WTBL_RIUCR1_RATE1, rd.val[0]) |
11416c92544dSBjoern A. Zeeb FIELD_PREP(MT_WTBL_RIUCR1_RATE2_LO, rd.val[1]));
11426c92544dSBjoern A. Zeeb
11436c92544dSBjoern A. Zeeb mt76_wr(dev, MT_WTBL_RIUCR2,
11446c92544dSBjoern A. Zeeb FIELD_PREP(MT_WTBL_RIUCR2_RATE2_HI, rd.val[1] >> 8) |
11456c92544dSBjoern A. Zeeb FIELD_PREP(MT_WTBL_RIUCR2_RATE3, rd.val[1]) |
11466c92544dSBjoern A. Zeeb FIELD_PREP(MT_WTBL_RIUCR2_RATE4, rd.val[2]) |
11476c92544dSBjoern A. Zeeb FIELD_PREP(MT_WTBL_RIUCR2_RATE5_LO, rd.val[2]));
11486c92544dSBjoern A. Zeeb
11496c92544dSBjoern A. Zeeb mt76_wr(dev, MT_WTBL_RIUCR3,
11506c92544dSBjoern A. Zeeb FIELD_PREP(MT_WTBL_RIUCR3_RATE5_HI, rd.val[2] >> 4) |
11516c92544dSBjoern A. Zeeb FIELD_PREP(MT_WTBL_RIUCR3_RATE6, rd.val[3]) |
11526c92544dSBjoern A. Zeeb FIELD_PREP(MT_WTBL_RIUCR3_RATE7, rd.val[3]));
11536c92544dSBjoern A. Zeeb
11546c92544dSBjoern A. Zeeb mt76_wr(dev, MT_WTBL_UPDATE,
11556c92544dSBjoern A. Zeeb FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, wcid) |
11566c92544dSBjoern A. Zeeb MT_WTBL_UPDATE_RATE_UPDATE |
11576c92544dSBjoern A. Zeeb MT_WTBL_UPDATE_TX_COUNT_CLEAR);
11586c92544dSBjoern A. Zeeb
11596c92544dSBjoern A. Zeeb mt76_wr(dev, addr + 27 * 4, w27);
11606c92544dSBjoern A. Zeeb
11616c92544dSBjoern A. Zeeb idx = idx > HW_BSSID_MAX ? HW_BSSID_0 : idx;
11626c92544dSBjoern A. Zeeb addr = idx > 1 ? MT_LPON_TCR2(idx): MT_LPON_TCR0(idx);
11636c92544dSBjoern A. Zeeb
11646c92544dSBjoern A. Zeeb mt76_rmw(dev, addr, MT_LPON_TCR_MODE, MT_LPON_TCR_READ); /* TSF read */
11656c92544dSBjoern A. Zeeb sta->rate_set_tsf = mt76_rr(dev, MT_LPON_UTTR0) & ~BIT(0);
11666c92544dSBjoern A. Zeeb sta->rate_set_tsf |= rd.rateset;
11676c92544dSBjoern A. Zeeb
11686c92544dSBjoern A. Zeeb if (!(sta->wcid.tx_info & MT_WCID_TX_INFO_SET))
11696c92544dSBjoern A. Zeeb mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000);
11706c92544dSBjoern A. Zeeb
11716c92544dSBjoern A. Zeeb sta->rate_count = 2 * MT7615_RATE_RETRY * n_rates;
11726c92544dSBjoern A. Zeeb sta->wcid.tx_info |= MT_WCID_TX_INFO_SET;
11736c92544dSBjoern A. Zeeb sta->rate_probe = !!probe_rate;
11746c92544dSBjoern A. Zeeb }
11756c92544dSBjoern A. Zeeb EXPORT_SYMBOL_GPL(mt7615_mac_set_rates);
11766c92544dSBjoern A. Zeeb
mt7615_mac_enable_rtscts(struct mt7615_dev * dev,struct ieee80211_vif * vif,bool enable)1177cbb3ec25SBjoern A. Zeeb void mt7615_mac_enable_rtscts(struct mt7615_dev *dev,
1178cbb3ec25SBjoern A. Zeeb struct ieee80211_vif *vif, bool enable)
1179cbb3ec25SBjoern A. Zeeb {
1180cbb3ec25SBjoern A. Zeeb struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
1181cbb3ec25SBjoern A. Zeeb u32 addr;
1182cbb3ec25SBjoern A. Zeeb
1183cbb3ec25SBjoern A. Zeeb addr = mt7615_mac_wtbl_addr(dev, mvif->sta.wcid.idx) + 3 * 4;
1184cbb3ec25SBjoern A. Zeeb
1185cbb3ec25SBjoern A. Zeeb if (enable)
1186cbb3ec25SBjoern A. Zeeb mt76_set(dev, addr, MT_WTBL_W3_RTS);
1187cbb3ec25SBjoern A. Zeeb else
1188cbb3ec25SBjoern A. Zeeb mt76_clear(dev, addr, MT_WTBL_W3_RTS);
1189cbb3ec25SBjoern A. Zeeb }
1190cbb3ec25SBjoern A. Zeeb EXPORT_SYMBOL_GPL(mt7615_mac_enable_rtscts);
1191cbb3ec25SBjoern A. Zeeb
11926c92544dSBjoern A. Zeeb static int
mt7615_mac_wtbl_update_key(struct mt7615_dev * dev,struct mt76_wcid * wcid,struct ieee80211_key_conf * key,enum mt76_cipher_type cipher,u16 cipher_mask)11936c92544dSBjoern A. Zeeb mt7615_mac_wtbl_update_key(struct mt7615_dev *dev, struct mt76_wcid *wcid,
11946c92544dSBjoern A. Zeeb struct ieee80211_key_conf *key,
1195cbb3ec25SBjoern A. Zeeb enum mt76_cipher_type cipher, u16 cipher_mask)
11966c92544dSBjoern A. Zeeb {
11976c92544dSBjoern A. Zeeb u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx) + 30 * 4;
11986c92544dSBjoern A. Zeeb u8 data[32] = {};
11996c92544dSBjoern A. Zeeb
12006c92544dSBjoern A. Zeeb if (key->keylen > sizeof(data))
12016c92544dSBjoern A. Zeeb return -EINVAL;
12026c92544dSBjoern A. Zeeb
12036c92544dSBjoern A. Zeeb mt76_rr_copy(dev, addr, data, sizeof(data));
12046c92544dSBjoern A. Zeeb if (cipher == MT_CIPHER_TKIP) {
12056c92544dSBjoern A. Zeeb /* Rx/Tx MIC keys are swapped */
12066c92544dSBjoern A. Zeeb memcpy(data, key->key, 16);
12076c92544dSBjoern A. Zeeb memcpy(data + 16, key->key + 24, 8);
12086c92544dSBjoern A. Zeeb memcpy(data + 24, key->key + 16, 8);
12096c92544dSBjoern A. Zeeb } else {
12106c92544dSBjoern A. Zeeb if (cipher_mask == BIT(cipher))
12116c92544dSBjoern A. Zeeb memcpy(data, key->key, key->keylen);
12126c92544dSBjoern A. Zeeb else if (cipher != MT_CIPHER_BIP_CMAC_128)
12136c92544dSBjoern A. Zeeb memcpy(data, key->key, 16);
12146c92544dSBjoern A. Zeeb if (cipher == MT_CIPHER_BIP_CMAC_128)
12156c92544dSBjoern A. Zeeb memcpy(data + 16, key->key, 16);
12166c92544dSBjoern A. Zeeb }
12176c92544dSBjoern A. Zeeb
12186c92544dSBjoern A. Zeeb mt76_wr_copy(dev, addr, data, sizeof(data));
12196c92544dSBjoern A. Zeeb
12206c92544dSBjoern A. Zeeb return 0;
12216c92544dSBjoern A. Zeeb }
12226c92544dSBjoern A. Zeeb
12236c92544dSBjoern A. Zeeb static int
mt7615_mac_wtbl_update_pk(struct mt7615_dev * dev,struct mt76_wcid * wcid,enum mt76_cipher_type cipher,u16 cipher_mask,int keyidx)12246c92544dSBjoern A. Zeeb mt7615_mac_wtbl_update_pk(struct mt7615_dev *dev, struct mt76_wcid *wcid,
12256c92544dSBjoern A. Zeeb enum mt76_cipher_type cipher, u16 cipher_mask,
1226cbb3ec25SBjoern A. Zeeb int keyidx)
12276c92544dSBjoern A. Zeeb {
12286c92544dSBjoern A. Zeeb u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx), w0, w1;
12296c92544dSBjoern A. Zeeb
12306c92544dSBjoern A. Zeeb if (!mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000))
12316c92544dSBjoern A. Zeeb return -ETIMEDOUT;
12326c92544dSBjoern A. Zeeb
12336c92544dSBjoern A. Zeeb w0 = mt76_rr(dev, addr);
12346c92544dSBjoern A. Zeeb w1 = mt76_rr(dev, addr + 4);
12356c92544dSBjoern A. Zeeb
12366c92544dSBjoern A. Zeeb if (cipher_mask)
12376c92544dSBjoern A. Zeeb w0 |= MT_WTBL_W0_RX_KEY_VALID;
12386c92544dSBjoern A. Zeeb else
12396c92544dSBjoern A. Zeeb w0 &= ~(MT_WTBL_W0_RX_KEY_VALID | MT_WTBL_W0_KEY_IDX);
12406c92544dSBjoern A. Zeeb if (cipher_mask & BIT(MT_CIPHER_BIP_CMAC_128))
12416c92544dSBjoern A. Zeeb w0 |= MT_WTBL_W0_RX_IK_VALID;
12426c92544dSBjoern A. Zeeb else
12436c92544dSBjoern A. Zeeb w0 &= ~MT_WTBL_W0_RX_IK_VALID;
12446c92544dSBjoern A. Zeeb
1245cbb3ec25SBjoern A. Zeeb if (cipher != MT_CIPHER_BIP_CMAC_128 || cipher_mask == BIT(cipher)) {
12466c92544dSBjoern A. Zeeb w0 &= ~MT_WTBL_W0_KEY_IDX;
12476c92544dSBjoern A. Zeeb w0 |= FIELD_PREP(MT_WTBL_W0_KEY_IDX, keyidx);
12486c92544dSBjoern A. Zeeb }
12496c92544dSBjoern A. Zeeb
12506c92544dSBjoern A. Zeeb mt76_wr(dev, MT_WTBL_RICR0, w0);
12516c92544dSBjoern A. Zeeb mt76_wr(dev, MT_WTBL_RICR1, w1);
12526c92544dSBjoern A. Zeeb
12536c92544dSBjoern A. Zeeb if (!mt7615_mac_wtbl_update(dev, wcid->idx,
12546c92544dSBjoern A. Zeeb MT_WTBL_UPDATE_RXINFO_UPDATE))
12556c92544dSBjoern A. Zeeb return -ETIMEDOUT;
12566c92544dSBjoern A. Zeeb
12576c92544dSBjoern A. Zeeb return 0;
12586c92544dSBjoern A. Zeeb }
12596c92544dSBjoern A. Zeeb
12606c92544dSBjoern A. Zeeb static void
mt7615_mac_wtbl_update_cipher(struct mt7615_dev * dev,struct mt76_wcid * wcid,enum mt76_cipher_type cipher,u16 cipher_mask)12616c92544dSBjoern A. Zeeb mt7615_mac_wtbl_update_cipher(struct mt7615_dev *dev, struct mt76_wcid *wcid,
1262cbb3ec25SBjoern A. Zeeb enum mt76_cipher_type cipher, u16 cipher_mask)
12636c92544dSBjoern A. Zeeb {
12646c92544dSBjoern A. Zeeb u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx);
12656c92544dSBjoern A. Zeeb
12666c92544dSBjoern A. Zeeb if (cipher == MT_CIPHER_BIP_CMAC_128 &&
12676c92544dSBjoern A. Zeeb cipher_mask & ~BIT(MT_CIPHER_BIP_CMAC_128))
12686c92544dSBjoern A. Zeeb return;
12696c92544dSBjoern A. Zeeb
12706c92544dSBjoern A. Zeeb mt76_rmw(dev, addr + 2 * 4, MT_WTBL_W2_KEY_TYPE,
12716c92544dSBjoern A. Zeeb FIELD_PREP(MT_WTBL_W2_KEY_TYPE, cipher));
12726c92544dSBjoern A. Zeeb }
12736c92544dSBjoern A. Zeeb
__mt7615_mac_wtbl_set_key(struct mt7615_dev * dev,struct mt76_wcid * wcid,struct ieee80211_key_conf * key)12746c92544dSBjoern A. Zeeb int __mt7615_mac_wtbl_set_key(struct mt7615_dev *dev,
12756c92544dSBjoern A. Zeeb struct mt76_wcid *wcid,
1276cbb3ec25SBjoern A. Zeeb struct ieee80211_key_conf *key)
12776c92544dSBjoern A. Zeeb {
12786c92544dSBjoern A. Zeeb enum mt76_cipher_type cipher;
12796c92544dSBjoern A. Zeeb u16 cipher_mask = wcid->cipher;
12806c92544dSBjoern A. Zeeb int err;
12816c92544dSBjoern A. Zeeb
12826c92544dSBjoern A. Zeeb cipher = mt7615_mac_get_cipher(key->cipher);
12836c92544dSBjoern A. Zeeb if (cipher == MT_CIPHER_NONE)
12846c92544dSBjoern A. Zeeb return -EOPNOTSUPP;
12856c92544dSBjoern A. Zeeb
12866c92544dSBjoern A. Zeeb cipher_mask |= BIT(cipher);
1287cbb3ec25SBjoern A. Zeeb mt7615_mac_wtbl_update_cipher(dev, wcid, cipher, cipher_mask);
1288cbb3ec25SBjoern A. Zeeb err = mt7615_mac_wtbl_update_key(dev, wcid, key, cipher, cipher_mask);
12896c92544dSBjoern A. Zeeb if (err < 0)
12906c92544dSBjoern A. Zeeb return err;
12916c92544dSBjoern A. Zeeb
12926c92544dSBjoern A. Zeeb err = mt7615_mac_wtbl_update_pk(dev, wcid, cipher, cipher_mask,
1293cbb3ec25SBjoern A. Zeeb key->keyidx);
12946c92544dSBjoern A. Zeeb if (err < 0)
12956c92544dSBjoern A. Zeeb return err;
12966c92544dSBjoern A. Zeeb
12976c92544dSBjoern A. Zeeb wcid->cipher = cipher_mask;
12986c92544dSBjoern A. Zeeb
12996c92544dSBjoern A. Zeeb return 0;
13006c92544dSBjoern A. Zeeb }
13016c92544dSBjoern A. Zeeb
mt7615_mac_wtbl_set_key(struct mt7615_dev * dev,struct mt76_wcid * wcid,struct ieee80211_key_conf * key)13026c92544dSBjoern A. Zeeb int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev,
13036c92544dSBjoern A. Zeeb struct mt76_wcid *wcid,
1304cbb3ec25SBjoern A. Zeeb struct ieee80211_key_conf *key)
13056c92544dSBjoern A. Zeeb {
13066c92544dSBjoern A. Zeeb int err;
13076c92544dSBjoern A. Zeeb
13086c92544dSBjoern A. Zeeb spin_lock_bh(&dev->mt76.lock);
1309cbb3ec25SBjoern A. Zeeb err = __mt7615_mac_wtbl_set_key(dev, wcid, key);
13106c92544dSBjoern A. Zeeb spin_unlock_bh(&dev->mt76.lock);
13116c92544dSBjoern A. Zeeb
13126c92544dSBjoern A. Zeeb return err;
13136c92544dSBjoern A. Zeeb }
13146c92544dSBjoern A. Zeeb
mt7615_fill_txs(struct mt7615_dev * dev,struct mt7615_sta * sta,struct ieee80211_tx_info * info,__le32 * txs_data)13156c92544dSBjoern A. Zeeb static bool mt7615_fill_txs(struct mt7615_dev *dev, struct mt7615_sta *sta,
13166c92544dSBjoern A. Zeeb struct ieee80211_tx_info *info, __le32 *txs_data)
13176c92544dSBjoern A. Zeeb {
13186c92544dSBjoern A. Zeeb struct ieee80211_supported_band *sband;
13196c92544dSBjoern A. Zeeb struct mt7615_rate_set *rs;
13206c92544dSBjoern A. Zeeb struct mt76_phy *mphy;
13216c92544dSBjoern A. Zeeb int first_idx = 0, last_idx;
13226c92544dSBjoern A. Zeeb int i, idx, count;
13236c92544dSBjoern A. Zeeb bool fixed_rate, ack_timeout;
13246c92544dSBjoern A. Zeeb bool ampdu, cck = false;
13256c92544dSBjoern A. Zeeb bool rs_idx;
13266c92544dSBjoern A. Zeeb u32 rate_set_tsf;
13276c92544dSBjoern A. Zeeb u32 final_rate, final_rate_flags, final_nss, txs;
13286c92544dSBjoern A. Zeeb
13296c92544dSBjoern A. Zeeb txs = le32_to_cpu(txs_data[1]);
13306c92544dSBjoern A. Zeeb ampdu = txs & MT_TXS1_AMPDU;
13316c92544dSBjoern A. Zeeb
13326c92544dSBjoern A. Zeeb txs = le32_to_cpu(txs_data[3]);
13336c92544dSBjoern A. Zeeb count = FIELD_GET(MT_TXS3_TX_COUNT, txs);
13346c92544dSBjoern A. Zeeb last_idx = FIELD_GET(MT_TXS3_LAST_TX_RATE, txs);
13356c92544dSBjoern A. Zeeb
13366c92544dSBjoern A. Zeeb txs = le32_to_cpu(txs_data[0]);
13376c92544dSBjoern A. Zeeb fixed_rate = txs & MT_TXS0_FIXED_RATE;
13386c92544dSBjoern A. Zeeb final_rate = FIELD_GET(MT_TXS0_TX_RATE, txs);
13396c92544dSBjoern A. Zeeb ack_timeout = txs & MT_TXS0_ACK_TIMEOUT;
13406c92544dSBjoern A. Zeeb
13416c92544dSBjoern A. Zeeb if (!ampdu && (txs & MT_TXS0_RTS_TIMEOUT))
13426c92544dSBjoern A. Zeeb return false;
13436c92544dSBjoern A. Zeeb
13446c92544dSBjoern A. Zeeb if (txs & MT_TXS0_QUEUE_TIMEOUT)
13456c92544dSBjoern A. Zeeb return false;
13466c92544dSBjoern A. Zeeb
13476c92544dSBjoern A. Zeeb if (!ack_timeout)
13486c92544dSBjoern A. Zeeb info->flags |= IEEE80211_TX_STAT_ACK;
13496c92544dSBjoern A. Zeeb
13506c92544dSBjoern A. Zeeb info->status.ampdu_len = 1;
13516c92544dSBjoern A. Zeeb info->status.ampdu_ack_len = !!(info->flags &
13526c92544dSBjoern A. Zeeb IEEE80211_TX_STAT_ACK);
13536c92544dSBjoern A. Zeeb
13546c92544dSBjoern A. Zeeb if (ampdu || (info->flags & IEEE80211_TX_CTL_AMPDU))
13556c92544dSBjoern A. Zeeb info->flags |= IEEE80211_TX_STAT_AMPDU | IEEE80211_TX_CTL_AMPDU;
13566c92544dSBjoern A. Zeeb
13576c92544dSBjoern A. Zeeb first_idx = max_t(int, 0, last_idx - (count - 1) / MT7615_RATE_RETRY);
13586c92544dSBjoern A. Zeeb
13596c92544dSBjoern A. Zeeb if (fixed_rate) {
13606c92544dSBjoern A. Zeeb info->status.rates[0].count = count;
13616c92544dSBjoern A. Zeeb i = 0;
13626c92544dSBjoern A. Zeeb goto out;
13636c92544dSBjoern A. Zeeb }
13646c92544dSBjoern A. Zeeb
13656c92544dSBjoern A. Zeeb rate_set_tsf = READ_ONCE(sta->rate_set_tsf);
13666c92544dSBjoern A. Zeeb rs_idx = !((u32)(le32_get_bits(txs_data[4], MT_TXS4_F0_TIMESTAMP) -
13676c92544dSBjoern A. Zeeb rate_set_tsf) < 1000000);
13686c92544dSBjoern A. Zeeb rs_idx ^= rate_set_tsf & BIT(0);
13696c92544dSBjoern A. Zeeb rs = &sta->rateset[rs_idx];
13706c92544dSBjoern A. Zeeb
13716c92544dSBjoern A. Zeeb if (!first_idx && rs->probe_rate.idx >= 0) {
13726c92544dSBjoern A. Zeeb info->status.rates[0] = rs->probe_rate;
13736c92544dSBjoern A. Zeeb
13746c92544dSBjoern A. Zeeb spin_lock_bh(&dev->mt76.lock);
13756c92544dSBjoern A. Zeeb if (sta->rate_probe) {
13766c92544dSBjoern A. Zeeb struct mt7615_phy *phy = &dev->phy;
13776c92544dSBjoern A. Zeeb
13786c92544dSBjoern A. Zeeb if (sta->wcid.phy_idx && dev->mt76.phys[MT_BAND1])
13796c92544dSBjoern A. Zeeb phy = dev->mt76.phys[MT_BAND1]->priv;
13806c92544dSBjoern A. Zeeb
13816c92544dSBjoern A. Zeeb mt7615_mac_set_rates(phy, sta, NULL, sta->rates);
13826c92544dSBjoern A. Zeeb }
13836c92544dSBjoern A. Zeeb spin_unlock_bh(&dev->mt76.lock);
13846c92544dSBjoern A. Zeeb } else {
13856c92544dSBjoern A. Zeeb info->status.rates[0] = rs->rates[first_idx / 2];
13866c92544dSBjoern A. Zeeb }
13876c92544dSBjoern A. Zeeb info->status.rates[0].count = 0;
13886c92544dSBjoern A. Zeeb
13896c92544dSBjoern A. Zeeb for (i = 0, idx = first_idx; count && idx <= last_idx; idx++) {
13906c92544dSBjoern A. Zeeb struct ieee80211_tx_rate *cur_rate;
13916c92544dSBjoern A. Zeeb int cur_count;
13926c92544dSBjoern A. Zeeb
13936c92544dSBjoern A. Zeeb cur_rate = &rs->rates[idx / 2];
13946c92544dSBjoern A. Zeeb cur_count = min_t(int, MT7615_RATE_RETRY, count);
13956c92544dSBjoern A. Zeeb count -= cur_count;
13966c92544dSBjoern A. Zeeb
13976c92544dSBjoern A. Zeeb if (idx && (cur_rate->idx != info->status.rates[i].idx ||
13986c92544dSBjoern A. Zeeb cur_rate->flags != info->status.rates[i].flags)) {
13996c92544dSBjoern A. Zeeb i++;
14006c92544dSBjoern A. Zeeb if (i == ARRAY_SIZE(info->status.rates)) {
14016c92544dSBjoern A. Zeeb i--;
14026c92544dSBjoern A. Zeeb break;
14036c92544dSBjoern A. Zeeb }
14046c92544dSBjoern A. Zeeb
14056c92544dSBjoern A. Zeeb info->status.rates[i] = *cur_rate;
14066c92544dSBjoern A. Zeeb info->status.rates[i].count = 0;
14076c92544dSBjoern A. Zeeb }
14086c92544dSBjoern A. Zeeb
14096c92544dSBjoern A. Zeeb info->status.rates[i].count += cur_count;
14106c92544dSBjoern A. Zeeb }
14116c92544dSBjoern A. Zeeb
14126c92544dSBjoern A. Zeeb out:
14136c92544dSBjoern A. Zeeb final_rate_flags = info->status.rates[i].flags;
14146c92544dSBjoern A. Zeeb
14156c92544dSBjoern A. Zeeb switch (FIELD_GET(MT_TX_RATE_MODE, final_rate)) {
14166c92544dSBjoern A. Zeeb case MT_PHY_TYPE_CCK:
14176c92544dSBjoern A. Zeeb cck = true;
14186c92544dSBjoern A. Zeeb fallthrough;
14196c92544dSBjoern A. Zeeb case MT_PHY_TYPE_OFDM:
14206c92544dSBjoern A. Zeeb mphy = &dev->mphy;
14216c92544dSBjoern A. Zeeb if (sta->wcid.phy_idx && dev->mt76.phys[MT_BAND1])
14226c92544dSBjoern A. Zeeb mphy = dev->mt76.phys[MT_BAND1];
14236c92544dSBjoern A. Zeeb
14246c92544dSBjoern A. Zeeb if (mphy->chandef.chan->band == NL80211_BAND_5GHZ)
14256c92544dSBjoern A. Zeeb sband = &mphy->sband_5g.sband;
14266c92544dSBjoern A. Zeeb else
14276c92544dSBjoern A. Zeeb sband = &mphy->sband_2g.sband;
14286c92544dSBjoern A. Zeeb final_rate &= MT_TX_RATE_IDX;
14296c92544dSBjoern A. Zeeb final_rate = mt76_get_rate(&dev->mt76, sband, final_rate,
14306c92544dSBjoern A. Zeeb cck);
14316c92544dSBjoern A. Zeeb final_rate_flags = 0;
14326c92544dSBjoern A. Zeeb break;
14336c92544dSBjoern A. Zeeb case MT_PHY_TYPE_HT_GF:
14346c92544dSBjoern A. Zeeb case MT_PHY_TYPE_HT:
14356c92544dSBjoern A. Zeeb final_rate_flags |= IEEE80211_TX_RC_MCS;
14366c92544dSBjoern A. Zeeb final_rate &= MT_TX_RATE_IDX;
14376c92544dSBjoern A. Zeeb if (final_rate > 31)
14386c92544dSBjoern A. Zeeb return false;
14396c92544dSBjoern A. Zeeb break;
14406c92544dSBjoern A. Zeeb case MT_PHY_TYPE_VHT:
14416c92544dSBjoern A. Zeeb final_nss = FIELD_GET(MT_TX_RATE_NSS, final_rate);
14426c92544dSBjoern A. Zeeb
14436c92544dSBjoern A. Zeeb if ((final_rate & MT_TX_RATE_STBC) && final_nss)
14446c92544dSBjoern A. Zeeb final_nss--;
14456c92544dSBjoern A. Zeeb
14466c92544dSBjoern A. Zeeb final_rate_flags |= IEEE80211_TX_RC_VHT_MCS;
14476c92544dSBjoern A. Zeeb final_rate = (final_rate & MT_TX_RATE_IDX) | (final_nss << 4);
14486c92544dSBjoern A. Zeeb break;
14496c92544dSBjoern A. Zeeb default:
14506c92544dSBjoern A. Zeeb return false;
14516c92544dSBjoern A. Zeeb }
14526c92544dSBjoern A. Zeeb
14536c92544dSBjoern A. Zeeb info->status.rates[i].idx = final_rate;
14546c92544dSBjoern A. Zeeb info->status.rates[i].flags = final_rate_flags;
14556c92544dSBjoern A. Zeeb
14566c92544dSBjoern A. Zeeb return true;
14576c92544dSBjoern A. Zeeb }
14586c92544dSBjoern A. Zeeb
mt7615_mac_add_txs_skb(struct mt7615_dev * dev,struct mt7615_sta * sta,int pid,__le32 * txs_data)14596c92544dSBjoern A. Zeeb static bool mt7615_mac_add_txs_skb(struct mt7615_dev *dev,
14606c92544dSBjoern A. Zeeb struct mt7615_sta *sta, int pid,
14616c92544dSBjoern A. Zeeb __le32 *txs_data)
14626c92544dSBjoern A. Zeeb {
14636c92544dSBjoern A. Zeeb struct mt76_dev *mdev = &dev->mt76;
14646c92544dSBjoern A. Zeeb struct sk_buff_head list;
14656c92544dSBjoern A. Zeeb struct sk_buff *skb;
14666c92544dSBjoern A. Zeeb
14676c92544dSBjoern A. Zeeb if (pid < MT_PACKET_ID_FIRST)
14686c92544dSBjoern A. Zeeb return false;
14696c92544dSBjoern A. Zeeb
14706c92544dSBjoern A. Zeeb trace_mac_txdone(mdev, sta->wcid.idx, pid);
14716c92544dSBjoern A. Zeeb
14726c92544dSBjoern A. Zeeb mt76_tx_status_lock(mdev, &list);
14736c92544dSBjoern A. Zeeb skb = mt76_tx_status_skb_get(mdev, &sta->wcid, pid, &list);
14746c92544dSBjoern A. Zeeb if (skb) {
14756c92544dSBjoern A. Zeeb struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
14766c92544dSBjoern A. Zeeb
14776c92544dSBjoern A. Zeeb if (!mt7615_fill_txs(dev, sta, info, txs_data)) {
14786c92544dSBjoern A. Zeeb info->status.rates[0].count = 0;
14796c92544dSBjoern A. Zeeb info->status.rates[0].idx = -1;
14806c92544dSBjoern A. Zeeb }
14816c92544dSBjoern A. Zeeb
14826c92544dSBjoern A. Zeeb mt76_tx_status_skb_done(mdev, skb, &list);
14836c92544dSBjoern A. Zeeb }
14846c92544dSBjoern A. Zeeb mt76_tx_status_unlock(mdev, &list);
14856c92544dSBjoern A. Zeeb
14866c92544dSBjoern A. Zeeb return !!skb;
14876c92544dSBjoern A. Zeeb }
14886c92544dSBjoern A. Zeeb
mt7615_mac_add_txs(struct mt7615_dev * dev,void * data)14896c92544dSBjoern A. Zeeb static void mt7615_mac_add_txs(struct mt7615_dev *dev, void *data)
14906c92544dSBjoern A. Zeeb {
14916c92544dSBjoern A. Zeeb struct ieee80211_tx_info info = {};
14926c92544dSBjoern A. Zeeb struct ieee80211_sta *sta = NULL;
14936c92544dSBjoern A. Zeeb struct mt7615_sta *msta = NULL;
14946c92544dSBjoern A. Zeeb struct mt76_wcid *wcid;
14956c92544dSBjoern A. Zeeb struct mt76_phy *mphy = &dev->mt76.phy;
14966c92544dSBjoern A. Zeeb __le32 *txs_data = data;
14976c92544dSBjoern A. Zeeb u8 wcidx;
14986c92544dSBjoern A. Zeeb u8 pid;
14996c92544dSBjoern A. Zeeb
15006c92544dSBjoern A. Zeeb pid = le32_get_bits(txs_data[0], MT_TXS0_PID);
15016c92544dSBjoern A. Zeeb wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID);
15026c92544dSBjoern A. Zeeb
15036c92544dSBjoern A. Zeeb if (pid == MT_PACKET_ID_NO_ACK)
15046c92544dSBjoern A. Zeeb return;
15056c92544dSBjoern A. Zeeb
15066c92544dSBjoern A. Zeeb if (wcidx >= MT7615_WTBL_SIZE)
15076c92544dSBjoern A. Zeeb return;
15086c92544dSBjoern A. Zeeb
15096c92544dSBjoern A. Zeeb rcu_read_lock();
15106c92544dSBjoern A. Zeeb
15116c92544dSBjoern A. Zeeb wcid = rcu_dereference(dev->mt76.wcid[wcidx]);
15126c92544dSBjoern A. Zeeb if (!wcid)
15136c92544dSBjoern A. Zeeb goto out;
15146c92544dSBjoern A. Zeeb
15156c92544dSBjoern A. Zeeb msta = container_of(wcid, struct mt7615_sta, wcid);
15166c92544dSBjoern A. Zeeb sta = wcid_to_sta(wcid);
15176c92544dSBjoern A. Zeeb
1518cbb3ec25SBjoern A. Zeeb spin_lock_bh(&dev->mt76.sta_poll_lock);
1519cbb3ec25SBjoern A. Zeeb if (list_empty(&msta->wcid.poll_list))
1520cbb3ec25SBjoern A. Zeeb list_add_tail(&msta->wcid.poll_list, &dev->mt76.sta_poll_list);
1521cbb3ec25SBjoern A. Zeeb spin_unlock_bh(&dev->mt76.sta_poll_lock);
15226c92544dSBjoern A. Zeeb
15236c92544dSBjoern A. Zeeb if (mt7615_mac_add_txs_skb(dev, msta, pid, txs_data))
15246c92544dSBjoern A. Zeeb goto out;
15256c92544dSBjoern A. Zeeb
15266c92544dSBjoern A. Zeeb if (wcidx >= MT7615_WTBL_STA || !sta)
15276c92544dSBjoern A. Zeeb goto out;
15286c92544dSBjoern A. Zeeb
15296c92544dSBjoern A. Zeeb if (wcid->phy_idx && dev->mt76.phys[MT_BAND1])
15306c92544dSBjoern A. Zeeb mphy = dev->mt76.phys[MT_BAND1];
15316c92544dSBjoern A. Zeeb
1532cbb3ec25SBjoern A. Zeeb if (mt7615_fill_txs(dev, msta, &info, txs_data)) {
1533cbb3ec25SBjoern A. Zeeb spin_lock_bh(&dev->mt76.rx_lock);
15346c92544dSBjoern A. Zeeb ieee80211_tx_status_noskb(mphy->hw, sta, &info);
1535cbb3ec25SBjoern A. Zeeb spin_unlock_bh(&dev->mt76.rx_lock);
1536cbb3ec25SBjoern A. Zeeb }
15376c92544dSBjoern A. Zeeb
15386c92544dSBjoern A. Zeeb out:
15396c92544dSBjoern A. Zeeb rcu_read_unlock();
15406c92544dSBjoern A. Zeeb }
15416c92544dSBjoern A. Zeeb
15426c92544dSBjoern A. Zeeb static void
mt7615_txwi_free(struct mt7615_dev * dev,struct mt76_txwi_cache * txwi)15436c92544dSBjoern A. Zeeb mt7615_txwi_free(struct mt7615_dev *dev, struct mt76_txwi_cache *txwi)
15446c92544dSBjoern A. Zeeb {
15456c92544dSBjoern A. Zeeb struct mt76_dev *mdev = &dev->mt76;
15466c92544dSBjoern A. Zeeb __le32 *txwi_data;
15476c92544dSBjoern A. Zeeb u32 val;
15486c92544dSBjoern A. Zeeb u8 wcid;
15496c92544dSBjoern A. Zeeb
15506c92544dSBjoern A. Zeeb mt76_connac_txp_skb_unmap(mdev, txwi);
15516c92544dSBjoern A. Zeeb if (!txwi->skb)
15526c92544dSBjoern A. Zeeb goto out;
15536c92544dSBjoern A. Zeeb
15546c92544dSBjoern A. Zeeb txwi_data = (__le32 *)mt76_get_txwi_ptr(mdev, txwi);
15556c92544dSBjoern A. Zeeb val = le32_to_cpu(txwi_data[1]);
15566c92544dSBjoern A. Zeeb wcid = FIELD_GET(MT_TXD1_WLAN_IDX, val);
15576c92544dSBjoern A. Zeeb mt76_tx_complete_skb(mdev, wcid, txwi->skb);
15586c92544dSBjoern A. Zeeb
15596c92544dSBjoern A. Zeeb out:
15606c92544dSBjoern A. Zeeb txwi->skb = NULL;
15616c92544dSBjoern A. Zeeb mt76_put_txwi(mdev, txwi);
15626c92544dSBjoern A. Zeeb }
15636c92544dSBjoern A. Zeeb
15646c92544dSBjoern A. Zeeb static void
mt7615_mac_tx_free_token(struct mt7615_dev * dev,u16 token)15656c92544dSBjoern A. Zeeb mt7615_mac_tx_free_token(struct mt7615_dev *dev, u16 token)
15666c92544dSBjoern A. Zeeb {
15676c92544dSBjoern A. Zeeb struct mt76_dev *mdev = &dev->mt76;
15686c92544dSBjoern A. Zeeb struct mt76_txwi_cache *txwi;
15696c92544dSBjoern A. Zeeb
15706c92544dSBjoern A. Zeeb trace_mac_tx_free(dev, token);
15716c92544dSBjoern A. Zeeb txwi = mt76_token_put(mdev, token);
15726c92544dSBjoern A. Zeeb if (!txwi)
15736c92544dSBjoern A. Zeeb return;
15746c92544dSBjoern A. Zeeb
15756c92544dSBjoern A. Zeeb mt7615_txwi_free(dev, txwi);
15766c92544dSBjoern A. Zeeb }
15776c92544dSBjoern A. Zeeb
mt7615_mac_tx_free(struct mt7615_dev * dev,void * data,int len)15786c92544dSBjoern A. Zeeb static void mt7615_mac_tx_free(struct mt7615_dev *dev, void *data, int len)
15796c92544dSBjoern A. Zeeb {
15806c92544dSBjoern A. Zeeb struct mt76_connac_tx_free *free = data;
15816c92544dSBjoern A. Zeeb void *tx_token = data + sizeof(*free);
15826c92544dSBjoern A. Zeeb void *end = data + len;
15836c92544dSBjoern A. Zeeb u8 i, count;
15846c92544dSBjoern A. Zeeb
15856c92544dSBjoern A. Zeeb mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false);
15866c92544dSBjoern A. Zeeb if (is_mt7615(&dev->mt76)) {
15876c92544dSBjoern A. Zeeb mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_BE], false);
15886c92544dSBjoern A. Zeeb } else {
15896c92544dSBjoern A. Zeeb for (i = 0; i < IEEE80211_NUM_ACS; i++)
15906c92544dSBjoern A. Zeeb mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], false);
15916c92544dSBjoern A. Zeeb }
15926c92544dSBjoern A. Zeeb
15936c92544dSBjoern A. Zeeb count = le16_get_bits(free->ctrl, MT_TX_FREE_MSDU_ID_CNT);
15946c92544dSBjoern A. Zeeb if (is_mt7615(&dev->mt76)) {
15956c92544dSBjoern A. Zeeb __le16 *token = tx_token;
15966c92544dSBjoern A. Zeeb
15976c92544dSBjoern A. Zeeb if (WARN_ON_ONCE((void *)&token[count] > end))
15986c92544dSBjoern A. Zeeb return;
15996c92544dSBjoern A. Zeeb
16006c92544dSBjoern A. Zeeb for (i = 0; i < count; i++)
16016c92544dSBjoern A. Zeeb mt7615_mac_tx_free_token(dev, le16_to_cpu(token[i]));
16026c92544dSBjoern A. Zeeb } else {
16036c92544dSBjoern A. Zeeb __le32 *token = tx_token;
16046c92544dSBjoern A. Zeeb
16056c92544dSBjoern A. Zeeb if (WARN_ON_ONCE((void *)&token[count] > end))
16066c92544dSBjoern A. Zeeb return;
16076c92544dSBjoern A. Zeeb
16086c92544dSBjoern A. Zeeb for (i = 0; i < count; i++)
16096c92544dSBjoern A. Zeeb mt7615_mac_tx_free_token(dev, le32_to_cpu(token[i]));
16106c92544dSBjoern A. Zeeb }
16116c92544dSBjoern A. Zeeb
16126c92544dSBjoern A. Zeeb rcu_read_lock();
16136c92544dSBjoern A. Zeeb mt7615_mac_sta_poll(dev);
16146c92544dSBjoern A. Zeeb rcu_read_unlock();
16156c92544dSBjoern A. Zeeb
16166c92544dSBjoern A. Zeeb mt76_worker_schedule(&dev->mt76.tx_worker);
16176c92544dSBjoern A. Zeeb }
16186c92544dSBjoern A. Zeeb
mt7615_rx_check(struct mt76_dev * mdev,void * data,int len)16196c92544dSBjoern A. Zeeb bool mt7615_rx_check(struct mt76_dev *mdev, void *data, int len)
16206c92544dSBjoern A. Zeeb {
16216c92544dSBjoern A. Zeeb struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
16226c92544dSBjoern A. Zeeb __le32 *rxd = (__le32 *)data;
16236c92544dSBjoern A. Zeeb __le32 *end = (__le32 *)&rxd[len / 4];
16246c92544dSBjoern A. Zeeb enum rx_pkt_type type;
16256c92544dSBjoern A. Zeeb
16266c92544dSBjoern A. Zeeb type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE);
16276c92544dSBjoern A. Zeeb
16286c92544dSBjoern A. Zeeb switch (type) {
16296c92544dSBjoern A. Zeeb case PKT_TYPE_TXRX_NOTIFY:
16306c92544dSBjoern A. Zeeb mt7615_mac_tx_free(dev, data, len);
16316c92544dSBjoern A. Zeeb return false;
16326c92544dSBjoern A. Zeeb case PKT_TYPE_TXS:
16336c92544dSBjoern A. Zeeb for (rxd++; rxd + 7 <= end; rxd += 7)
16346c92544dSBjoern A. Zeeb mt7615_mac_add_txs(dev, rxd);
16356c92544dSBjoern A. Zeeb return false;
16366c92544dSBjoern A. Zeeb default:
16376c92544dSBjoern A. Zeeb return true;
16386c92544dSBjoern A. Zeeb }
16396c92544dSBjoern A. Zeeb }
16406c92544dSBjoern A. Zeeb EXPORT_SYMBOL_GPL(mt7615_rx_check);
16416c92544dSBjoern A. Zeeb
mt7615_queue_rx_skb(struct mt76_dev * mdev,enum mt76_rxq_id q,struct sk_buff * skb,u32 * info)16426c92544dSBjoern A. Zeeb void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
1643cbb3ec25SBjoern A. Zeeb struct sk_buff *skb, u32 *info)
16446c92544dSBjoern A. Zeeb {
16456c92544dSBjoern A. Zeeb struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
16466c92544dSBjoern A. Zeeb __le32 *rxd = (__le32 *)skb->data;
16476c92544dSBjoern A. Zeeb __le32 *end = (__le32 *)&skb->data[skb->len];
16486c92544dSBjoern A. Zeeb enum rx_pkt_type type;
16496c92544dSBjoern A. Zeeb u16 flag;
16506c92544dSBjoern A. Zeeb
16516c92544dSBjoern A. Zeeb type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE);
16526c92544dSBjoern A. Zeeb flag = le32_get_bits(rxd[0], MT_RXD0_PKT_FLAG);
16536c92544dSBjoern A. Zeeb if (type == PKT_TYPE_RX_EVENT && flag == 0x1)
16546c92544dSBjoern A. Zeeb type = PKT_TYPE_NORMAL_MCU;
16556c92544dSBjoern A. Zeeb
16566c92544dSBjoern A. Zeeb switch (type) {
16576c92544dSBjoern A. Zeeb case PKT_TYPE_TXS:
16586c92544dSBjoern A. Zeeb for (rxd++; rxd + 7 <= end; rxd += 7)
16596c92544dSBjoern A. Zeeb mt7615_mac_add_txs(dev, rxd);
16606c92544dSBjoern A. Zeeb dev_kfree_skb(skb);
16616c92544dSBjoern A. Zeeb break;
16626c92544dSBjoern A. Zeeb case PKT_TYPE_TXRX_NOTIFY:
16636c92544dSBjoern A. Zeeb mt7615_mac_tx_free(dev, skb->data, skb->len);
16646c92544dSBjoern A. Zeeb dev_kfree_skb(skb);
16656c92544dSBjoern A. Zeeb break;
16666c92544dSBjoern A. Zeeb case PKT_TYPE_RX_EVENT:
16676c92544dSBjoern A. Zeeb mt7615_mcu_rx_event(dev, skb);
16686c92544dSBjoern A. Zeeb break;
16696c92544dSBjoern A. Zeeb case PKT_TYPE_NORMAL_MCU:
16706c92544dSBjoern A. Zeeb case PKT_TYPE_NORMAL:
16716c92544dSBjoern A. Zeeb if (!mt7615_mac_fill_rx(dev, skb)) {
16726c92544dSBjoern A. Zeeb mt76_rx(&dev->mt76, q, skb);
16736c92544dSBjoern A. Zeeb return;
16746c92544dSBjoern A. Zeeb }
16756c92544dSBjoern A. Zeeb fallthrough;
16766c92544dSBjoern A. Zeeb default:
16776c92544dSBjoern A. Zeeb dev_kfree_skb(skb);
16786c92544dSBjoern A. Zeeb break;
16796c92544dSBjoern A. Zeeb }
16806c92544dSBjoern A. Zeeb }
16816c92544dSBjoern A. Zeeb EXPORT_SYMBOL_GPL(mt7615_queue_rx_skb);
16826c92544dSBjoern A. Zeeb
16836c92544dSBjoern A. Zeeb static void
mt7615_mac_set_sensitivity(struct mt7615_phy * phy,int val,bool ofdm)16846c92544dSBjoern A. Zeeb mt7615_mac_set_sensitivity(struct mt7615_phy *phy, int val, bool ofdm)
16856c92544dSBjoern A. Zeeb {
16866c92544dSBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
16876c92544dSBjoern A. Zeeb bool ext_phy = phy != &dev->phy;
16886c92544dSBjoern A. Zeeb
16896c92544dSBjoern A. Zeeb if (is_mt7663(&dev->mt76)) {
16906c92544dSBjoern A. Zeeb if (ofdm)
16916c92544dSBjoern A. Zeeb mt76_rmw(dev, MT7663_WF_PHY_MIN_PRI_PWR(ext_phy),
16926c92544dSBjoern A. Zeeb MT_WF_PHY_PD_OFDM_MASK(0),
16936c92544dSBjoern A. Zeeb MT_WF_PHY_PD_OFDM(0, val));
16946c92544dSBjoern A. Zeeb else
16956c92544dSBjoern A. Zeeb mt76_rmw(dev, MT7663_WF_PHY_RXTD_CCK_PD(ext_phy),
16966c92544dSBjoern A. Zeeb MT_WF_PHY_PD_CCK_MASK(ext_phy),
16976c92544dSBjoern A. Zeeb MT_WF_PHY_PD_CCK(ext_phy, val));
16986c92544dSBjoern A. Zeeb return;
16996c92544dSBjoern A. Zeeb }
17006c92544dSBjoern A. Zeeb
17016c92544dSBjoern A. Zeeb if (ofdm)
17026c92544dSBjoern A. Zeeb mt76_rmw(dev, MT_WF_PHY_MIN_PRI_PWR(ext_phy),
17036c92544dSBjoern A. Zeeb MT_WF_PHY_PD_OFDM_MASK(ext_phy),
17046c92544dSBjoern A. Zeeb MT_WF_PHY_PD_OFDM(ext_phy, val));
17056c92544dSBjoern A. Zeeb else
17066c92544dSBjoern A. Zeeb mt76_rmw(dev, MT_WF_PHY_RXTD_CCK_PD(ext_phy),
17076c92544dSBjoern A. Zeeb MT_WF_PHY_PD_CCK_MASK(ext_phy),
17086c92544dSBjoern A. Zeeb MT_WF_PHY_PD_CCK(ext_phy, val));
17096c92544dSBjoern A. Zeeb }
17106c92544dSBjoern A. Zeeb
17116c92544dSBjoern A. Zeeb static void
mt7615_mac_set_default_sensitivity(struct mt7615_phy * phy)17126c92544dSBjoern A. Zeeb mt7615_mac_set_default_sensitivity(struct mt7615_phy *phy)
17136c92544dSBjoern A. Zeeb {
17146c92544dSBjoern A. Zeeb /* ofdm */
17156c92544dSBjoern A. Zeeb mt7615_mac_set_sensitivity(phy, 0x13c, true);
17166c92544dSBjoern A. Zeeb /* cck */
17176c92544dSBjoern A. Zeeb mt7615_mac_set_sensitivity(phy, 0x92, false);
17186c92544dSBjoern A. Zeeb
17196c92544dSBjoern A. Zeeb phy->ofdm_sensitivity = -98;
17206c92544dSBjoern A. Zeeb phy->cck_sensitivity = -110;
17216c92544dSBjoern A. Zeeb phy->last_cca_adj = jiffies;
17226c92544dSBjoern A. Zeeb }
17236c92544dSBjoern A. Zeeb
mt7615_mac_set_scs(struct mt7615_phy * phy,bool enable)17246c92544dSBjoern A. Zeeb void mt7615_mac_set_scs(struct mt7615_phy *phy, bool enable)
17256c92544dSBjoern A. Zeeb {
17266c92544dSBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
17276c92544dSBjoern A. Zeeb bool ext_phy = phy != &dev->phy;
17286c92544dSBjoern A. Zeeb u32 reg, mask;
17296c92544dSBjoern A. Zeeb
17306c92544dSBjoern A. Zeeb mt7615_mutex_acquire(dev);
17316c92544dSBjoern A. Zeeb
17326c92544dSBjoern A. Zeeb if (phy->scs_en == enable)
17336c92544dSBjoern A. Zeeb goto out;
17346c92544dSBjoern A. Zeeb
17356c92544dSBjoern A. Zeeb if (is_mt7663(&dev->mt76)) {
17366c92544dSBjoern A. Zeeb reg = MT7663_WF_PHY_MIN_PRI_PWR(ext_phy);
17376c92544dSBjoern A. Zeeb mask = MT_WF_PHY_PD_BLK(0);
17386c92544dSBjoern A. Zeeb } else {
17396c92544dSBjoern A. Zeeb reg = MT_WF_PHY_MIN_PRI_PWR(ext_phy);
17406c92544dSBjoern A. Zeeb mask = MT_WF_PHY_PD_BLK(ext_phy);
17416c92544dSBjoern A. Zeeb }
17426c92544dSBjoern A. Zeeb
17436c92544dSBjoern A. Zeeb if (enable) {
17446c92544dSBjoern A. Zeeb mt76_set(dev, reg, mask);
17456c92544dSBjoern A. Zeeb if (is_mt7622(&dev->mt76)) {
17466c92544dSBjoern A. Zeeb mt76_set(dev, MT_MIB_M0_MISC_CR(0), 0x7 << 8);
17476c92544dSBjoern A. Zeeb mt76_set(dev, MT_MIB_M0_MISC_CR(0), 0x7);
17486c92544dSBjoern A. Zeeb }
17496c92544dSBjoern A. Zeeb } else {
17506c92544dSBjoern A. Zeeb mt76_clear(dev, reg, mask);
17516c92544dSBjoern A. Zeeb }
17526c92544dSBjoern A. Zeeb
17536c92544dSBjoern A. Zeeb mt7615_mac_set_default_sensitivity(phy);
17546c92544dSBjoern A. Zeeb phy->scs_en = enable;
17556c92544dSBjoern A. Zeeb
17566c92544dSBjoern A. Zeeb out:
17576c92544dSBjoern A. Zeeb mt7615_mutex_release(dev);
17586c92544dSBjoern A. Zeeb }
17596c92544dSBjoern A. Zeeb
mt7615_mac_enable_nf(struct mt7615_dev * dev,bool ext_phy)17606c92544dSBjoern A. Zeeb void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy)
17616c92544dSBjoern A. Zeeb {
17626c92544dSBjoern A. Zeeb u32 rxtd, reg;
17636c92544dSBjoern A. Zeeb
17646c92544dSBjoern A. Zeeb if (is_mt7663(&dev->mt76))
17656c92544dSBjoern A. Zeeb reg = MT7663_WF_PHY_R0_PHYMUX_5;
17666c92544dSBjoern A. Zeeb else
17676c92544dSBjoern A. Zeeb reg = MT_WF_PHY_R0_PHYMUX_5(ext_phy);
17686c92544dSBjoern A. Zeeb
17696c92544dSBjoern A. Zeeb if (ext_phy)
17706c92544dSBjoern A. Zeeb rxtd = MT_WF_PHY_RXTD2(10);
17716c92544dSBjoern A. Zeeb else
17726c92544dSBjoern A. Zeeb rxtd = MT_WF_PHY_RXTD(12);
17736c92544dSBjoern A. Zeeb
17746c92544dSBjoern A. Zeeb mt76_set(dev, rxtd, BIT(18) | BIT(29));
17756c92544dSBjoern A. Zeeb mt76_set(dev, reg, 0x5 << 12);
17766c92544dSBjoern A. Zeeb }
17776c92544dSBjoern A. Zeeb
mt7615_mac_cca_stats_reset(struct mt7615_phy * phy)17786c92544dSBjoern A. Zeeb void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy)
17796c92544dSBjoern A. Zeeb {
17806c92544dSBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
17816c92544dSBjoern A. Zeeb bool ext_phy = phy != &dev->phy;
17826c92544dSBjoern A. Zeeb u32 reg;
17836c92544dSBjoern A. Zeeb
17846c92544dSBjoern A. Zeeb if (is_mt7663(&dev->mt76))
17856c92544dSBjoern A. Zeeb reg = MT7663_WF_PHY_R0_PHYMUX_5;
17866c92544dSBjoern A. Zeeb else
17876c92544dSBjoern A. Zeeb reg = MT_WF_PHY_R0_PHYMUX_5(ext_phy);
17886c92544dSBjoern A. Zeeb
17896c92544dSBjoern A. Zeeb /* reset PD and MDRDY counters */
17906c92544dSBjoern A. Zeeb mt76_clear(dev, reg, GENMASK(22, 20));
17916c92544dSBjoern A. Zeeb mt76_set(dev, reg, BIT(22) | BIT(20));
17926c92544dSBjoern A. Zeeb }
17936c92544dSBjoern A. Zeeb
17946c92544dSBjoern A. Zeeb static void
mt7615_mac_adjust_sensitivity(struct mt7615_phy * phy,u32 rts_err_rate,bool ofdm)17956c92544dSBjoern A. Zeeb mt7615_mac_adjust_sensitivity(struct mt7615_phy *phy,
17966c92544dSBjoern A. Zeeb u32 rts_err_rate, bool ofdm)
17976c92544dSBjoern A. Zeeb {
17986c92544dSBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
17996c92544dSBjoern A. Zeeb int false_cca = ofdm ? phy->false_cca_ofdm : phy->false_cca_cck;
18006c92544dSBjoern A. Zeeb bool ext_phy = phy != &dev->phy;
18016c92544dSBjoern A. Zeeb s16 def_th = ofdm ? -98 : -110;
18026c92544dSBjoern A. Zeeb bool update = false;
18036c92544dSBjoern A. Zeeb s8 *sensitivity;
18046c92544dSBjoern A. Zeeb int signal;
18056c92544dSBjoern A. Zeeb
18066c92544dSBjoern A. Zeeb sensitivity = ofdm ? &phy->ofdm_sensitivity : &phy->cck_sensitivity;
18076c92544dSBjoern A. Zeeb signal = mt76_get_min_avg_rssi(&dev->mt76, ext_phy);
18086c92544dSBjoern A. Zeeb if (!signal) {
18096c92544dSBjoern A. Zeeb mt7615_mac_set_default_sensitivity(phy);
18106c92544dSBjoern A. Zeeb return;
18116c92544dSBjoern A. Zeeb }
18126c92544dSBjoern A. Zeeb
18136c92544dSBjoern A. Zeeb signal = min(signal, -72);
18146c92544dSBjoern A. Zeeb if (false_cca > 500) {
18156c92544dSBjoern A. Zeeb if (rts_err_rate > MT_FRAC(40, 100))
18166c92544dSBjoern A. Zeeb return;
18176c92544dSBjoern A. Zeeb
18186c92544dSBjoern A. Zeeb /* decrease coverage */
18196c92544dSBjoern A. Zeeb if (*sensitivity == def_th && signal > -90) {
18206c92544dSBjoern A. Zeeb *sensitivity = -90;
18216c92544dSBjoern A. Zeeb update = true;
18226c92544dSBjoern A. Zeeb } else if (*sensitivity + 2 < signal) {
18236c92544dSBjoern A. Zeeb *sensitivity += 2;
18246c92544dSBjoern A. Zeeb update = true;
18256c92544dSBjoern A. Zeeb }
18266c92544dSBjoern A. Zeeb } else if ((false_cca > 0 && false_cca < 50) ||
18276c92544dSBjoern A. Zeeb rts_err_rate > MT_FRAC(60, 100)) {
18286c92544dSBjoern A. Zeeb /* increase coverage */
18296c92544dSBjoern A. Zeeb if (*sensitivity - 2 >= def_th) {
18306c92544dSBjoern A. Zeeb *sensitivity -= 2;
18316c92544dSBjoern A. Zeeb update = true;
18326c92544dSBjoern A. Zeeb }
18336c92544dSBjoern A. Zeeb }
18346c92544dSBjoern A. Zeeb
18356c92544dSBjoern A. Zeeb if (*sensitivity > signal) {
18366c92544dSBjoern A. Zeeb *sensitivity = signal;
18376c92544dSBjoern A. Zeeb update = true;
18386c92544dSBjoern A. Zeeb }
18396c92544dSBjoern A. Zeeb
18406c92544dSBjoern A. Zeeb if (update) {
18416c92544dSBjoern A. Zeeb u16 val = ofdm ? *sensitivity * 2 + 512 : *sensitivity + 256;
18426c92544dSBjoern A. Zeeb
18436c92544dSBjoern A. Zeeb mt7615_mac_set_sensitivity(phy, val, ofdm);
18446c92544dSBjoern A. Zeeb phy->last_cca_adj = jiffies;
18456c92544dSBjoern A. Zeeb }
18466c92544dSBjoern A. Zeeb }
18476c92544dSBjoern A. Zeeb
18486c92544dSBjoern A. Zeeb static void
mt7615_mac_scs_check(struct mt7615_phy * phy)18496c92544dSBjoern A. Zeeb mt7615_mac_scs_check(struct mt7615_phy *phy)
18506c92544dSBjoern A. Zeeb {
18516c92544dSBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
18526c92544dSBjoern A. Zeeb struct mib_stats *mib = &phy->mib;
18536c92544dSBjoern A. Zeeb u32 val, rts_err_rate = 0;
18546c92544dSBjoern A. Zeeb u32 mdrdy_cck, mdrdy_ofdm, pd_cck, pd_ofdm;
18556c92544dSBjoern A. Zeeb bool ext_phy = phy != &dev->phy;
18566c92544dSBjoern A. Zeeb
18576c92544dSBjoern A. Zeeb if (!phy->scs_en)
18586c92544dSBjoern A. Zeeb return;
18596c92544dSBjoern A. Zeeb
18606c92544dSBjoern A. Zeeb if (is_mt7663(&dev->mt76))
18616c92544dSBjoern A. Zeeb val = mt76_rr(dev, MT7663_WF_PHY_R0_PHYCTRL_STS0(ext_phy));
18626c92544dSBjoern A. Zeeb else
18636c92544dSBjoern A. Zeeb val = mt76_rr(dev, MT_WF_PHY_R0_PHYCTRL_STS0(ext_phy));
18646c92544dSBjoern A. Zeeb pd_cck = FIELD_GET(MT_WF_PHYCTRL_STAT_PD_CCK, val);
18656c92544dSBjoern A. Zeeb pd_ofdm = FIELD_GET(MT_WF_PHYCTRL_STAT_PD_OFDM, val);
18666c92544dSBjoern A. Zeeb
18676c92544dSBjoern A. Zeeb if (is_mt7663(&dev->mt76))
18686c92544dSBjoern A. Zeeb val = mt76_rr(dev, MT7663_WF_PHY_R0_PHYCTRL_STS5(ext_phy));
18696c92544dSBjoern A. Zeeb else
18706c92544dSBjoern A. Zeeb val = mt76_rr(dev, MT_WF_PHY_R0_PHYCTRL_STS5(ext_phy));
18716c92544dSBjoern A. Zeeb mdrdy_cck = FIELD_GET(MT_WF_PHYCTRL_STAT_MDRDY_CCK, val);
18726c92544dSBjoern A. Zeeb mdrdy_ofdm = FIELD_GET(MT_WF_PHYCTRL_STAT_MDRDY_OFDM, val);
18736c92544dSBjoern A. Zeeb
18746c92544dSBjoern A. Zeeb phy->false_cca_ofdm = pd_ofdm - mdrdy_ofdm;
18756c92544dSBjoern A. Zeeb phy->false_cca_cck = pd_cck - mdrdy_cck;
18766c92544dSBjoern A. Zeeb mt7615_mac_cca_stats_reset(phy);
18776c92544dSBjoern A. Zeeb
18786c92544dSBjoern A. Zeeb if (mib->rts_cnt + mib->rts_retries_cnt)
18796c92544dSBjoern A. Zeeb rts_err_rate = MT_FRAC(mib->rts_retries_cnt,
18806c92544dSBjoern A. Zeeb mib->rts_cnt + mib->rts_retries_cnt);
18816c92544dSBjoern A. Zeeb
18826c92544dSBjoern A. Zeeb /* cck */
18836c92544dSBjoern A. Zeeb mt7615_mac_adjust_sensitivity(phy, rts_err_rate, false);
18846c92544dSBjoern A. Zeeb /* ofdm */
18856c92544dSBjoern A. Zeeb mt7615_mac_adjust_sensitivity(phy, rts_err_rate, true);
18866c92544dSBjoern A. Zeeb
18876c92544dSBjoern A. Zeeb if (time_after(jiffies, phy->last_cca_adj + 10 * HZ))
18886c92544dSBjoern A. Zeeb mt7615_mac_set_default_sensitivity(phy);
18896c92544dSBjoern A. Zeeb }
18906c92544dSBjoern A. Zeeb
18916c92544dSBjoern A. Zeeb static u8
mt7615_phy_get_nf(struct mt7615_dev * dev,int idx)18926c92544dSBjoern A. Zeeb mt7615_phy_get_nf(struct mt7615_dev *dev, int idx)
18936c92544dSBjoern A. Zeeb {
18946c92544dSBjoern A. Zeeb static const u8 nf_power[] = { 92, 89, 86, 83, 80, 75, 70, 65, 60, 55, 52 };
18956c92544dSBjoern A. Zeeb u32 reg, val, sum = 0, n = 0;
18966c92544dSBjoern A. Zeeb int i;
18976c92544dSBjoern A. Zeeb
18986c92544dSBjoern A. Zeeb if (is_mt7663(&dev->mt76))
18996c92544dSBjoern A. Zeeb reg = MT7663_WF_PHY_RXTD(20);
19006c92544dSBjoern A. Zeeb else
19016c92544dSBjoern A. Zeeb reg = idx ? MT_WF_PHY_RXTD2(17) : MT_WF_PHY_RXTD(20);
19026c92544dSBjoern A. Zeeb
19036c92544dSBjoern A. Zeeb for (i = 0; i < ARRAY_SIZE(nf_power); i++, reg += 4) {
19046c92544dSBjoern A. Zeeb val = mt76_rr(dev, reg);
19056c92544dSBjoern A. Zeeb sum += val * nf_power[i];
19066c92544dSBjoern A. Zeeb n += val;
19076c92544dSBjoern A. Zeeb }
19086c92544dSBjoern A. Zeeb
19096c92544dSBjoern A. Zeeb if (!n)
19106c92544dSBjoern A. Zeeb return 0;
19116c92544dSBjoern A. Zeeb
19126c92544dSBjoern A. Zeeb return sum / n;
19136c92544dSBjoern A. Zeeb }
19146c92544dSBjoern A. Zeeb
19156c92544dSBjoern A. Zeeb static void
mt7615_phy_update_channel(struct mt76_phy * mphy,int idx)19166c92544dSBjoern A. Zeeb mt7615_phy_update_channel(struct mt76_phy *mphy, int idx)
19176c92544dSBjoern A. Zeeb {
19186c92544dSBjoern A. Zeeb struct mt7615_dev *dev = container_of(mphy->dev, struct mt7615_dev, mt76);
19196c92544dSBjoern A. Zeeb struct mt7615_phy *phy = mphy->priv;
19206c92544dSBjoern A. Zeeb struct mt76_channel_state *state;
19216c92544dSBjoern A. Zeeb u64 busy_time, tx_time, rx_time, obss_time;
19226c92544dSBjoern A. Zeeb u32 obss_reg = idx ? MT_WF_RMAC_MIB_TIME6 : MT_WF_RMAC_MIB_TIME5;
19236c92544dSBjoern A. Zeeb int nf;
19246c92544dSBjoern A. Zeeb
19256c92544dSBjoern A. Zeeb busy_time = mt76_get_field(dev, MT_MIB_SDR9(idx),
19266c92544dSBjoern A. Zeeb MT_MIB_SDR9_BUSY_MASK);
19276c92544dSBjoern A. Zeeb tx_time = mt76_get_field(dev, MT_MIB_SDR36(idx),
19286c92544dSBjoern A. Zeeb MT_MIB_SDR36_TXTIME_MASK);
19296c92544dSBjoern A. Zeeb rx_time = mt76_get_field(dev, MT_MIB_SDR37(idx),
19306c92544dSBjoern A. Zeeb MT_MIB_SDR37_RXTIME_MASK);
19316c92544dSBjoern A. Zeeb obss_time = mt76_get_field(dev, obss_reg, MT_MIB_OBSSTIME_MASK);
19326c92544dSBjoern A. Zeeb
19336c92544dSBjoern A. Zeeb nf = mt7615_phy_get_nf(dev, idx);
19346c92544dSBjoern A. Zeeb if (!phy->noise)
19356c92544dSBjoern A. Zeeb phy->noise = nf << 4;
19366c92544dSBjoern A. Zeeb else if (nf)
19376c92544dSBjoern A. Zeeb phy->noise += nf - (phy->noise >> 4);
19386c92544dSBjoern A. Zeeb
19396c92544dSBjoern A. Zeeb state = mphy->chan_state;
19406c92544dSBjoern A. Zeeb state->cc_busy += busy_time;
19416c92544dSBjoern A. Zeeb state->cc_tx += tx_time;
19426c92544dSBjoern A. Zeeb state->cc_rx += rx_time + obss_time;
19436c92544dSBjoern A. Zeeb state->cc_bss_rx += rx_time;
19446c92544dSBjoern A. Zeeb state->noise = -(phy->noise >> 4);
19456c92544dSBjoern A. Zeeb }
19466c92544dSBjoern A. Zeeb
mt7615_update_survey(struct mt7615_dev * dev)19476c92544dSBjoern A. Zeeb static void mt7615_update_survey(struct mt7615_dev *dev)
19486c92544dSBjoern A. Zeeb {
19496c92544dSBjoern A. Zeeb struct mt76_dev *mdev = &dev->mt76;
19506c92544dSBjoern A. Zeeb struct mt76_phy *mphy_ext = mdev->phys[MT_BAND1];
19516c92544dSBjoern A. Zeeb ktime_t cur_time;
19526c92544dSBjoern A. Zeeb
19536c92544dSBjoern A. Zeeb /* MT7615 can only update both phys simultaneously
19546c92544dSBjoern A. Zeeb * since some reisters are shared across bands.
19556c92544dSBjoern A. Zeeb */
19566c92544dSBjoern A. Zeeb
19576c92544dSBjoern A. Zeeb mt7615_phy_update_channel(&mdev->phy, 0);
19586c92544dSBjoern A. Zeeb if (mphy_ext)
19596c92544dSBjoern A. Zeeb mt7615_phy_update_channel(mphy_ext, 1);
19606c92544dSBjoern A. Zeeb
19616c92544dSBjoern A. Zeeb cur_time = ktime_get_boottime();
19626c92544dSBjoern A. Zeeb
19636c92544dSBjoern A. Zeeb mt76_update_survey_active_time(&mdev->phy, cur_time);
19646c92544dSBjoern A. Zeeb if (mphy_ext)
19656c92544dSBjoern A. Zeeb mt76_update_survey_active_time(mphy_ext, cur_time);
19666c92544dSBjoern A. Zeeb
19676c92544dSBjoern A. Zeeb /* reset obss airtime */
19686c92544dSBjoern A. Zeeb mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_CLR);
19696c92544dSBjoern A. Zeeb }
19706c92544dSBjoern A. Zeeb
mt7615_update_channel(struct mt76_phy * mphy)19716c92544dSBjoern A. Zeeb void mt7615_update_channel(struct mt76_phy *mphy)
19726c92544dSBjoern A. Zeeb {
19736c92544dSBjoern A. Zeeb struct mt7615_dev *dev = container_of(mphy->dev, struct mt7615_dev, mt76);
19746c92544dSBjoern A. Zeeb
19756c92544dSBjoern A. Zeeb if (mt76_connac_pm_wake(&dev->mphy, &dev->pm))
19766c92544dSBjoern A. Zeeb return;
19776c92544dSBjoern A. Zeeb
19786c92544dSBjoern A. Zeeb mt7615_update_survey(dev);
19796c92544dSBjoern A. Zeeb mt76_connac_power_save_sched(&dev->mphy, &dev->pm);
19806c92544dSBjoern A. Zeeb }
19816c92544dSBjoern A. Zeeb EXPORT_SYMBOL_GPL(mt7615_update_channel);
19826c92544dSBjoern A. Zeeb
19836c92544dSBjoern A. Zeeb static void
mt7615_mac_update_mib_stats(struct mt7615_phy * phy)19846c92544dSBjoern A. Zeeb mt7615_mac_update_mib_stats(struct mt7615_phy *phy)
19856c92544dSBjoern A. Zeeb {
19866c92544dSBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
19876c92544dSBjoern A. Zeeb struct mib_stats *mib = &phy->mib;
19886c92544dSBjoern A. Zeeb bool ext_phy = phy != &dev->phy;
1989cbb3ec25SBjoern A. Zeeb int i, aggr = 0;
19906c92544dSBjoern A. Zeeb u32 val, val2;
19916c92544dSBjoern A. Zeeb
19926c92544dSBjoern A. Zeeb mib->fcs_err_cnt += mt76_get_field(dev, MT_MIB_SDR3(ext_phy),
19936c92544dSBjoern A. Zeeb MT_MIB_SDR3_FCS_ERR_MASK);
19946c92544dSBjoern A. Zeeb
19956c92544dSBjoern A. Zeeb val = mt76_get_field(dev, MT_MIB_SDR14(ext_phy),
19966c92544dSBjoern A. Zeeb MT_MIB_AMPDU_MPDU_COUNT);
19976c92544dSBjoern A. Zeeb if (val) {
19986c92544dSBjoern A. Zeeb val2 = mt76_get_field(dev, MT_MIB_SDR15(ext_phy),
19996c92544dSBjoern A. Zeeb MT_MIB_AMPDU_ACK_COUNT);
20006c92544dSBjoern A. Zeeb mib->aggr_per = 1000 * (val - val2) / val;
20016c92544dSBjoern A. Zeeb }
20026c92544dSBjoern A. Zeeb
20036c92544dSBjoern A. Zeeb for (i = 0; i < 4; i++) {
20046c92544dSBjoern A. Zeeb val = mt76_rr(dev, MT_MIB_MB_SDR1(ext_phy, i));
20056c92544dSBjoern A. Zeeb mib->ba_miss_cnt += FIELD_GET(MT_MIB_BA_MISS_COUNT_MASK, val);
20066c92544dSBjoern A. Zeeb mib->ack_fail_cnt += FIELD_GET(MT_MIB_ACK_FAIL_COUNT_MASK,
20076c92544dSBjoern A. Zeeb val);
20086c92544dSBjoern A. Zeeb
20096c92544dSBjoern A. Zeeb val = mt76_rr(dev, MT_MIB_MB_SDR0(ext_phy, i));
20106c92544dSBjoern A. Zeeb mib->rts_cnt += FIELD_GET(MT_MIB_RTS_COUNT_MASK, val);
20116c92544dSBjoern A. Zeeb mib->rts_retries_cnt += FIELD_GET(MT_MIB_RTS_RETRIES_COUNT_MASK,
20126c92544dSBjoern A. Zeeb val);
20136c92544dSBjoern A. Zeeb
20146c92544dSBjoern A. Zeeb val = mt76_rr(dev, MT_TX_AGG_CNT(ext_phy, i));
2015cbb3ec25SBjoern A. Zeeb phy->mt76->aggr_stats[aggr++] += val & 0xffff;
2016cbb3ec25SBjoern A. Zeeb phy->mt76->aggr_stats[aggr++] += val >> 16;
20176c92544dSBjoern A. Zeeb }
20186c92544dSBjoern A. Zeeb }
20196c92544dSBjoern A. Zeeb
mt7615_pm_wake_work(struct work_struct * work)20206c92544dSBjoern A. Zeeb void mt7615_pm_wake_work(struct work_struct *work)
20216c92544dSBjoern A. Zeeb {
20226c92544dSBjoern A. Zeeb struct mt7615_dev *dev;
20236c92544dSBjoern A. Zeeb struct mt76_phy *mphy;
20246c92544dSBjoern A. Zeeb
20256c92544dSBjoern A. Zeeb dev = (struct mt7615_dev *)container_of(work, struct mt7615_dev,
20266c92544dSBjoern A. Zeeb pm.wake_work);
20276c92544dSBjoern A. Zeeb mphy = dev->phy.mt76;
20286c92544dSBjoern A. Zeeb
20296c92544dSBjoern A. Zeeb if (!mt7615_mcu_set_drv_ctrl(dev)) {
20306c92544dSBjoern A. Zeeb struct mt76_dev *mdev = &dev->mt76;
20316c92544dSBjoern A. Zeeb int i;
20326c92544dSBjoern A. Zeeb
20336c92544dSBjoern A. Zeeb if (mt76_is_sdio(mdev)) {
20346c92544dSBjoern A. Zeeb mt76_connac_pm_dequeue_skbs(mphy, &dev->pm);
20356c92544dSBjoern A. Zeeb mt76_worker_schedule(&mdev->sdio.txrx_worker);
20366c92544dSBjoern A. Zeeb } else {
20376c92544dSBjoern A. Zeeb local_bh_disable();
20386c92544dSBjoern A. Zeeb mt76_for_each_q_rx(mdev, i)
20396c92544dSBjoern A. Zeeb napi_schedule(&mdev->napi[i]);
20406c92544dSBjoern A. Zeeb local_bh_enable();
20416c92544dSBjoern A. Zeeb mt76_connac_pm_dequeue_skbs(mphy, &dev->pm);
20426c92544dSBjoern A. Zeeb mt76_queue_tx_cleanup(dev, mdev->q_mcu[MT_MCUQ_WM],
20436c92544dSBjoern A. Zeeb false);
20446c92544dSBjoern A. Zeeb }
20456c92544dSBjoern A. Zeeb
20466c92544dSBjoern A. Zeeb if (test_bit(MT76_STATE_RUNNING, &mphy->state)) {
20476c92544dSBjoern A. Zeeb unsigned long timeout;
20486c92544dSBjoern A. Zeeb
20496c92544dSBjoern A. Zeeb timeout = mt7615_get_macwork_timeout(dev);
20506c92544dSBjoern A. Zeeb ieee80211_queue_delayed_work(mphy->hw, &mphy->mac_work,
20516c92544dSBjoern A. Zeeb timeout);
20526c92544dSBjoern A. Zeeb }
20536c92544dSBjoern A. Zeeb }
20546c92544dSBjoern A. Zeeb
20556c92544dSBjoern A. Zeeb ieee80211_wake_queues(mphy->hw);
20566c92544dSBjoern A. Zeeb wake_up(&dev->pm.wait);
20576c92544dSBjoern A. Zeeb }
20586c92544dSBjoern A. Zeeb
mt7615_pm_power_save_work(struct work_struct * work)20596c92544dSBjoern A. Zeeb void mt7615_pm_power_save_work(struct work_struct *work)
20606c92544dSBjoern A. Zeeb {
20616c92544dSBjoern A. Zeeb struct mt7615_dev *dev;
20626c92544dSBjoern A. Zeeb unsigned long delta;
20636c92544dSBjoern A. Zeeb
20646c92544dSBjoern A. Zeeb dev = (struct mt7615_dev *)container_of(work, struct mt7615_dev,
20656c92544dSBjoern A. Zeeb pm.ps_work.work);
20666c92544dSBjoern A. Zeeb
20676c92544dSBjoern A. Zeeb delta = dev->pm.idle_timeout;
20686c92544dSBjoern A. Zeeb if (test_bit(MT76_HW_SCANNING, &dev->mphy.state) ||
20696c92544dSBjoern A. Zeeb test_bit(MT76_HW_SCHED_SCANNING, &dev->mphy.state))
20706c92544dSBjoern A. Zeeb goto out;
20716c92544dSBjoern A. Zeeb
20726c92544dSBjoern A. Zeeb if (mutex_is_locked(&dev->mt76.mutex))
20736c92544dSBjoern A. Zeeb /* if mt76 mutex is held we should not put the device
20746c92544dSBjoern A. Zeeb * to sleep since we are currently accessing device
20756c92544dSBjoern A. Zeeb * register map. We need to wait for the next power_save
20766c92544dSBjoern A. Zeeb * trigger.
20776c92544dSBjoern A. Zeeb */
20786c92544dSBjoern A. Zeeb goto out;
20796c92544dSBjoern A. Zeeb
20806c92544dSBjoern A. Zeeb if (time_is_after_jiffies(dev->pm.last_activity + delta)) {
20816c92544dSBjoern A. Zeeb delta = dev->pm.last_activity + delta - jiffies;
20826c92544dSBjoern A. Zeeb goto out;
20836c92544dSBjoern A. Zeeb }
20846c92544dSBjoern A. Zeeb
20856c92544dSBjoern A. Zeeb if (!mt7615_mcu_set_fw_ctrl(dev))
20866c92544dSBjoern A. Zeeb return;
20876c92544dSBjoern A. Zeeb out:
20886c92544dSBjoern A. Zeeb queue_delayed_work(dev->mt76.wq, &dev->pm.ps_work, delta);
20896c92544dSBjoern A. Zeeb }
20906c92544dSBjoern A. Zeeb
mt7615_mac_work(struct work_struct * work)20916c92544dSBjoern A. Zeeb void mt7615_mac_work(struct work_struct *work)
20926c92544dSBjoern A. Zeeb {
20936c92544dSBjoern A. Zeeb struct mt7615_phy *phy;
20946c92544dSBjoern A. Zeeb struct mt76_phy *mphy;
20956c92544dSBjoern A. Zeeb unsigned long timeout;
20966c92544dSBjoern A. Zeeb
20976c92544dSBjoern A. Zeeb mphy = (struct mt76_phy *)container_of(work, struct mt76_phy,
20986c92544dSBjoern A. Zeeb mac_work.work);
20996c92544dSBjoern A. Zeeb phy = mphy->priv;
21006c92544dSBjoern A. Zeeb
21016c92544dSBjoern A. Zeeb mt7615_mutex_acquire(phy->dev);
21026c92544dSBjoern A. Zeeb
21036c92544dSBjoern A. Zeeb mt7615_update_survey(phy->dev);
21046c92544dSBjoern A. Zeeb if (++mphy->mac_work_count == 5) {
21056c92544dSBjoern A. Zeeb mphy->mac_work_count = 0;
21066c92544dSBjoern A. Zeeb
21076c92544dSBjoern A. Zeeb mt7615_mac_update_mib_stats(phy);
21086c92544dSBjoern A. Zeeb mt7615_mac_scs_check(phy);
21096c92544dSBjoern A. Zeeb }
21106c92544dSBjoern A. Zeeb
21116c92544dSBjoern A. Zeeb mt7615_mutex_release(phy->dev);
21126c92544dSBjoern A. Zeeb
21136c92544dSBjoern A. Zeeb mt76_tx_status_check(mphy->dev, false);
21146c92544dSBjoern A. Zeeb
21156c92544dSBjoern A. Zeeb timeout = mt7615_get_macwork_timeout(phy->dev);
21166c92544dSBjoern A. Zeeb ieee80211_queue_delayed_work(mphy->hw, &mphy->mac_work, timeout);
21176c92544dSBjoern A. Zeeb }
21186c92544dSBjoern A. Zeeb
mt7615_tx_token_put(struct mt7615_dev * dev)21196c92544dSBjoern A. Zeeb void mt7615_tx_token_put(struct mt7615_dev *dev)
21206c92544dSBjoern A. Zeeb {
21216c92544dSBjoern A. Zeeb struct mt76_txwi_cache *txwi;
21226c92544dSBjoern A. Zeeb int id;
21236c92544dSBjoern A. Zeeb
21246c92544dSBjoern A. Zeeb spin_lock_bh(&dev->mt76.token_lock);
21256c92544dSBjoern A. Zeeb idr_for_each_entry(&dev->mt76.token, txwi, id)
21266c92544dSBjoern A. Zeeb mt7615_txwi_free(dev, txwi);
21276c92544dSBjoern A. Zeeb spin_unlock_bh(&dev->mt76.token_lock);
21286c92544dSBjoern A. Zeeb idr_destroy(&dev->mt76.token);
21296c92544dSBjoern A. Zeeb }
21306c92544dSBjoern A. Zeeb EXPORT_SYMBOL_GPL(mt7615_tx_token_put);
21316c92544dSBjoern A. Zeeb
mt7615_dfs_stop_radar_detector(struct mt7615_phy * phy)21326c92544dSBjoern A. Zeeb static void mt7615_dfs_stop_radar_detector(struct mt7615_phy *phy)
21336c92544dSBjoern A. Zeeb {
21346c92544dSBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
21356c92544dSBjoern A. Zeeb
21366c92544dSBjoern A. Zeeb if (phy->rdd_state & BIT(0))
21376c92544dSBjoern A. Zeeb mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_STOP, 0,
21386c92544dSBjoern A. Zeeb MT_RX_SEL0, 0);
21396c92544dSBjoern A. Zeeb if (phy->rdd_state & BIT(1))
21406c92544dSBjoern A. Zeeb mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_STOP, 1,
21416c92544dSBjoern A. Zeeb MT_RX_SEL0, 0);
21426c92544dSBjoern A. Zeeb }
21436c92544dSBjoern A. Zeeb
mt7615_dfs_start_rdd(struct mt7615_dev * dev,int chain)21446c92544dSBjoern A. Zeeb static int mt7615_dfs_start_rdd(struct mt7615_dev *dev, int chain)
21456c92544dSBjoern A. Zeeb {
21466c92544dSBjoern A. Zeeb int err;
21476c92544dSBjoern A. Zeeb
21486c92544dSBjoern A. Zeeb err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_START, chain,
21496c92544dSBjoern A. Zeeb MT_RX_SEL0, 0);
21506c92544dSBjoern A. Zeeb if (err < 0)
21516c92544dSBjoern A. Zeeb return err;
21526c92544dSBjoern A. Zeeb
21536c92544dSBjoern A. Zeeb return mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_DET_MODE, chain,
21546c92544dSBjoern A. Zeeb MT_RX_SEL0, 1);
21556c92544dSBjoern A. Zeeb }
21566c92544dSBjoern A. Zeeb
mt7615_dfs_start_radar_detector(struct mt7615_phy * phy)21576c92544dSBjoern A. Zeeb static int mt7615_dfs_start_radar_detector(struct mt7615_phy *phy)
21586c92544dSBjoern A. Zeeb {
21596c92544dSBjoern A. Zeeb struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
21606c92544dSBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
21616c92544dSBjoern A. Zeeb bool ext_phy = phy != &dev->phy;
21626c92544dSBjoern A. Zeeb int err;
21636c92544dSBjoern A. Zeeb
21646c92544dSBjoern A. Zeeb /* start CAC */
21656c92544dSBjoern A. Zeeb err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_CAC_START, ext_phy,
21666c92544dSBjoern A. Zeeb MT_RX_SEL0, 0);
21676c92544dSBjoern A. Zeeb if (err < 0)
21686c92544dSBjoern A. Zeeb return err;
21696c92544dSBjoern A. Zeeb
21706c92544dSBjoern A. Zeeb err = mt7615_dfs_start_rdd(dev, ext_phy);
21716c92544dSBjoern A. Zeeb if (err < 0)
21726c92544dSBjoern A. Zeeb return err;
21736c92544dSBjoern A. Zeeb
21746c92544dSBjoern A. Zeeb phy->rdd_state |= BIT(ext_phy);
21756c92544dSBjoern A. Zeeb
21766c92544dSBjoern A. Zeeb if (chandef->width == NL80211_CHAN_WIDTH_160 ||
21776c92544dSBjoern A. Zeeb chandef->width == NL80211_CHAN_WIDTH_80P80) {
21786c92544dSBjoern A. Zeeb err = mt7615_dfs_start_rdd(dev, 1);
21796c92544dSBjoern A. Zeeb if (err < 0)
21806c92544dSBjoern A. Zeeb return err;
21816c92544dSBjoern A. Zeeb
21826c92544dSBjoern A. Zeeb phy->rdd_state |= BIT(1);
21836c92544dSBjoern A. Zeeb }
21846c92544dSBjoern A. Zeeb
21856c92544dSBjoern A. Zeeb return 0;
21866c92544dSBjoern A. Zeeb }
21876c92544dSBjoern A. Zeeb
21886c92544dSBjoern A. Zeeb static int
mt7615_dfs_init_radar_specs(struct mt7615_phy * phy)21896c92544dSBjoern A. Zeeb mt7615_dfs_init_radar_specs(struct mt7615_phy *phy)
21906c92544dSBjoern A. Zeeb {
21916c92544dSBjoern A. Zeeb const struct mt7615_dfs_radar_spec *radar_specs;
21926c92544dSBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
21936c92544dSBjoern A. Zeeb int err, i, lpn = 500;
21946c92544dSBjoern A. Zeeb
21956c92544dSBjoern A. Zeeb switch (dev->mt76.region) {
21966c92544dSBjoern A. Zeeb case NL80211_DFS_FCC:
21976c92544dSBjoern A. Zeeb radar_specs = &fcc_radar_specs;
21986c92544dSBjoern A. Zeeb lpn = 8;
21996c92544dSBjoern A. Zeeb break;
22006c92544dSBjoern A. Zeeb case NL80211_DFS_ETSI:
22016c92544dSBjoern A. Zeeb radar_specs = &etsi_radar_specs;
22026c92544dSBjoern A. Zeeb break;
22036c92544dSBjoern A. Zeeb case NL80211_DFS_JP:
22046c92544dSBjoern A. Zeeb radar_specs = &jp_radar_specs;
22056c92544dSBjoern A. Zeeb break;
22066c92544dSBjoern A. Zeeb default:
22076c92544dSBjoern A. Zeeb return -EINVAL;
22086c92544dSBjoern A. Zeeb }
22096c92544dSBjoern A. Zeeb
22106c92544dSBjoern A. Zeeb /* avoid FCC radar detection in non-FCC region */
22116c92544dSBjoern A. Zeeb err = mt7615_mcu_set_fcc5_lpn(dev, lpn);
22126c92544dSBjoern A. Zeeb if (err < 0)
22136c92544dSBjoern A. Zeeb return err;
22146c92544dSBjoern A. Zeeb
22156c92544dSBjoern A. Zeeb for (i = 0; i < ARRAY_SIZE(radar_specs->radar_pattern); i++) {
22166c92544dSBjoern A. Zeeb err = mt7615_mcu_set_radar_th(dev, i,
22176c92544dSBjoern A. Zeeb &radar_specs->radar_pattern[i]);
22186c92544dSBjoern A. Zeeb if (err < 0)
22196c92544dSBjoern A. Zeeb return err;
22206c92544dSBjoern A. Zeeb }
22216c92544dSBjoern A. Zeeb
22226c92544dSBjoern A. Zeeb return mt7615_mcu_set_pulse_th(dev, &radar_specs->pulse_th);
22236c92544dSBjoern A. Zeeb }
22246c92544dSBjoern A. Zeeb
mt7615_dfs_init_radar_detector(struct mt7615_phy * phy)22256c92544dSBjoern A. Zeeb int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy)
22266c92544dSBjoern A. Zeeb {
22276c92544dSBjoern A. Zeeb struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
22286c92544dSBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
22296c92544dSBjoern A. Zeeb bool ext_phy = phy != &dev->phy;
22306c92544dSBjoern A. Zeeb enum mt76_dfs_state dfs_state, prev_state;
22316c92544dSBjoern A. Zeeb int err;
22326c92544dSBjoern A. Zeeb
22336c92544dSBjoern A. Zeeb if (is_mt7663(&dev->mt76))
22346c92544dSBjoern A. Zeeb return 0;
22356c92544dSBjoern A. Zeeb
22366c92544dSBjoern A. Zeeb prev_state = phy->mt76->dfs_state;
22376c92544dSBjoern A. Zeeb dfs_state = mt76_phy_dfs_state(phy->mt76);
22386c92544dSBjoern A. Zeeb if ((chandef->chan->flags & IEEE80211_CHAN_RADAR) &&
22396c92544dSBjoern A. Zeeb dfs_state < MT_DFS_STATE_CAC)
22406c92544dSBjoern A. Zeeb dfs_state = MT_DFS_STATE_ACTIVE;
22416c92544dSBjoern A. Zeeb
22426c92544dSBjoern A. Zeeb if (prev_state == dfs_state)
22436c92544dSBjoern A. Zeeb return 0;
22446c92544dSBjoern A. Zeeb
22456c92544dSBjoern A. Zeeb if (dfs_state == MT_DFS_STATE_DISABLED)
22466c92544dSBjoern A. Zeeb goto stop;
22476c92544dSBjoern A. Zeeb
22486c92544dSBjoern A. Zeeb if (prev_state <= MT_DFS_STATE_DISABLED) {
22496c92544dSBjoern A. Zeeb err = mt7615_dfs_init_radar_specs(phy);
22506c92544dSBjoern A. Zeeb if (err < 0)
22516c92544dSBjoern A. Zeeb return err;
22526c92544dSBjoern A. Zeeb
22536c92544dSBjoern A. Zeeb err = mt7615_dfs_start_radar_detector(phy);
22546c92544dSBjoern A. Zeeb if (err < 0)
22556c92544dSBjoern A. Zeeb return err;
22566c92544dSBjoern A. Zeeb
22576c92544dSBjoern A. Zeeb phy->mt76->dfs_state = MT_DFS_STATE_CAC;
22586c92544dSBjoern A. Zeeb }
22596c92544dSBjoern A. Zeeb
22606c92544dSBjoern A. Zeeb if (dfs_state == MT_DFS_STATE_CAC)
22616c92544dSBjoern A. Zeeb return 0;
22626c92544dSBjoern A. Zeeb
22636c92544dSBjoern A. Zeeb err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_CAC_END,
22646c92544dSBjoern A. Zeeb ext_phy, MT_RX_SEL0, 0);
22656c92544dSBjoern A. Zeeb if (err < 0) {
22666c92544dSBjoern A. Zeeb phy->mt76->dfs_state = MT_DFS_STATE_UNKNOWN;
22676c92544dSBjoern A. Zeeb return err;
22686c92544dSBjoern A. Zeeb }
22696c92544dSBjoern A. Zeeb
22706c92544dSBjoern A. Zeeb phy->mt76->dfs_state = MT_DFS_STATE_ACTIVE;
22716c92544dSBjoern A. Zeeb return 0;
22726c92544dSBjoern A. Zeeb
22736c92544dSBjoern A. Zeeb stop:
22746c92544dSBjoern A. Zeeb err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_NORMAL_START, ext_phy,
22756c92544dSBjoern A. Zeeb MT_RX_SEL0, 0);
22766c92544dSBjoern A. Zeeb if (err < 0)
22776c92544dSBjoern A. Zeeb return err;
22786c92544dSBjoern A. Zeeb
22796c92544dSBjoern A. Zeeb mt7615_dfs_stop_radar_detector(phy);
22806c92544dSBjoern A. Zeeb phy->mt76->dfs_state = MT_DFS_STATE_DISABLED;
22816c92544dSBjoern A. Zeeb
22826c92544dSBjoern A. Zeeb return 0;
22836c92544dSBjoern A. Zeeb }
22846c92544dSBjoern A. Zeeb
mt7615_mac_set_beacon_filter(struct mt7615_phy * phy,struct ieee80211_vif * vif,bool enable)22856c92544dSBjoern A. Zeeb int mt7615_mac_set_beacon_filter(struct mt7615_phy *phy,
22866c92544dSBjoern A. Zeeb struct ieee80211_vif *vif,
22876c92544dSBjoern A. Zeeb bool enable)
22886c92544dSBjoern A. Zeeb {
22896c92544dSBjoern A. Zeeb struct mt7615_dev *dev = phy->dev;
22906c92544dSBjoern A. Zeeb bool ext_phy = phy != &dev->phy;
22916c92544dSBjoern A. Zeeb int err;
22926c92544dSBjoern A. Zeeb
22936c92544dSBjoern A. Zeeb if (!mt7615_firmware_offload(dev))
22946c92544dSBjoern A. Zeeb return -EOPNOTSUPP;
22956c92544dSBjoern A. Zeeb
22966c92544dSBjoern A. Zeeb switch (vif->type) {
22976c92544dSBjoern A. Zeeb case NL80211_IFTYPE_MONITOR:
22986c92544dSBjoern A. Zeeb return 0;
22996c92544dSBjoern A. Zeeb case NL80211_IFTYPE_MESH_POINT:
23006c92544dSBjoern A. Zeeb case NL80211_IFTYPE_ADHOC:
23016c92544dSBjoern A. Zeeb case NL80211_IFTYPE_AP:
23026c92544dSBjoern A. Zeeb if (enable)
23036c92544dSBjoern A. Zeeb phy->n_beacon_vif++;
23046c92544dSBjoern A. Zeeb else
23056c92544dSBjoern A. Zeeb phy->n_beacon_vif--;
23066c92544dSBjoern A. Zeeb fallthrough;
23076c92544dSBjoern A. Zeeb default:
23086c92544dSBjoern A. Zeeb break;
23096c92544dSBjoern A. Zeeb }
23106c92544dSBjoern A. Zeeb
23116c92544dSBjoern A. Zeeb err = mt7615_mcu_set_bss_pm(dev, vif, !phy->n_beacon_vif);
23126c92544dSBjoern A. Zeeb if (err)
23136c92544dSBjoern A. Zeeb return err;
23146c92544dSBjoern A. Zeeb
23156c92544dSBjoern A. Zeeb if (phy->n_beacon_vif) {
23166c92544dSBjoern A. Zeeb vif->driver_flags &= ~IEEE80211_VIF_BEACON_FILTER;
23176c92544dSBjoern A. Zeeb mt76_clear(dev, MT_WF_RFCR(ext_phy),
23186c92544dSBjoern A. Zeeb MT_WF_RFCR_DROP_OTHER_BEACON);
23196c92544dSBjoern A. Zeeb } else {
23206c92544dSBjoern A. Zeeb vif->driver_flags |= IEEE80211_VIF_BEACON_FILTER;
23216c92544dSBjoern A. Zeeb mt76_set(dev, MT_WF_RFCR(ext_phy),
23226c92544dSBjoern A. Zeeb MT_WF_RFCR_DROP_OTHER_BEACON);
23236c92544dSBjoern A. Zeeb }
23246c92544dSBjoern A. Zeeb
23256c92544dSBjoern A. Zeeb return 0;
23266c92544dSBjoern A. Zeeb }
23276c92544dSBjoern A. Zeeb
mt7615_coredump_work(struct work_struct * work)23286c92544dSBjoern A. Zeeb void mt7615_coredump_work(struct work_struct *work)
23296c92544dSBjoern A. Zeeb {
23306c92544dSBjoern A. Zeeb struct mt7615_dev *dev;
23316c92544dSBjoern A. Zeeb char *dump, *data;
23326c92544dSBjoern A. Zeeb
23336c92544dSBjoern A. Zeeb dev = (struct mt7615_dev *)container_of(work, struct mt7615_dev,
23346c92544dSBjoern A. Zeeb coredump.work.work);
23356c92544dSBjoern A. Zeeb
23366c92544dSBjoern A. Zeeb if (time_is_after_jiffies(dev->coredump.last_activity +
23376c92544dSBjoern A. Zeeb 4 * MT76_CONNAC_COREDUMP_TIMEOUT)) {
23386c92544dSBjoern A. Zeeb queue_delayed_work(dev->mt76.wq, &dev->coredump.work,
23396c92544dSBjoern A. Zeeb MT76_CONNAC_COREDUMP_TIMEOUT);
23406c92544dSBjoern A. Zeeb return;
23416c92544dSBjoern A. Zeeb }
23426c92544dSBjoern A. Zeeb
23436c92544dSBjoern A. Zeeb dump = vzalloc(MT76_CONNAC_COREDUMP_SZ);
23446c92544dSBjoern A. Zeeb data = dump;
23456c92544dSBjoern A. Zeeb
23466c92544dSBjoern A. Zeeb while (true) {
23476c92544dSBjoern A. Zeeb struct sk_buff *skb;
23486c92544dSBjoern A. Zeeb
23496c92544dSBjoern A. Zeeb spin_lock_bh(&dev->mt76.lock);
23506c92544dSBjoern A. Zeeb skb = __skb_dequeue(&dev->coredump.msg_list);
23516c92544dSBjoern A. Zeeb spin_unlock_bh(&dev->mt76.lock);
23526c92544dSBjoern A. Zeeb
23536c92544dSBjoern A. Zeeb if (!skb)
23546c92544dSBjoern A. Zeeb break;
23556c92544dSBjoern A. Zeeb
23566c92544dSBjoern A. Zeeb skb_pull(skb, sizeof(struct mt7615_mcu_rxd));
2357cbb3ec25SBjoern A. Zeeb if (!dump || data + skb->len - dump > MT76_CONNAC_COREDUMP_SZ) {
23586c92544dSBjoern A. Zeeb dev_kfree_skb(skb);
23596c92544dSBjoern A. Zeeb continue;
23606c92544dSBjoern A. Zeeb }
23616c92544dSBjoern A. Zeeb
23626c92544dSBjoern A. Zeeb memcpy(data, skb->data, skb->len);
23636c92544dSBjoern A. Zeeb data += skb->len;
23646c92544dSBjoern A. Zeeb
23656c92544dSBjoern A. Zeeb dev_kfree_skb(skb);
23666c92544dSBjoern A. Zeeb }
2367cbb3ec25SBjoern A. Zeeb
2368cbb3ec25SBjoern A. Zeeb if (dump)
23696c92544dSBjoern A. Zeeb dev_coredumpv(dev->mt76.dev, dump, MT76_CONNAC_COREDUMP_SZ,
23706c92544dSBjoern A. Zeeb GFP_KERNEL);
23716c92544dSBjoern A. Zeeb }
2372