16c92544dSBjoern A. Zeeb /* SPDX-License-Identifier: ISC */
26c92544dSBjoern A. Zeeb /* Copyright (C) 2020 MediaTek Inc. */
36c92544dSBjoern A. Zeeb
46c92544dSBjoern A. Zeeb #ifndef __MT76_CONNAC_MCU_H
56c92544dSBjoern A. Zeeb #define __MT76_CONNAC_MCU_H
66c92544dSBjoern A. Zeeb
76c92544dSBjoern A. Zeeb #include "mt76_connac.h"
86c92544dSBjoern A. Zeeb
96c92544dSBjoern A. Zeeb #define FW_FEATURE_SET_ENCRYPT BIT(0)
106c92544dSBjoern A. Zeeb #define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1)
116c92544dSBjoern A. Zeeb #define FW_FEATURE_ENCRY_MODE BIT(4)
126c92544dSBjoern A. Zeeb #define FW_FEATURE_OVERRIDE_ADDR BIT(5)
136c92544dSBjoern A. Zeeb #define FW_FEATURE_NON_DL BIT(6)
146c92544dSBjoern A. Zeeb
156c92544dSBjoern A. Zeeb #define DL_MODE_ENCRYPT BIT(0)
166c92544dSBjoern A. Zeeb #define DL_MODE_KEY_IDX GENMASK(2, 1)
176c92544dSBjoern A. Zeeb #define DL_MODE_RESET_SEC_IV BIT(3)
186c92544dSBjoern A. Zeeb #define DL_MODE_WORKING_PDA_CR4 BIT(4)
196c92544dSBjoern A. Zeeb #define DL_MODE_VALID_RAM_ENTRY BIT(5)
206c92544dSBjoern A. Zeeb #define DL_CONFIG_ENCRY_MODE_SEL BIT(6)
216c92544dSBjoern A. Zeeb #define DL_MODE_NEED_RSP BIT(31)
226c92544dSBjoern A. Zeeb
236c92544dSBjoern A. Zeeb #define FW_START_OVERRIDE BIT(0)
246c92544dSBjoern A. Zeeb #define FW_START_WORKING_PDA_CR4 BIT(2)
25cbb3ec25SBjoern A. Zeeb #define FW_START_WORKING_PDA_DSP BIT(3)
266c92544dSBjoern A. Zeeb
276c92544dSBjoern A. Zeeb #define PATCH_SEC_NOT_SUPPORT GENMASK(31, 0)
286c92544dSBjoern A. Zeeb #define PATCH_SEC_TYPE_MASK GENMASK(15, 0)
296c92544dSBjoern A. Zeeb #define PATCH_SEC_TYPE_INFO 0x2
306c92544dSBjoern A. Zeeb
316c92544dSBjoern A. Zeeb #define PATCH_SEC_ENC_TYPE_MASK GENMASK(31, 24)
326c92544dSBjoern A. Zeeb #define PATCH_SEC_ENC_TYPE_PLAIN 0x00
336c92544dSBjoern A. Zeeb #define PATCH_SEC_ENC_TYPE_AES 0x01
346c92544dSBjoern A. Zeeb #define PATCH_SEC_ENC_TYPE_SCRAMBLE 0x02
356c92544dSBjoern A. Zeeb #define PATCH_SEC_ENC_SCRAMBLE_INFO_MASK GENMASK(15, 0)
366c92544dSBjoern A. Zeeb #define PATCH_SEC_ENC_AES_KEY_MASK GENMASK(7, 0)
376c92544dSBjoern A. Zeeb
386c92544dSBjoern A. Zeeb enum {
396c92544dSBjoern A. Zeeb FW_TYPE_DEFAULT = 0,
406c92544dSBjoern A. Zeeb FW_TYPE_CLC = 2,
416c92544dSBjoern A. Zeeb FW_TYPE_MAX_NUM = 255
426c92544dSBjoern A. Zeeb };
436c92544dSBjoern A. Zeeb
446c92544dSBjoern A. Zeeb #define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10))
456c92544dSBjoern A. Zeeb #define MCU_PKT_ID 0xa0
466c92544dSBjoern A. Zeeb
476c92544dSBjoern A. Zeeb struct mt76_connac2_mcu_txd {
486c92544dSBjoern A. Zeeb __le32 txd[8];
496c92544dSBjoern A. Zeeb
506c92544dSBjoern A. Zeeb __le16 len;
516c92544dSBjoern A. Zeeb __le16 pq_id;
526c92544dSBjoern A. Zeeb
536c92544dSBjoern A. Zeeb u8 cid;
546c92544dSBjoern A. Zeeb u8 pkt_type;
556c92544dSBjoern A. Zeeb u8 set_query; /* FW don't care */
566c92544dSBjoern A. Zeeb u8 seq;
576c92544dSBjoern A. Zeeb
586c92544dSBjoern A. Zeeb u8 uc_d2b0_rev;
596c92544dSBjoern A. Zeeb u8 ext_cid;
606c92544dSBjoern A. Zeeb u8 s2d_index;
616c92544dSBjoern A. Zeeb u8 ext_cid_ack;
626c92544dSBjoern A. Zeeb
636c92544dSBjoern A. Zeeb u32 rsv[5];
646c92544dSBjoern A. Zeeb } __packed __aligned(4);
656c92544dSBjoern A. Zeeb
666c92544dSBjoern A. Zeeb /**
67cbb3ec25SBjoern A. Zeeb * struct mt76_connac2_mcu_uni_txd - mcu command descriptor for connac2 and connac3
686c92544dSBjoern A. Zeeb * @txd: hardware descriptor
696c92544dSBjoern A. Zeeb * @len: total length not including txd
706c92544dSBjoern A. Zeeb * @cid: command identifier
716c92544dSBjoern A. Zeeb * @pkt_type: must be 0xa0 (cmd packet by long format)
726c92544dSBjoern A. Zeeb * @frag_n: fragment number
736c92544dSBjoern A. Zeeb * @seq: sequence number
746c92544dSBjoern A. Zeeb * @checksum: 0 mean there is no checksum
756c92544dSBjoern A. Zeeb * @s2d_index: index for command source and destination
766c92544dSBjoern A. Zeeb * Definition | value | note
776c92544dSBjoern A. Zeeb * CMD_S2D_IDX_H2N | 0x00 | command from HOST to WM
786c92544dSBjoern A. Zeeb * CMD_S2D_IDX_C2N | 0x01 | command from WA to WM
796c92544dSBjoern A. Zeeb * CMD_S2D_IDX_H2C | 0x02 | command from HOST to WA
806c92544dSBjoern A. Zeeb * CMD_S2D_IDX_H2N_AND_H2C | 0x03 | command from HOST to WA and WM
816c92544dSBjoern A. Zeeb *
826c92544dSBjoern A. Zeeb * @option: command option
836c92544dSBjoern A. Zeeb * BIT[0]: UNI_CMD_OPT_BIT_ACK
846c92544dSBjoern A. Zeeb * set to 1 to request a fw reply
856c92544dSBjoern A. Zeeb * if UNI_CMD_OPT_BIT_0_ACK is set and UNI_CMD_OPT_BIT_2_SET_QUERY
866c92544dSBjoern A. Zeeb * is set, mcu firmware will send response event EID = 0x01
876c92544dSBjoern A. Zeeb * (UNI_EVENT_ID_CMD_RESULT) to the host.
886c92544dSBjoern A. Zeeb * BIT[1]: UNI_CMD_OPT_BIT_UNI_CMD
896c92544dSBjoern A. Zeeb * 0: original command
906c92544dSBjoern A. Zeeb * 1: unified command
916c92544dSBjoern A. Zeeb * BIT[2]: UNI_CMD_OPT_BIT_SET_QUERY
926c92544dSBjoern A. Zeeb * 0: QUERY command
936c92544dSBjoern A. Zeeb * 1: SET command
946c92544dSBjoern A. Zeeb */
956c92544dSBjoern A. Zeeb struct mt76_connac2_mcu_uni_txd {
966c92544dSBjoern A. Zeeb __le32 txd[8];
976c92544dSBjoern A. Zeeb
986c92544dSBjoern A. Zeeb /* DW1 */
996c92544dSBjoern A. Zeeb __le16 len;
1006c92544dSBjoern A. Zeeb __le16 cid;
1016c92544dSBjoern A. Zeeb
1026c92544dSBjoern A. Zeeb /* DW2 */
1036c92544dSBjoern A. Zeeb u8 rsv;
1046c92544dSBjoern A. Zeeb u8 pkt_type;
1056c92544dSBjoern A. Zeeb u8 frag_n;
1066c92544dSBjoern A. Zeeb u8 seq;
1076c92544dSBjoern A. Zeeb
1086c92544dSBjoern A. Zeeb /* DW3 */
1096c92544dSBjoern A. Zeeb __le16 checksum;
1106c92544dSBjoern A. Zeeb u8 s2d_index;
1116c92544dSBjoern A. Zeeb u8 option;
1126c92544dSBjoern A. Zeeb
1136c92544dSBjoern A. Zeeb /* DW4 */
1146c92544dSBjoern A. Zeeb u8 rsv1[4];
1156c92544dSBjoern A. Zeeb } __packed __aligned(4);
1166c92544dSBjoern A. Zeeb
1176c92544dSBjoern A. Zeeb struct mt76_connac2_mcu_rxd {
1186c92544dSBjoern A. Zeeb __le32 rxd[6];
1196c92544dSBjoern A. Zeeb
1206c92544dSBjoern A. Zeeb __le16 len;
1216c92544dSBjoern A. Zeeb __le16 pkt_type_id;
1226c92544dSBjoern A. Zeeb
1236c92544dSBjoern A. Zeeb u8 eid;
1246c92544dSBjoern A. Zeeb u8 seq;
125cbb3ec25SBjoern A. Zeeb u8 option;
126cbb3ec25SBjoern A. Zeeb u8 rsv;
1276c92544dSBjoern A. Zeeb u8 ext_eid;
1286c92544dSBjoern A. Zeeb u8 rsv1[2];
1296c92544dSBjoern A. Zeeb u8 s2d_index;
130cbb3ec25SBjoern A. Zeeb
131cbb3ec25SBjoern A. Zeeb #if defined(__linux__)
132cbb3ec25SBjoern A. Zeeb u8 tlv[];
133cbb3ec25SBjoern A. Zeeb #elif defined(__FreeBSD__)
134cbb3ec25SBjoern A. Zeeb u8 tlv[0];
135cbb3ec25SBjoern A. Zeeb #endif
1366c92544dSBjoern A. Zeeb };
1376c92544dSBjoern A. Zeeb
1386c92544dSBjoern A. Zeeb struct mt76_connac2_patch_hdr {
1396c92544dSBjoern A. Zeeb char build_date[16];
1406c92544dSBjoern A. Zeeb char platform[4];
1416c92544dSBjoern A. Zeeb __be32 hw_sw_ver;
1426c92544dSBjoern A. Zeeb __be32 patch_ver;
1436c92544dSBjoern A. Zeeb __be16 checksum;
1446c92544dSBjoern A. Zeeb u16 rsv;
1456c92544dSBjoern A. Zeeb struct {
1466c92544dSBjoern A. Zeeb __be32 patch_ver;
1476c92544dSBjoern A. Zeeb __be32 subsys;
1486c92544dSBjoern A. Zeeb __be32 feature;
1496c92544dSBjoern A. Zeeb __be32 n_region;
1506c92544dSBjoern A. Zeeb __be32 crc;
1516c92544dSBjoern A. Zeeb u32 rsv[11];
1526c92544dSBjoern A. Zeeb } desc;
1536c92544dSBjoern A. Zeeb } __packed;
1546c92544dSBjoern A. Zeeb
1556c92544dSBjoern A. Zeeb struct mt76_connac2_patch_sec {
1566c92544dSBjoern A. Zeeb __be32 type;
1576c92544dSBjoern A. Zeeb __be32 offs;
1586c92544dSBjoern A. Zeeb __be32 size;
1596c92544dSBjoern A. Zeeb union {
1606c92544dSBjoern A. Zeeb __be32 spec[13];
1616c92544dSBjoern A. Zeeb struct {
1626c92544dSBjoern A. Zeeb __be32 addr;
1636c92544dSBjoern A. Zeeb __be32 len;
1646c92544dSBjoern A. Zeeb __be32 sec_key_idx;
1656c92544dSBjoern A. Zeeb __be32 align_len;
1666c92544dSBjoern A. Zeeb u32 rsv[9];
1676c92544dSBjoern A. Zeeb } info;
1686c92544dSBjoern A. Zeeb };
1696c92544dSBjoern A. Zeeb } __packed;
1706c92544dSBjoern A. Zeeb
1716c92544dSBjoern A. Zeeb struct mt76_connac2_fw_trailer {
1726c92544dSBjoern A. Zeeb u8 chip_id;
1736c92544dSBjoern A. Zeeb u8 eco_code;
1746c92544dSBjoern A. Zeeb u8 n_region;
1756c92544dSBjoern A. Zeeb u8 format_ver;
1766c92544dSBjoern A. Zeeb u8 format_flag;
1776c92544dSBjoern A. Zeeb u8 rsv[2];
1786c92544dSBjoern A. Zeeb char fw_ver[10];
1796c92544dSBjoern A. Zeeb char build_date[15];
1806c92544dSBjoern A. Zeeb __le32 crc;
1816c92544dSBjoern A. Zeeb } __packed;
1826c92544dSBjoern A. Zeeb
1836c92544dSBjoern A. Zeeb struct mt76_connac2_fw_region {
1846c92544dSBjoern A. Zeeb __le32 decomp_crc;
1856c92544dSBjoern A. Zeeb __le32 decomp_len;
1866c92544dSBjoern A. Zeeb __le32 decomp_blk_sz;
1876c92544dSBjoern A. Zeeb u8 rsv[4];
1886c92544dSBjoern A. Zeeb __le32 addr;
1896c92544dSBjoern A. Zeeb __le32 len;
1906c92544dSBjoern A. Zeeb u8 feature_set;
1916c92544dSBjoern A. Zeeb u8 type;
1926c92544dSBjoern A. Zeeb u8 rsv1[14];
1936c92544dSBjoern A. Zeeb } __packed;
1946c92544dSBjoern A. Zeeb
1956c92544dSBjoern A. Zeeb struct tlv {
1966c92544dSBjoern A. Zeeb __le16 tag;
1976c92544dSBjoern A. Zeeb __le16 len;
1986c92544dSBjoern A. Zeeb } __packed;
1996c92544dSBjoern A. Zeeb
2006c92544dSBjoern A. Zeeb struct bss_info_omac {
2016c92544dSBjoern A. Zeeb __le16 tag;
2026c92544dSBjoern A. Zeeb __le16 len;
2036c92544dSBjoern A. Zeeb u8 hw_bss_idx;
2046c92544dSBjoern A. Zeeb u8 omac_idx;
2056c92544dSBjoern A. Zeeb u8 band_idx;
2066c92544dSBjoern A. Zeeb u8 rsv0;
2076c92544dSBjoern A. Zeeb __le32 conn_type;
2086c92544dSBjoern A. Zeeb u32 rsv1;
2096c92544dSBjoern A. Zeeb } __packed;
2106c92544dSBjoern A. Zeeb
2116c92544dSBjoern A. Zeeb struct bss_info_basic {
2126c92544dSBjoern A. Zeeb __le16 tag;
2136c92544dSBjoern A. Zeeb __le16 len;
2146c92544dSBjoern A. Zeeb __le32 network_type;
2156c92544dSBjoern A. Zeeb u8 active;
2166c92544dSBjoern A. Zeeb u8 rsv0;
2176c92544dSBjoern A. Zeeb __le16 bcn_interval;
2186c92544dSBjoern A. Zeeb u8 bssid[ETH_ALEN];
2196c92544dSBjoern A. Zeeb u8 wmm_idx;
2206c92544dSBjoern A. Zeeb u8 dtim_period;
2216c92544dSBjoern A. Zeeb u8 bmc_wcid_lo;
2226c92544dSBjoern A. Zeeb u8 cipher;
2236c92544dSBjoern A. Zeeb u8 phy_mode;
2246c92544dSBjoern A. Zeeb u8 max_bssid; /* max BSSID. range: 1 ~ 8, 0: MBSSID disabled */
2256c92544dSBjoern A. Zeeb u8 non_tx_bssid;/* non-transmitted BSSID, 0: transmitted BSSID */
2266c92544dSBjoern A. Zeeb u8 bmc_wcid_hi; /* high Byte and version */
2276c92544dSBjoern A. Zeeb u8 rsv[2];
2286c92544dSBjoern A. Zeeb } __packed;
2296c92544dSBjoern A. Zeeb
2306c92544dSBjoern A. Zeeb struct bss_info_rf_ch {
2316c92544dSBjoern A. Zeeb __le16 tag;
2326c92544dSBjoern A. Zeeb __le16 len;
2336c92544dSBjoern A. Zeeb u8 pri_ch;
2346c92544dSBjoern A. Zeeb u8 center_ch0;
2356c92544dSBjoern A. Zeeb u8 center_ch1;
2366c92544dSBjoern A. Zeeb u8 bw;
2376c92544dSBjoern A. Zeeb u8 he_ru26_block; /* 1: don't send HETB in RU26, 0: allow */
2386c92544dSBjoern A. Zeeb u8 he_all_disable; /* 1: disallow all HETB, 0: allow */
2396c92544dSBjoern A. Zeeb u8 rsv[2];
2406c92544dSBjoern A. Zeeb } __packed;
2416c92544dSBjoern A. Zeeb
2426c92544dSBjoern A. Zeeb struct bss_info_ext_bss {
2436c92544dSBjoern A. Zeeb __le16 tag;
2446c92544dSBjoern A. Zeeb __le16 len;
2456c92544dSBjoern A. Zeeb __le32 mbss_tsf_offset; /* in unit of us */
2466c92544dSBjoern A. Zeeb u8 rsv[8];
2476c92544dSBjoern A. Zeeb } __packed;
2486c92544dSBjoern A. Zeeb
2496c92544dSBjoern A. Zeeb enum {
2506c92544dSBjoern A. Zeeb BSS_INFO_OMAC,
2516c92544dSBjoern A. Zeeb BSS_INFO_BASIC,
2526c92544dSBjoern A. Zeeb BSS_INFO_RF_CH, /* optional, for BT/LTE coex */
2536c92544dSBjoern A. Zeeb BSS_INFO_PM, /* sta only */
2546c92544dSBjoern A. Zeeb BSS_INFO_UAPSD, /* sta only */
2556c92544dSBjoern A. Zeeb BSS_INFO_ROAM_DETECT, /* obsoleted */
2566c92544dSBjoern A. Zeeb BSS_INFO_LQ_RM, /* obsoleted */
2576c92544dSBjoern A. Zeeb BSS_INFO_EXT_BSS,
2586c92544dSBjoern A. Zeeb BSS_INFO_BMC_RATE, /* for bmc rate control in CR4 */
2596c92544dSBjoern A. Zeeb BSS_INFO_SYNC_MODE, /* obsoleted */
2606c92544dSBjoern A. Zeeb BSS_INFO_RA,
2616c92544dSBjoern A. Zeeb BSS_INFO_HW_AMSDU,
2626c92544dSBjoern A. Zeeb BSS_INFO_BSS_COLOR,
2636c92544dSBjoern A. Zeeb BSS_INFO_HE_BASIC,
2646c92544dSBjoern A. Zeeb BSS_INFO_PROTECT_INFO,
2656c92544dSBjoern A. Zeeb BSS_INFO_OFFLOAD,
2666c92544dSBjoern A. Zeeb BSS_INFO_11V_MBSSID,
2676c92544dSBjoern A. Zeeb BSS_INFO_MAX_NUM
2686c92544dSBjoern A. Zeeb };
2696c92544dSBjoern A. Zeeb
2706c92544dSBjoern A. Zeeb /* sta_rec */
2716c92544dSBjoern A. Zeeb
2726c92544dSBjoern A. Zeeb struct sta_ntlv_hdr {
2736c92544dSBjoern A. Zeeb u8 rsv[2];
2746c92544dSBjoern A. Zeeb __le16 tlv_num;
2756c92544dSBjoern A. Zeeb } __packed;
2766c92544dSBjoern A. Zeeb
2776c92544dSBjoern A. Zeeb struct sta_req_hdr {
2786c92544dSBjoern A. Zeeb u8 bss_idx;
2796c92544dSBjoern A. Zeeb u8 wlan_idx_lo;
2806c92544dSBjoern A. Zeeb __le16 tlv_num;
2816c92544dSBjoern A. Zeeb u8 is_tlv_append;
2826c92544dSBjoern A. Zeeb u8 muar_idx;
2836c92544dSBjoern A. Zeeb u8 wlan_idx_hi;
2846c92544dSBjoern A. Zeeb u8 rsv;
2856c92544dSBjoern A. Zeeb } __packed;
2866c92544dSBjoern A. Zeeb
2876c92544dSBjoern A. Zeeb struct sta_rec_basic {
2886c92544dSBjoern A. Zeeb __le16 tag;
2896c92544dSBjoern A. Zeeb __le16 len;
2906c92544dSBjoern A. Zeeb __le32 conn_type;
2916c92544dSBjoern A. Zeeb u8 conn_state;
2926c92544dSBjoern A. Zeeb u8 qos;
2936c92544dSBjoern A. Zeeb __le16 aid;
2946c92544dSBjoern A. Zeeb u8 peer_addr[ETH_ALEN];
2956c92544dSBjoern A. Zeeb #define EXTRA_INFO_VER BIT(0)
2966c92544dSBjoern A. Zeeb #define EXTRA_INFO_NEW BIT(1)
2976c92544dSBjoern A. Zeeb __le16 extra_info;
2986c92544dSBjoern A. Zeeb } __packed;
2996c92544dSBjoern A. Zeeb
3006c92544dSBjoern A. Zeeb struct sta_rec_ht {
3016c92544dSBjoern A. Zeeb __le16 tag;
3026c92544dSBjoern A. Zeeb __le16 len;
3036c92544dSBjoern A. Zeeb __le16 ht_cap;
3046c92544dSBjoern A. Zeeb u16 rsv;
3056c92544dSBjoern A. Zeeb } __packed;
3066c92544dSBjoern A. Zeeb
3076c92544dSBjoern A. Zeeb struct sta_rec_vht {
3086c92544dSBjoern A. Zeeb __le16 tag;
3096c92544dSBjoern A. Zeeb __le16 len;
3106c92544dSBjoern A. Zeeb __le32 vht_cap;
3116c92544dSBjoern A. Zeeb __le16 vht_rx_mcs_map;
3126c92544dSBjoern A. Zeeb __le16 vht_tx_mcs_map;
3136c92544dSBjoern A. Zeeb /* mt7915 - mt7921 */
3146c92544dSBjoern A. Zeeb u8 rts_bw_sig;
3156c92544dSBjoern A. Zeeb u8 rsv[3];
3166c92544dSBjoern A. Zeeb } __packed;
3176c92544dSBjoern A. Zeeb
3186c92544dSBjoern A. Zeeb struct sta_rec_uapsd {
3196c92544dSBjoern A. Zeeb __le16 tag;
3206c92544dSBjoern A. Zeeb __le16 len;
3216c92544dSBjoern A. Zeeb u8 dac_map;
3226c92544dSBjoern A. Zeeb u8 tac_map;
3236c92544dSBjoern A. Zeeb u8 max_sp;
3246c92544dSBjoern A. Zeeb u8 rsv0;
3256c92544dSBjoern A. Zeeb __le16 listen_interval;
3266c92544dSBjoern A. Zeeb u8 rsv1[2];
3276c92544dSBjoern A. Zeeb } __packed;
3286c92544dSBjoern A. Zeeb
3296c92544dSBjoern A. Zeeb struct sta_rec_ba {
3306c92544dSBjoern A. Zeeb __le16 tag;
3316c92544dSBjoern A. Zeeb __le16 len;
3326c92544dSBjoern A. Zeeb u8 tid;
3336c92544dSBjoern A. Zeeb u8 ba_type;
3346c92544dSBjoern A. Zeeb u8 amsdu;
3356c92544dSBjoern A. Zeeb u8 ba_en;
3366c92544dSBjoern A. Zeeb __le16 ssn;
3376c92544dSBjoern A. Zeeb __le16 winsize;
3386c92544dSBjoern A. Zeeb } __packed;
3396c92544dSBjoern A. Zeeb
3406c92544dSBjoern A. Zeeb struct sta_rec_he {
3416c92544dSBjoern A. Zeeb __le16 tag;
3426c92544dSBjoern A. Zeeb __le16 len;
3436c92544dSBjoern A. Zeeb
3446c92544dSBjoern A. Zeeb __le32 he_cap;
3456c92544dSBjoern A. Zeeb
3466c92544dSBjoern A. Zeeb u8 t_frame_dur;
3476c92544dSBjoern A. Zeeb u8 max_ampdu_exp;
3486c92544dSBjoern A. Zeeb u8 bw_set;
3496c92544dSBjoern A. Zeeb u8 device_class;
3506c92544dSBjoern A. Zeeb u8 dcm_tx_mode;
3516c92544dSBjoern A. Zeeb u8 dcm_tx_max_nss;
3526c92544dSBjoern A. Zeeb u8 dcm_rx_mode;
3536c92544dSBjoern A. Zeeb u8 dcm_rx_max_nss;
3546c92544dSBjoern A. Zeeb u8 dcm_max_ru;
3556c92544dSBjoern A. Zeeb u8 punc_pream_rx;
3566c92544dSBjoern A. Zeeb u8 pkt_ext;
3576c92544dSBjoern A. Zeeb u8 rsv1;
3586c92544dSBjoern A. Zeeb
3596c92544dSBjoern A. Zeeb __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM];
3606c92544dSBjoern A. Zeeb
3616c92544dSBjoern A. Zeeb u8 rsv2[2];
3626c92544dSBjoern A. Zeeb } __packed;
3636c92544dSBjoern A. Zeeb
364cbb3ec25SBjoern A. Zeeb struct sta_rec_he_v2 {
365cbb3ec25SBjoern A. Zeeb __le16 tag;
366cbb3ec25SBjoern A. Zeeb __le16 len;
367cbb3ec25SBjoern A. Zeeb u8 he_mac_cap[6];
368cbb3ec25SBjoern A. Zeeb u8 he_phy_cap[11];
369cbb3ec25SBjoern A. Zeeb u8 pkt_ext;
370cbb3ec25SBjoern A. Zeeb /* 0: BW80, 1: BW160, 2: BW8080 */
371cbb3ec25SBjoern A. Zeeb __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM];
372cbb3ec25SBjoern A. Zeeb } __packed;
373cbb3ec25SBjoern A. Zeeb
3746c92544dSBjoern A. Zeeb struct sta_rec_amsdu {
3756c92544dSBjoern A. Zeeb __le16 tag;
3766c92544dSBjoern A. Zeeb __le16 len;
3776c92544dSBjoern A. Zeeb u8 max_amsdu_num;
3786c92544dSBjoern A. Zeeb u8 max_mpdu_size;
3796c92544dSBjoern A. Zeeb u8 amsdu_en;
3806c92544dSBjoern A. Zeeb u8 rsv;
3816c92544dSBjoern A. Zeeb } __packed;
3826c92544dSBjoern A. Zeeb
3836c92544dSBjoern A. Zeeb struct sta_rec_state {
3846c92544dSBjoern A. Zeeb __le16 tag;
3856c92544dSBjoern A. Zeeb __le16 len;
3866c92544dSBjoern A. Zeeb __le32 flags;
3876c92544dSBjoern A. Zeeb u8 state;
3886c92544dSBjoern A. Zeeb u8 vht_opmode;
3896c92544dSBjoern A. Zeeb u8 action;
3906c92544dSBjoern A. Zeeb u8 rsv[1];
3916c92544dSBjoern A. Zeeb } __packed;
3926c92544dSBjoern A. Zeeb
3936c92544dSBjoern A. Zeeb #define RA_LEGACY_OFDM GENMASK(13, 6)
3946c92544dSBjoern A. Zeeb #define RA_LEGACY_CCK GENMASK(3, 0)
3956c92544dSBjoern A. Zeeb #define HT_MCS_MASK_NUM 10
3966c92544dSBjoern A. Zeeb struct sta_rec_ra_info {
3976c92544dSBjoern A. Zeeb __le16 tag;
3986c92544dSBjoern A. Zeeb __le16 len;
3996c92544dSBjoern A. Zeeb __le16 legacy;
4006c92544dSBjoern A. Zeeb u8 rx_mcs_bitmask[HT_MCS_MASK_NUM];
4016c92544dSBjoern A. Zeeb } __packed;
4026c92544dSBjoern A. Zeeb
4036c92544dSBjoern A. Zeeb struct sta_rec_phy {
4046c92544dSBjoern A. Zeeb __le16 tag;
4056c92544dSBjoern A. Zeeb __le16 len;
4066c92544dSBjoern A. Zeeb __le16 basic_rate;
4076c92544dSBjoern A. Zeeb u8 phy_type;
4086c92544dSBjoern A. Zeeb u8 ampdu;
4096c92544dSBjoern A. Zeeb u8 rts_policy;
4106c92544dSBjoern A. Zeeb u8 rcpi;
411cbb3ec25SBjoern A. Zeeb u8 max_ampdu_len; /* connac3 */
412cbb3ec25SBjoern A. Zeeb u8 rsv[1];
4136c92544dSBjoern A. Zeeb } __packed;
4146c92544dSBjoern A. Zeeb
4156c92544dSBjoern A. Zeeb struct sta_rec_he_6g_capa {
4166c92544dSBjoern A. Zeeb __le16 tag;
4176c92544dSBjoern A. Zeeb __le16 len;
4186c92544dSBjoern A. Zeeb __le16 capa;
4196c92544dSBjoern A. Zeeb u8 rsv[2];
4206c92544dSBjoern A. Zeeb } __packed;
4216c92544dSBjoern A. Zeeb
4226c92544dSBjoern A. Zeeb struct sec_key {
4236c92544dSBjoern A. Zeeb u8 cipher_id;
4246c92544dSBjoern A. Zeeb u8 cipher_len;
4256c92544dSBjoern A. Zeeb u8 key_id;
4266c92544dSBjoern A. Zeeb u8 key_len;
4276c92544dSBjoern A. Zeeb u8 key[32];
4286c92544dSBjoern A. Zeeb } __packed;
4296c92544dSBjoern A. Zeeb
4306c92544dSBjoern A. Zeeb struct sta_rec_sec {
4316c92544dSBjoern A. Zeeb __le16 tag;
4326c92544dSBjoern A. Zeeb __le16 len;
4336c92544dSBjoern A. Zeeb u8 add;
4346c92544dSBjoern A. Zeeb u8 n_cipher;
4356c92544dSBjoern A. Zeeb u8 rsv[2];
4366c92544dSBjoern A. Zeeb
4376c92544dSBjoern A. Zeeb struct sec_key key[2];
4386c92544dSBjoern A. Zeeb } __packed;
4396c92544dSBjoern A. Zeeb
4406c92544dSBjoern A. Zeeb struct sta_rec_bf {
4416c92544dSBjoern A. Zeeb __le16 tag;
4426c92544dSBjoern A. Zeeb __le16 len;
4436c92544dSBjoern A. Zeeb
4446c92544dSBjoern A. Zeeb __le16 pfmu; /* 0xffff: no access right for PFMU */
4456c92544dSBjoern A. Zeeb bool su_mu; /* 0: SU, 1: MU */
4466c92544dSBjoern A. Zeeb u8 bf_cap; /* 0: iBF, 1: eBF */
4476c92544dSBjoern A. Zeeb u8 sounding_phy; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT */
4486c92544dSBjoern A. Zeeb u8 ndpa_rate;
4496c92544dSBjoern A. Zeeb u8 ndp_rate;
4506c92544dSBjoern A. Zeeb u8 rept_poll_rate;
4516c92544dSBjoern A. Zeeb u8 tx_mode; /* 0: legacy, 1: OFDM, 2: HT, 4: VHT ... */
4526c92544dSBjoern A. Zeeb u8 ncol;
4536c92544dSBjoern A. Zeeb u8 nrow;
4546c92544dSBjoern A. Zeeb u8 bw; /* 0: 20M, 1: 40M, 2: 80M, 3: 160M */
4556c92544dSBjoern A. Zeeb
4566c92544dSBjoern A. Zeeb u8 mem_total;
4576c92544dSBjoern A. Zeeb u8 mem_20m;
4586c92544dSBjoern A. Zeeb struct {
4596c92544dSBjoern A. Zeeb u8 row;
4606c92544dSBjoern A. Zeeb u8 col: 6, row_msb: 2;
4616c92544dSBjoern A. Zeeb } mem[4];
4626c92544dSBjoern A. Zeeb
4636c92544dSBjoern A. Zeeb __le16 smart_ant;
4646c92544dSBjoern A. Zeeb u8 se_idx;
4656c92544dSBjoern A. Zeeb u8 auto_sounding; /* b7: low traffic indicator
4666c92544dSBjoern A. Zeeb * b6: Stop sounding for this entry
4676c92544dSBjoern A. Zeeb * b5 ~ b0: postpone sounding
4686c92544dSBjoern A. Zeeb */
4696c92544dSBjoern A. Zeeb u8 ibf_timeout;
4706c92544dSBjoern A. Zeeb u8 ibf_dbw;
4716c92544dSBjoern A. Zeeb u8 ibf_ncol;
4726c92544dSBjoern A. Zeeb u8 ibf_nrow;
473cbb3ec25SBjoern A. Zeeb u8 nrow_gt_bw80;
474cbb3ec25SBjoern A. Zeeb u8 ncol_gt_bw80;
4756c92544dSBjoern A. Zeeb u8 ru_start_idx;
4766c92544dSBjoern A. Zeeb u8 ru_end_idx;
4776c92544dSBjoern A. Zeeb
4786c92544dSBjoern A. Zeeb bool trigger_su;
4796c92544dSBjoern A. Zeeb bool trigger_mu;
4806c92544dSBjoern A. Zeeb bool ng16_su;
4816c92544dSBjoern A. Zeeb bool ng16_mu;
4826c92544dSBjoern A. Zeeb bool codebook42_su;
4836c92544dSBjoern A. Zeeb bool codebook75_mu;
4846c92544dSBjoern A. Zeeb
4856c92544dSBjoern A. Zeeb u8 he_ltf;
4866c92544dSBjoern A. Zeeb u8 rsv[3];
4876c92544dSBjoern A. Zeeb } __packed;
4886c92544dSBjoern A. Zeeb
4896c92544dSBjoern A. Zeeb struct sta_rec_bfee {
4906c92544dSBjoern A. Zeeb __le16 tag;
4916c92544dSBjoern A. Zeeb __le16 len;
4926c92544dSBjoern A. Zeeb bool fb_identity_matrix; /* 1: feedback identity matrix */
4936c92544dSBjoern A. Zeeb bool ignore_feedback; /* 1: ignore */
4946c92544dSBjoern A. Zeeb u8 rsv[2];
4956c92544dSBjoern A. Zeeb } __packed;
4966c92544dSBjoern A. Zeeb
4976c92544dSBjoern A. Zeeb struct sta_rec_muru {
4986c92544dSBjoern A. Zeeb __le16 tag;
4996c92544dSBjoern A. Zeeb __le16 len;
5006c92544dSBjoern A. Zeeb
5016c92544dSBjoern A. Zeeb struct {
5026c92544dSBjoern A. Zeeb bool ofdma_dl_en;
5036c92544dSBjoern A. Zeeb bool ofdma_ul_en;
5046c92544dSBjoern A. Zeeb bool mimo_dl_en;
5056c92544dSBjoern A. Zeeb bool mimo_ul_en;
5066c92544dSBjoern A. Zeeb u8 rsv[4];
5076c92544dSBjoern A. Zeeb } cfg;
5086c92544dSBjoern A. Zeeb
5096c92544dSBjoern A. Zeeb struct {
5106c92544dSBjoern A. Zeeb u8 punc_pream_rx;
5116c92544dSBjoern A. Zeeb bool he_20m_in_40m_2g;
5126c92544dSBjoern A. Zeeb bool he_20m_in_160m;
5136c92544dSBjoern A. Zeeb bool he_80m_in_160m;
5146c92544dSBjoern A. Zeeb bool lt16_sigb;
5156c92544dSBjoern A. Zeeb bool rx_su_comp_sigb;
5166c92544dSBjoern A. Zeeb bool rx_su_non_comp_sigb;
5176c92544dSBjoern A. Zeeb u8 rsv;
5186c92544dSBjoern A. Zeeb } ofdma_dl;
5196c92544dSBjoern A. Zeeb
5206c92544dSBjoern A. Zeeb struct {
5216c92544dSBjoern A. Zeeb u8 t_frame_dur;
5226c92544dSBjoern A. Zeeb u8 mu_cascading;
5236c92544dSBjoern A. Zeeb u8 uo_ra;
5246c92544dSBjoern A. Zeeb u8 he_2x996_tone;
5256c92544dSBjoern A. Zeeb u8 rx_t_frame_11ac;
526cbb3ec25SBjoern A. Zeeb u8 rx_ctrl_frame_to_mbss;
527cbb3ec25SBjoern A. Zeeb u8 rsv[2];
5286c92544dSBjoern A. Zeeb } ofdma_ul;
5296c92544dSBjoern A. Zeeb
5306c92544dSBjoern A. Zeeb struct {
5316c92544dSBjoern A. Zeeb bool vht_mu_bfee;
5326c92544dSBjoern A. Zeeb bool partial_bw_dl_mimo;
5336c92544dSBjoern A. Zeeb u8 rsv[2];
5346c92544dSBjoern A. Zeeb } mimo_dl;
5356c92544dSBjoern A. Zeeb
5366c92544dSBjoern A. Zeeb struct {
5376c92544dSBjoern A. Zeeb bool full_ul_mimo;
5386c92544dSBjoern A. Zeeb bool partial_ul_mimo;
5396c92544dSBjoern A. Zeeb u8 rsv[2];
5406c92544dSBjoern A. Zeeb } mimo_ul;
5416c92544dSBjoern A. Zeeb } __packed;
5426c92544dSBjoern A. Zeeb
5436c92544dSBjoern A. Zeeb struct sta_phy {
5446c92544dSBjoern A. Zeeb u8 type;
5456c92544dSBjoern A. Zeeb u8 flag;
5466c92544dSBjoern A. Zeeb u8 stbc;
5476c92544dSBjoern A. Zeeb u8 sgi;
5486c92544dSBjoern A. Zeeb u8 bw;
5496c92544dSBjoern A. Zeeb u8 ldpc;
5506c92544dSBjoern A. Zeeb u8 mcs;
5516c92544dSBjoern A. Zeeb u8 nss;
5526c92544dSBjoern A. Zeeb u8 he_ltf;
5536c92544dSBjoern A. Zeeb };
5546c92544dSBjoern A. Zeeb
5556c92544dSBjoern A. Zeeb struct sta_rec_ra {
5566c92544dSBjoern A. Zeeb __le16 tag;
5576c92544dSBjoern A. Zeeb __le16 len;
5586c92544dSBjoern A. Zeeb
5596c92544dSBjoern A. Zeeb u8 valid;
5606c92544dSBjoern A. Zeeb u8 auto_rate;
5616c92544dSBjoern A. Zeeb u8 phy_mode;
5626c92544dSBjoern A. Zeeb u8 channel;
5636c92544dSBjoern A. Zeeb u8 bw;
5646c92544dSBjoern A. Zeeb u8 disable_cck;
5656c92544dSBjoern A. Zeeb u8 ht_mcs32;
5666c92544dSBjoern A. Zeeb u8 ht_gf;
5676c92544dSBjoern A. Zeeb u8 ht_mcs[4];
5686c92544dSBjoern A. Zeeb u8 mmps_mode;
5696c92544dSBjoern A. Zeeb u8 gband_256;
5706c92544dSBjoern A. Zeeb u8 af;
5716c92544dSBjoern A. Zeeb u8 auth_wapi_mode;
5726c92544dSBjoern A. Zeeb u8 rate_len;
5736c92544dSBjoern A. Zeeb
5746c92544dSBjoern A. Zeeb u8 supp_mode;
5756c92544dSBjoern A. Zeeb u8 supp_cck_rate;
5766c92544dSBjoern A. Zeeb u8 supp_ofdm_rate;
5776c92544dSBjoern A. Zeeb __le32 supp_ht_mcs;
5786c92544dSBjoern A. Zeeb __le16 supp_vht_mcs[4];
5796c92544dSBjoern A. Zeeb
5806c92544dSBjoern A. Zeeb u8 op_mode;
5816c92544dSBjoern A. Zeeb u8 op_vht_chan_width;
5826c92544dSBjoern A. Zeeb u8 op_vht_rx_nss;
5836c92544dSBjoern A. Zeeb u8 op_vht_rx_nss_type;
5846c92544dSBjoern A. Zeeb
5856c92544dSBjoern A. Zeeb __le32 sta_cap;
5866c92544dSBjoern A. Zeeb
5876c92544dSBjoern A. Zeeb struct sta_phy phy;
5886c92544dSBjoern A. Zeeb } __packed;
5896c92544dSBjoern A. Zeeb
5906c92544dSBjoern A. Zeeb struct sta_rec_ra_fixed {
5916c92544dSBjoern A. Zeeb __le16 tag;
5926c92544dSBjoern A. Zeeb __le16 len;
5936c92544dSBjoern A. Zeeb
5946c92544dSBjoern A. Zeeb __le32 field;
5956c92544dSBjoern A. Zeeb u8 op_mode;
5966c92544dSBjoern A. Zeeb u8 op_vht_chan_width;
5976c92544dSBjoern A. Zeeb u8 op_vht_rx_nss;
5986c92544dSBjoern A. Zeeb u8 op_vht_rx_nss_type;
5996c92544dSBjoern A. Zeeb
6006c92544dSBjoern A. Zeeb struct sta_phy phy;
6016c92544dSBjoern A. Zeeb
602cbb3ec25SBjoern A. Zeeb u8 spe_idx;
6036c92544dSBjoern A. Zeeb u8 short_preamble;
6046c92544dSBjoern A. Zeeb u8 is_5g;
6056c92544dSBjoern A. Zeeb u8 mmps_mode;
6066c92544dSBjoern A. Zeeb } __packed;
6076c92544dSBjoern A. Zeeb
6086c92544dSBjoern A. Zeeb /* wtbl_rec */
6096c92544dSBjoern A. Zeeb
6106c92544dSBjoern A. Zeeb struct wtbl_req_hdr {
6116c92544dSBjoern A. Zeeb u8 wlan_idx_lo;
6126c92544dSBjoern A. Zeeb u8 operation;
6136c92544dSBjoern A. Zeeb __le16 tlv_num;
6146c92544dSBjoern A. Zeeb u8 wlan_idx_hi;
6156c92544dSBjoern A. Zeeb u8 rsv[3];
6166c92544dSBjoern A. Zeeb } __packed;
6176c92544dSBjoern A. Zeeb
6186c92544dSBjoern A. Zeeb struct wtbl_generic {
6196c92544dSBjoern A. Zeeb __le16 tag;
6206c92544dSBjoern A. Zeeb __le16 len;
6216c92544dSBjoern A. Zeeb u8 peer_addr[ETH_ALEN];
6226c92544dSBjoern A. Zeeb u8 muar_idx;
6236c92544dSBjoern A. Zeeb u8 skip_tx;
6246c92544dSBjoern A. Zeeb u8 cf_ack;
6256c92544dSBjoern A. Zeeb u8 qos;
6266c92544dSBjoern A. Zeeb u8 mesh;
6276c92544dSBjoern A. Zeeb u8 adm;
6286c92544dSBjoern A. Zeeb __le16 partial_aid;
6296c92544dSBjoern A. Zeeb u8 baf_en;
6306c92544dSBjoern A. Zeeb u8 aad_om;
6316c92544dSBjoern A. Zeeb } __packed;
6326c92544dSBjoern A. Zeeb
6336c92544dSBjoern A. Zeeb struct wtbl_rx {
6346c92544dSBjoern A. Zeeb __le16 tag;
6356c92544dSBjoern A. Zeeb __le16 len;
6366c92544dSBjoern A. Zeeb u8 rcid;
6376c92544dSBjoern A. Zeeb u8 rca1;
6386c92544dSBjoern A. Zeeb u8 rca2;
6396c92544dSBjoern A. Zeeb u8 rv;
6406c92544dSBjoern A. Zeeb u8 rsv[4];
6416c92544dSBjoern A. Zeeb } __packed;
6426c92544dSBjoern A. Zeeb
6436c92544dSBjoern A. Zeeb struct wtbl_ht {
6446c92544dSBjoern A. Zeeb __le16 tag;
6456c92544dSBjoern A. Zeeb __le16 len;
6466c92544dSBjoern A. Zeeb u8 ht;
6476c92544dSBjoern A. Zeeb u8 ldpc;
6486c92544dSBjoern A. Zeeb u8 af;
6496c92544dSBjoern A. Zeeb u8 mm;
6506c92544dSBjoern A. Zeeb u8 rsv[4];
6516c92544dSBjoern A. Zeeb } __packed;
6526c92544dSBjoern A. Zeeb
6536c92544dSBjoern A. Zeeb struct wtbl_vht {
6546c92544dSBjoern A. Zeeb __le16 tag;
6556c92544dSBjoern A. Zeeb __le16 len;
6566c92544dSBjoern A. Zeeb u8 ldpc;
6576c92544dSBjoern A. Zeeb u8 dyn_bw;
6586c92544dSBjoern A. Zeeb u8 vht;
6596c92544dSBjoern A. Zeeb u8 txop_ps;
6606c92544dSBjoern A. Zeeb u8 rsv[4];
6616c92544dSBjoern A. Zeeb } __packed;
6626c92544dSBjoern A. Zeeb
6636c92544dSBjoern A. Zeeb struct wtbl_tx_ps {
6646c92544dSBjoern A. Zeeb __le16 tag;
6656c92544dSBjoern A. Zeeb __le16 len;
6666c92544dSBjoern A. Zeeb u8 txps;
6676c92544dSBjoern A. Zeeb u8 rsv[3];
6686c92544dSBjoern A. Zeeb } __packed;
6696c92544dSBjoern A. Zeeb
6706c92544dSBjoern A. Zeeb struct wtbl_hdr_trans {
6716c92544dSBjoern A. Zeeb __le16 tag;
6726c92544dSBjoern A. Zeeb __le16 len;
6736c92544dSBjoern A. Zeeb u8 to_ds;
6746c92544dSBjoern A. Zeeb u8 from_ds;
6756c92544dSBjoern A. Zeeb u8 no_rx_trans;
6766c92544dSBjoern A. Zeeb u8 rsv;
6776c92544dSBjoern A. Zeeb } __packed;
6786c92544dSBjoern A. Zeeb
6796c92544dSBjoern A. Zeeb struct wtbl_ba {
6806c92544dSBjoern A. Zeeb __le16 tag;
6816c92544dSBjoern A. Zeeb __le16 len;
6826c92544dSBjoern A. Zeeb /* common */
6836c92544dSBjoern A. Zeeb u8 tid;
6846c92544dSBjoern A. Zeeb u8 ba_type;
6856c92544dSBjoern A. Zeeb u8 rsv0[2];
6866c92544dSBjoern A. Zeeb /* originator only */
6876c92544dSBjoern A. Zeeb __le16 sn;
6886c92544dSBjoern A. Zeeb u8 ba_en;
6896c92544dSBjoern A. Zeeb u8 ba_winsize_idx;
6906c92544dSBjoern A. Zeeb /* originator & recipient */
6916c92544dSBjoern A. Zeeb __le16 ba_winsize;
6926c92544dSBjoern A. Zeeb /* recipient only */
6936c92544dSBjoern A. Zeeb u8 peer_addr[ETH_ALEN];
6946c92544dSBjoern A. Zeeb u8 rst_ba_tid;
6956c92544dSBjoern A. Zeeb u8 rst_ba_sel;
6966c92544dSBjoern A. Zeeb u8 rst_ba_sb;
6976c92544dSBjoern A. Zeeb u8 band_idx;
6986c92544dSBjoern A. Zeeb u8 rsv1[4];
6996c92544dSBjoern A. Zeeb } __packed;
7006c92544dSBjoern A. Zeeb
7016c92544dSBjoern A. Zeeb struct wtbl_smps {
7026c92544dSBjoern A. Zeeb __le16 tag;
7036c92544dSBjoern A. Zeeb __le16 len;
7046c92544dSBjoern A. Zeeb u8 smps;
7056c92544dSBjoern A. Zeeb u8 rsv[3];
7066c92544dSBjoern A. Zeeb } __packed;
7076c92544dSBjoern A. Zeeb
7086c92544dSBjoern A. Zeeb /* mt7615 only */
7096c92544dSBjoern A. Zeeb
7106c92544dSBjoern A. Zeeb struct wtbl_bf {
7116c92544dSBjoern A. Zeeb __le16 tag;
7126c92544dSBjoern A. Zeeb __le16 len;
7136c92544dSBjoern A. Zeeb u8 ibf;
7146c92544dSBjoern A. Zeeb u8 ebf;
7156c92544dSBjoern A. Zeeb u8 ibf_vht;
7166c92544dSBjoern A. Zeeb u8 ebf_vht;
7176c92544dSBjoern A. Zeeb u8 gid;
7186c92544dSBjoern A. Zeeb u8 pfmu_idx;
7196c92544dSBjoern A. Zeeb u8 rsv[2];
7206c92544dSBjoern A. Zeeb } __packed;
7216c92544dSBjoern A. Zeeb
7226c92544dSBjoern A. Zeeb struct wtbl_pn {
7236c92544dSBjoern A. Zeeb __le16 tag;
7246c92544dSBjoern A. Zeeb __le16 len;
7256c92544dSBjoern A. Zeeb u8 pn[6];
7266c92544dSBjoern A. Zeeb u8 rsv[2];
7276c92544dSBjoern A. Zeeb } __packed;
7286c92544dSBjoern A. Zeeb
7296c92544dSBjoern A. Zeeb struct wtbl_spe {
7306c92544dSBjoern A. Zeeb __le16 tag;
7316c92544dSBjoern A. Zeeb __le16 len;
7326c92544dSBjoern A. Zeeb u8 spe_idx;
7336c92544dSBjoern A. Zeeb u8 rsv[3];
7346c92544dSBjoern A. Zeeb } __packed;
7356c92544dSBjoern A. Zeeb
7366c92544dSBjoern A. Zeeb struct wtbl_raw {
7376c92544dSBjoern A. Zeeb __le16 tag;
7386c92544dSBjoern A. Zeeb __le16 len;
7396c92544dSBjoern A. Zeeb u8 wtbl_idx;
7406c92544dSBjoern A. Zeeb u8 dw;
7416c92544dSBjoern A. Zeeb u8 rsv[2];
7426c92544dSBjoern A. Zeeb __le32 msk;
7436c92544dSBjoern A. Zeeb __le32 val;
7446c92544dSBjoern A. Zeeb } __packed;
7456c92544dSBjoern A. Zeeb
7466c92544dSBjoern A. Zeeb #define MT76_CONNAC_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \
7476c92544dSBjoern A. Zeeb sizeof(struct wtbl_generic) + \
7486c92544dSBjoern A. Zeeb sizeof(struct wtbl_rx) + \
7496c92544dSBjoern A. Zeeb sizeof(struct wtbl_ht) + \
7506c92544dSBjoern A. Zeeb sizeof(struct wtbl_vht) + \
7516c92544dSBjoern A. Zeeb sizeof(struct wtbl_tx_ps) + \
7526c92544dSBjoern A. Zeeb sizeof(struct wtbl_hdr_trans) +\
7536c92544dSBjoern A. Zeeb sizeof(struct wtbl_ba) + \
7546c92544dSBjoern A. Zeeb sizeof(struct wtbl_bf) + \
7556c92544dSBjoern A. Zeeb sizeof(struct wtbl_smps) + \
7566c92544dSBjoern A. Zeeb sizeof(struct wtbl_pn) + \
7576c92544dSBjoern A. Zeeb sizeof(struct wtbl_spe))
7586c92544dSBjoern A. Zeeb
7596c92544dSBjoern A. Zeeb #define MT76_CONNAC_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \
7606c92544dSBjoern A. Zeeb sizeof(struct sta_rec_basic) + \
7616c92544dSBjoern A. Zeeb sizeof(struct sta_rec_bf) + \
7626c92544dSBjoern A. Zeeb sizeof(struct sta_rec_ht) + \
7636c92544dSBjoern A. Zeeb sizeof(struct sta_rec_he) + \
7646c92544dSBjoern A. Zeeb sizeof(struct sta_rec_ba) + \
7656c92544dSBjoern A. Zeeb sizeof(struct sta_rec_vht) + \
7666c92544dSBjoern A. Zeeb sizeof(struct sta_rec_uapsd) + \
7676c92544dSBjoern A. Zeeb sizeof(struct sta_rec_amsdu) + \
7686c92544dSBjoern A. Zeeb sizeof(struct sta_rec_muru) + \
7696c92544dSBjoern A. Zeeb sizeof(struct sta_rec_bfee) + \
7706c92544dSBjoern A. Zeeb sizeof(struct sta_rec_ra) + \
7716c92544dSBjoern A. Zeeb sizeof(struct sta_rec_sec) + \
7726c92544dSBjoern A. Zeeb sizeof(struct sta_rec_ra_fixed) + \
7736c92544dSBjoern A. Zeeb sizeof(struct sta_rec_he_6g_capa) + \
7746c92544dSBjoern A. Zeeb sizeof(struct tlv) + \
7756c92544dSBjoern A. Zeeb MT76_CONNAC_WTBL_UPDATE_MAX_SIZE)
7766c92544dSBjoern A. Zeeb
7776c92544dSBjoern A. Zeeb enum {
7786c92544dSBjoern A. Zeeb STA_REC_BASIC,
7796c92544dSBjoern A. Zeeb STA_REC_RA,
7806c92544dSBjoern A. Zeeb STA_REC_RA_CMM_INFO,
7816c92544dSBjoern A. Zeeb STA_REC_RA_UPDATE,
7826c92544dSBjoern A. Zeeb STA_REC_BF,
7836c92544dSBjoern A. Zeeb STA_REC_AMSDU,
7846c92544dSBjoern A. Zeeb STA_REC_BA,
7856c92544dSBjoern A. Zeeb STA_REC_STATE,
7866c92544dSBjoern A. Zeeb STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */
7876c92544dSBjoern A. Zeeb STA_REC_HT,
7886c92544dSBjoern A. Zeeb STA_REC_VHT,
7896c92544dSBjoern A. Zeeb STA_REC_APPS,
7906c92544dSBjoern A. Zeeb STA_REC_KEY,
7916c92544dSBjoern A. Zeeb STA_REC_WTBL,
7926c92544dSBjoern A. Zeeb STA_REC_HE,
7936c92544dSBjoern A. Zeeb STA_REC_HW_AMSDU,
7946c92544dSBjoern A. Zeeb STA_REC_WTBL_AADOM,
7956c92544dSBjoern A. Zeeb STA_REC_KEY_V2,
7966c92544dSBjoern A. Zeeb STA_REC_MURU,
7976c92544dSBjoern A. Zeeb STA_REC_MUEDCA,
7986c92544dSBjoern A. Zeeb STA_REC_BFEE,
7996c92544dSBjoern A. Zeeb STA_REC_PHY = 0x15,
8006c92544dSBjoern A. Zeeb STA_REC_HE_6G = 0x17,
801cbb3ec25SBjoern A. Zeeb STA_REC_HE_V2 = 0x19,
802cbb3ec25SBjoern A. Zeeb STA_REC_EHT = 0x22,
803cbb3ec25SBjoern A. Zeeb STA_REC_HDRT = 0x28,
804cbb3ec25SBjoern A. Zeeb STA_REC_HDR_TRANS = 0x2B,
8056c92544dSBjoern A. Zeeb STA_REC_MAX_NUM
8066c92544dSBjoern A. Zeeb };
8076c92544dSBjoern A. Zeeb
8086c92544dSBjoern A. Zeeb enum {
8096c92544dSBjoern A. Zeeb WTBL_GENERIC,
8106c92544dSBjoern A. Zeeb WTBL_RX,
8116c92544dSBjoern A. Zeeb WTBL_HT,
8126c92544dSBjoern A. Zeeb WTBL_VHT,
8136c92544dSBjoern A. Zeeb WTBL_PEER_PS, /* not used */
8146c92544dSBjoern A. Zeeb WTBL_TX_PS,
8156c92544dSBjoern A. Zeeb WTBL_HDR_TRANS,
8166c92544dSBjoern A. Zeeb WTBL_SEC_KEY,
8176c92544dSBjoern A. Zeeb WTBL_BA,
8186c92544dSBjoern A. Zeeb WTBL_RDG, /* obsoleted */
8196c92544dSBjoern A. Zeeb WTBL_PROTECT, /* not used */
8206c92544dSBjoern A. Zeeb WTBL_CLEAR, /* not used */
8216c92544dSBjoern A. Zeeb WTBL_BF,
8226c92544dSBjoern A. Zeeb WTBL_SMPS,
8236c92544dSBjoern A. Zeeb WTBL_RAW_DATA, /* debug only */
8246c92544dSBjoern A. Zeeb WTBL_PN,
8256c92544dSBjoern A. Zeeb WTBL_SPE,
8266c92544dSBjoern A. Zeeb WTBL_MAX_NUM
8276c92544dSBjoern A. Zeeb };
8286c92544dSBjoern A. Zeeb
8296c92544dSBjoern A. Zeeb #define STA_TYPE_STA BIT(0)
8306c92544dSBjoern A. Zeeb #define STA_TYPE_AP BIT(1)
8316c92544dSBjoern A. Zeeb #define STA_TYPE_ADHOC BIT(2)
8326c92544dSBjoern A. Zeeb #define STA_TYPE_WDS BIT(4)
8336c92544dSBjoern A. Zeeb #define STA_TYPE_BC BIT(5)
8346c92544dSBjoern A. Zeeb
8356c92544dSBjoern A. Zeeb #define NETWORK_INFRA BIT(16)
8366c92544dSBjoern A. Zeeb #define NETWORK_P2P BIT(17)
8376c92544dSBjoern A. Zeeb #define NETWORK_IBSS BIT(18)
8386c92544dSBjoern A. Zeeb #define NETWORK_WDS BIT(21)
8396c92544dSBjoern A. Zeeb
8406c92544dSBjoern A. Zeeb #define SCAN_FUNC_RANDOM_MAC BIT(0)
8416c92544dSBjoern A. Zeeb #define SCAN_FUNC_SPLIT_SCAN BIT(5)
8426c92544dSBjoern A. Zeeb
8436c92544dSBjoern A. Zeeb #define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA)
8446c92544dSBjoern A. Zeeb #define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA)
8456c92544dSBjoern A. Zeeb #define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P)
8466c92544dSBjoern A. Zeeb #define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P)
8476c92544dSBjoern A. Zeeb #define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS)
8486c92544dSBjoern A. Zeeb #define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS)
8496c92544dSBjoern A. Zeeb #define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA)
8506c92544dSBjoern A. Zeeb
8516c92544dSBjoern A. Zeeb #define CONN_STATE_DISCONNECT 0
8526c92544dSBjoern A. Zeeb #define CONN_STATE_CONNECT 1
8536c92544dSBjoern A. Zeeb #define CONN_STATE_PORT_SECURE 2
8546c92544dSBjoern A. Zeeb
8556c92544dSBjoern A. Zeeb /* HE MAC */
8566c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_HTC BIT(0)
8576c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_BQR BIT(1)
8586c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_BSR BIT(2)
8596c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_OM BIT(3)
8606c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_AMSDU_IN_AMPDU BIT(4)
8616c92544dSBjoern A. Zeeb /* HE PHY */
8626c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_DUAL_BAND BIT(5)
8636c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_LDPC BIT(6)
8646c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_TRIG_CQI_FK BIT(7)
8656c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE BIT(8)
8666c92544dSBjoern A. Zeeb /* STBC */
8676c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_LE_EQ_80M_TX_STBC BIT(9)
8686c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_LE_EQ_80M_RX_STBC BIT(10)
8696c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_GT_80M_TX_STBC BIT(11)
8706c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_GT_80M_RX_STBC BIT(12)
8716c92544dSBjoern A. Zeeb /* GI */
8726c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI BIT(13)
8736c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI BIT(14)
8746c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI BIT(15)
8756c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI BIT(16)
8766c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI BIT(17)
8776c92544dSBjoern A. Zeeb /* 242 TONE */
8786c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_BW20_RU242_SUPPORT BIT(18)
8796c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242 BIT(19)
8806c92544dSBjoern A. Zeeb #define STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242 BIT(20)
8816c92544dSBjoern A. Zeeb
8826c92544dSBjoern A. Zeeb #define PHY_MODE_A BIT(0)
8836c92544dSBjoern A. Zeeb #define PHY_MODE_B BIT(1)
8846c92544dSBjoern A. Zeeb #define PHY_MODE_G BIT(2)
8856c92544dSBjoern A. Zeeb #define PHY_MODE_GN BIT(3)
8866c92544dSBjoern A. Zeeb #define PHY_MODE_AN BIT(4)
8876c92544dSBjoern A. Zeeb #define PHY_MODE_AC BIT(5)
8886c92544dSBjoern A. Zeeb #define PHY_MODE_AX_24G BIT(6)
8896c92544dSBjoern A. Zeeb #define PHY_MODE_AX_5G BIT(7)
8906c92544dSBjoern A. Zeeb
8916c92544dSBjoern A. Zeeb #define PHY_MODE_AX_6G BIT(0) /* phymode_ext */
892cbb3ec25SBjoern A. Zeeb #define PHY_MODE_BE_24G BIT(1)
893cbb3ec25SBjoern A. Zeeb #define PHY_MODE_BE_5G BIT(2)
894cbb3ec25SBjoern A. Zeeb #define PHY_MODE_BE_6G BIT(3)
8956c92544dSBjoern A. Zeeb
8966c92544dSBjoern A. Zeeb #define MODE_CCK BIT(0)
8976c92544dSBjoern A. Zeeb #define MODE_OFDM BIT(1)
8986c92544dSBjoern A. Zeeb #define MODE_HT BIT(2)
8996c92544dSBjoern A. Zeeb #define MODE_VHT BIT(3)
9006c92544dSBjoern A. Zeeb #define MODE_HE BIT(4)
901cbb3ec25SBjoern A. Zeeb #define MODE_EHT BIT(5)
9026c92544dSBjoern A. Zeeb
9036c92544dSBjoern A. Zeeb #define STA_CAP_WMM BIT(0)
9046c92544dSBjoern A. Zeeb #define STA_CAP_SGI_20 BIT(4)
9056c92544dSBjoern A. Zeeb #define STA_CAP_SGI_40 BIT(5)
9066c92544dSBjoern A. Zeeb #define STA_CAP_TX_STBC BIT(6)
9076c92544dSBjoern A. Zeeb #define STA_CAP_RX_STBC BIT(7)
9086c92544dSBjoern A. Zeeb #define STA_CAP_VHT_SGI_80 BIT(16)
9096c92544dSBjoern A. Zeeb #define STA_CAP_VHT_SGI_160 BIT(17)
9106c92544dSBjoern A. Zeeb #define STA_CAP_VHT_TX_STBC BIT(18)
9116c92544dSBjoern A. Zeeb #define STA_CAP_VHT_RX_STBC BIT(19)
9126c92544dSBjoern A. Zeeb #define STA_CAP_VHT_LDPC BIT(23)
9136c92544dSBjoern A. Zeeb #define STA_CAP_LDPC BIT(24)
9146c92544dSBjoern A. Zeeb #define STA_CAP_HT BIT(26)
9156c92544dSBjoern A. Zeeb #define STA_CAP_VHT BIT(27)
9166c92544dSBjoern A. Zeeb #define STA_CAP_HE BIT(28)
9176c92544dSBjoern A. Zeeb
9186c92544dSBjoern A. Zeeb enum {
9196c92544dSBjoern A. Zeeb PHY_TYPE_HR_DSSS_INDEX = 0,
9206c92544dSBjoern A. Zeeb PHY_TYPE_ERP_INDEX,
9216c92544dSBjoern A. Zeeb PHY_TYPE_ERP_P2P_INDEX,
9226c92544dSBjoern A. Zeeb PHY_TYPE_OFDM_INDEX,
9236c92544dSBjoern A. Zeeb PHY_TYPE_HT_INDEX,
9246c92544dSBjoern A. Zeeb PHY_TYPE_VHT_INDEX,
9256c92544dSBjoern A. Zeeb PHY_TYPE_HE_INDEX,
9266c92544dSBjoern A. Zeeb PHY_TYPE_INDEX_NUM
9276c92544dSBjoern A. Zeeb };
9286c92544dSBjoern A. Zeeb
9296c92544dSBjoern A. Zeeb #define PHY_TYPE_BIT_HR_DSSS BIT(PHY_TYPE_HR_DSSS_INDEX)
9306c92544dSBjoern A. Zeeb #define PHY_TYPE_BIT_ERP BIT(PHY_TYPE_ERP_INDEX)
9316c92544dSBjoern A. Zeeb #define PHY_TYPE_BIT_OFDM BIT(PHY_TYPE_OFDM_INDEX)
9326c92544dSBjoern A. Zeeb #define PHY_TYPE_BIT_HT BIT(PHY_TYPE_HT_INDEX)
9336c92544dSBjoern A. Zeeb #define PHY_TYPE_BIT_VHT BIT(PHY_TYPE_VHT_INDEX)
9346c92544dSBjoern A. Zeeb #define PHY_TYPE_BIT_HE BIT(PHY_TYPE_HE_INDEX)
9356c92544dSBjoern A. Zeeb
9366c92544dSBjoern A. Zeeb #define MT_WTBL_RATE_TX_MODE GENMASK(9, 6)
9376c92544dSBjoern A. Zeeb #define MT_WTBL_RATE_MCS GENMASK(5, 0)
9386c92544dSBjoern A. Zeeb #define MT_WTBL_RATE_NSS GENMASK(12, 10)
9396c92544dSBjoern A. Zeeb #define MT_WTBL_RATE_HE_GI GENMASK(7, 4)
9406c92544dSBjoern A. Zeeb #define MT_WTBL_RATE_GI GENMASK(3, 0)
9416c92544dSBjoern A. Zeeb
9426c92544dSBjoern A. Zeeb #define MT_WTBL_W5_CHANGE_BW_RATE GENMASK(7, 5)
9436c92544dSBjoern A. Zeeb #define MT_WTBL_W5_SHORT_GI_20 BIT(8)
9446c92544dSBjoern A. Zeeb #define MT_WTBL_W5_SHORT_GI_40 BIT(9)
9456c92544dSBjoern A. Zeeb #define MT_WTBL_W5_SHORT_GI_80 BIT(10)
9466c92544dSBjoern A. Zeeb #define MT_WTBL_W5_SHORT_GI_160 BIT(11)
9476c92544dSBjoern A. Zeeb #define MT_WTBL_W5_BW_CAP GENMASK(13, 12)
9486c92544dSBjoern A. Zeeb #define MT_WTBL_W5_MPDU_FAIL_COUNT GENMASK(25, 23)
9496c92544dSBjoern A. Zeeb #define MT_WTBL_W5_MPDU_OK_COUNT GENMASK(28, 26)
9506c92544dSBjoern A. Zeeb #define MT_WTBL_W5_RATE_IDX GENMASK(31, 29)
9516c92544dSBjoern A. Zeeb
9526c92544dSBjoern A. Zeeb enum {
9536c92544dSBjoern A. Zeeb WTBL_RESET_AND_SET = 1,
9546c92544dSBjoern A. Zeeb WTBL_SET,
9556c92544dSBjoern A. Zeeb WTBL_QUERY,
9566c92544dSBjoern A. Zeeb WTBL_RESET_ALL
9576c92544dSBjoern A. Zeeb };
9586c92544dSBjoern A. Zeeb
9596c92544dSBjoern A. Zeeb enum {
9606c92544dSBjoern A. Zeeb MT_BA_TYPE_INVALID,
9616c92544dSBjoern A. Zeeb MT_BA_TYPE_ORIGINATOR,
9626c92544dSBjoern A. Zeeb MT_BA_TYPE_RECIPIENT
9636c92544dSBjoern A. Zeeb };
9646c92544dSBjoern A. Zeeb
9656c92544dSBjoern A. Zeeb enum {
9666c92544dSBjoern A. Zeeb RST_BA_MAC_TID_MATCH,
9676c92544dSBjoern A. Zeeb RST_BA_MAC_MATCH,
9686c92544dSBjoern A. Zeeb RST_BA_NO_MATCH
9696c92544dSBjoern A. Zeeb };
9706c92544dSBjoern A. Zeeb
9716c92544dSBjoern A. Zeeb enum {
9726c92544dSBjoern A. Zeeb DEV_INFO_ACTIVE,
9736c92544dSBjoern A. Zeeb DEV_INFO_MAX_NUM
9746c92544dSBjoern A. Zeeb };
9756c92544dSBjoern A. Zeeb
9766c92544dSBjoern A. Zeeb /* event table */
9776c92544dSBjoern A. Zeeb enum {
9786c92544dSBjoern A. Zeeb MCU_EVENT_TARGET_ADDRESS_LEN = 0x01,
9796c92544dSBjoern A. Zeeb MCU_EVENT_FW_START = 0x01,
9806c92544dSBjoern A. Zeeb MCU_EVENT_GENERIC = 0x01,
9816c92544dSBjoern A. Zeeb MCU_EVENT_ACCESS_REG = 0x02,
9826c92544dSBjoern A. Zeeb MCU_EVENT_MT_PATCH_SEM = 0x04,
9836c92544dSBjoern A. Zeeb MCU_EVENT_REG_ACCESS = 0x05,
9846c92544dSBjoern A. Zeeb MCU_EVENT_LP_INFO = 0x07,
9856c92544dSBjoern A. Zeeb MCU_EVENT_SCAN_DONE = 0x0d,
9866c92544dSBjoern A. Zeeb MCU_EVENT_TX_DONE = 0x0f,
9876c92544dSBjoern A. Zeeb MCU_EVENT_ROC = 0x10,
9886c92544dSBjoern A. Zeeb MCU_EVENT_BSS_ABSENCE = 0x11,
9896c92544dSBjoern A. Zeeb MCU_EVENT_BSS_BEACON_LOSS = 0x13,
9906c92544dSBjoern A. Zeeb MCU_EVENT_CH_PRIVILEGE = 0x18,
9916c92544dSBjoern A. Zeeb MCU_EVENT_SCHED_SCAN_DONE = 0x23,
9926c92544dSBjoern A. Zeeb MCU_EVENT_DBG_MSG = 0x27,
9936c92544dSBjoern A. Zeeb MCU_EVENT_TXPWR = 0xd0,
9946c92544dSBjoern A. Zeeb MCU_EVENT_EXT = 0xed,
9956c92544dSBjoern A. Zeeb MCU_EVENT_RESTART_DL = 0xef,
9966c92544dSBjoern A. Zeeb MCU_EVENT_COREDUMP = 0xf0,
9976c92544dSBjoern A. Zeeb };
9986c92544dSBjoern A. Zeeb
9996c92544dSBjoern A. Zeeb /* ext event table */
10006c92544dSBjoern A. Zeeb enum {
10016c92544dSBjoern A. Zeeb MCU_EXT_EVENT_PS_SYNC = 0x5,
10026c92544dSBjoern A. Zeeb MCU_EXT_EVENT_FW_LOG_2_HOST = 0x13,
10036c92544dSBjoern A. Zeeb MCU_EXT_EVENT_THERMAL_PROTECT = 0x22,
10046c92544dSBjoern A. Zeeb MCU_EXT_EVENT_ASSERT_DUMP = 0x23,
10056c92544dSBjoern A. Zeeb MCU_EXT_EVENT_RDD_REPORT = 0x3a,
10066c92544dSBjoern A. Zeeb MCU_EXT_EVENT_CSA_NOTIFY = 0x4f,
1007cbb3ec25SBjoern A. Zeeb MCU_EXT_EVENT_WA_TX_STAT = 0x74,
10086c92544dSBjoern A. Zeeb MCU_EXT_EVENT_BCC_NOTIFY = 0x75,
10096c92544dSBjoern A. Zeeb MCU_EXT_EVENT_MURU_CTRL = 0x9f,
10106c92544dSBjoern A. Zeeb };
10116c92544dSBjoern A. Zeeb
1012cbb3ec25SBjoern A. Zeeb /* unified event table */
1013cbb3ec25SBjoern A. Zeeb enum {
1014cbb3ec25SBjoern A. Zeeb MCU_UNI_EVENT_RESULT = 0x01,
1015cbb3ec25SBjoern A. Zeeb MCU_UNI_EVENT_FW_LOG_2_HOST = 0x04,
1016cbb3ec25SBjoern A. Zeeb MCU_UNI_EVENT_IE_COUNTDOWN = 0x09,
1017cbb3ec25SBjoern A. Zeeb MCU_UNI_EVENT_RDD_REPORT = 0x11,
1018cbb3ec25SBjoern A. Zeeb };
1019cbb3ec25SBjoern A. Zeeb
1020cbb3ec25SBjoern A. Zeeb #define MCU_UNI_CMD_EVENT BIT(1)
1021cbb3ec25SBjoern A. Zeeb #define MCU_UNI_CMD_UNSOLICITED_EVENT BIT(2)
1022cbb3ec25SBjoern A. Zeeb
10236c92544dSBjoern A. Zeeb enum {
10246c92544dSBjoern A. Zeeb MCU_Q_QUERY,
10256c92544dSBjoern A. Zeeb MCU_Q_SET,
10266c92544dSBjoern A. Zeeb MCU_Q_RESERVED,
10276c92544dSBjoern A. Zeeb MCU_Q_NA
10286c92544dSBjoern A. Zeeb };
10296c92544dSBjoern A. Zeeb
10306c92544dSBjoern A. Zeeb enum {
10316c92544dSBjoern A. Zeeb MCU_S2D_H2N,
10326c92544dSBjoern A. Zeeb MCU_S2D_C2N,
10336c92544dSBjoern A. Zeeb MCU_S2D_H2C,
10346c92544dSBjoern A. Zeeb MCU_S2D_H2CN
10356c92544dSBjoern A. Zeeb };
10366c92544dSBjoern A. Zeeb
10376c92544dSBjoern A. Zeeb enum {
10386c92544dSBjoern A. Zeeb PATCH_NOT_DL_SEM_FAIL,
10396c92544dSBjoern A. Zeeb PATCH_IS_DL,
10406c92544dSBjoern A. Zeeb PATCH_NOT_DL_SEM_SUCCESS,
10416c92544dSBjoern A. Zeeb PATCH_REL_SEM_SUCCESS
10426c92544dSBjoern A. Zeeb };
10436c92544dSBjoern A. Zeeb
10446c92544dSBjoern A. Zeeb enum {
10456c92544dSBjoern A. Zeeb FW_STATE_INITIAL,
10466c92544dSBjoern A. Zeeb FW_STATE_FW_DOWNLOAD,
10476c92544dSBjoern A. Zeeb FW_STATE_NORMAL_OPERATION,
10486c92544dSBjoern A. Zeeb FW_STATE_NORMAL_TRX,
10496c92544dSBjoern A. Zeeb FW_STATE_RDY = 7
10506c92544dSBjoern A. Zeeb };
10516c92544dSBjoern A. Zeeb
10526c92544dSBjoern A. Zeeb enum {
10536c92544dSBjoern A. Zeeb CH_SWITCH_NORMAL = 0,
10546c92544dSBjoern A. Zeeb CH_SWITCH_SCAN = 3,
10556c92544dSBjoern A. Zeeb CH_SWITCH_MCC = 4,
10566c92544dSBjoern A. Zeeb CH_SWITCH_DFS = 5,
10576c92544dSBjoern A. Zeeb CH_SWITCH_BACKGROUND_SCAN_START = 6,
10586c92544dSBjoern A. Zeeb CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7,
10596c92544dSBjoern A. Zeeb CH_SWITCH_BACKGROUND_SCAN_STOP = 8,
10606c92544dSBjoern A. Zeeb CH_SWITCH_SCAN_BYPASS_DPD = 9
10616c92544dSBjoern A. Zeeb };
10626c92544dSBjoern A. Zeeb
10636c92544dSBjoern A. Zeeb enum {
10646c92544dSBjoern A. Zeeb THERMAL_SENSOR_TEMP_QUERY,
10656c92544dSBjoern A. Zeeb THERMAL_SENSOR_MANUAL_CTRL,
10666c92544dSBjoern A. Zeeb THERMAL_SENSOR_INFO_QUERY,
10676c92544dSBjoern A. Zeeb THERMAL_SENSOR_TASK_CTRL,
10686c92544dSBjoern A. Zeeb };
10696c92544dSBjoern A. Zeeb
10706c92544dSBjoern A. Zeeb enum mcu_cipher_type {
10716c92544dSBjoern A. Zeeb MCU_CIPHER_NONE = 0,
10726c92544dSBjoern A. Zeeb MCU_CIPHER_WEP40,
10736c92544dSBjoern A. Zeeb MCU_CIPHER_WEP104,
10746c92544dSBjoern A. Zeeb MCU_CIPHER_WEP128,
10756c92544dSBjoern A. Zeeb MCU_CIPHER_TKIP,
10766c92544dSBjoern A. Zeeb MCU_CIPHER_AES_CCMP,
10776c92544dSBjoern A. Zeeb MCU_CIPHER_CCMP_256,
10786c92544dSBjoern A. Zeeb MCU_CIPHER_GCMP,
10796c92544dSBjoern A. Zeeb MCU_CIPHER_GCMP_256,
10806c92544dSBjoern A. Zeeb MCU_CIPHER_WAPI,
10816c92544dSBjoern A. Zeeb MCU_CIPHER_BIP_CMAC_128,
10826c92544dSBjoern A. Zeeb };
10836c92544dSBjoern A. Zeeb
10846c92544dSBjoern A. Zeeb enum {
10856c92544dSBjoern A. Zeeb EE_MODE_EFUSE,
10866c92544dSBjoern A. Zeeb EE_MODE_BUFFER,
10876c92544dSBjoern A. Zeeb };
10886c92544dSBjoern A. Zeeb
10896c92544dSBjoern A. Zeeb enum {
10906c92544dSBjoern A. Zeeb EE_FORMAT_BIN,
10916c92544dSBjoern A. Zeeb EE_FORMAT_WHOLE,
10926c92544dSBjoern A. Zeeb EE_FORMAT_MULTIPLE,
10936c92544dSBjoern A. Zeeb };
10946c92544dSBjoern A. Zeeb
10956c92544dSBjoern A. Zeeb enum {
10966c92544dSBjoern A. Zeeb MCU_PHY_STATE_TX_RATE,
10976c92544dSBjoern A. Zeeb MCU_PHY_STATE_RX_RATE,
10986c92544dSBjoern A. Zeeb MCU_PHY_STATE_RSSI,
10996c92544dSBjoern A. Zeeb MCU_PHY_STATE_CONTENTION_RX_RATE,
11006c92544dSBjoern A. Zeeb MCU_PHY_STATE_OFDMLQ_CNINFO,
11016c92544dSBjoern A. Zeeb };
11026c92544dSBjoern A. Zeeb
11036c92544dSBjoern A. Zeeb #define MCU_CMD_ACK BIT(0)
11046c92544dSBjoern A. Zeeb #define MCU_CMD_UNI BIT(1)
1105cbb3ec25SBjoern A. Zeeb #define MCU_CMD_SET BIT(2)
11066c92544dSBjoern A. Zeeb
11076c92544dSBjoern A. Zeeb #define MCU_CMD_UNI_EXT_ACK (MCU_CMD_ACK | MCU_CMD_UNI | \
1108cbb3ec25SBjoern A. Zeeb MCU_CMD_SET)
1109cbb3ec25SBjoern A. Zeeb #define MCU_CMD_UNI_QUERY_ACK (MCU_CMD_ACK | MCU_CMD_UNI)
11106c92544dSBjoern A. Zeeb
11116c92544dSBjoern A. Zeeb #define __MCU_CMD_FIELD_ID GENMASK(7, 0)
11126c92544dSBjoern A. Zeeb #define __MCU_CMD_FIELD_EXT_ID GENMASK(15, 8)
11136c92544dSBjoern A. Zeeb #define __MCU_CMD_FIELD_QUERY BIT(16)
11146c92544dSBjoern A. Zeeb #define __MCU_CMD_FIELD_UNI BIT(17)
11156c92544dSBjoern A. Zeeb #define __MCU_CMD_FIELD_CE BIT(18)
11166c92544dSBjoern A. Zeeb #define __MCU_CMD_FIELD_WA BIT(19)
1117cbb3ec25SBjoern A. Zeeb #define __MCU_CMD_FIELD_WM BIT(20)
11186c92544dSBjoern A. Zeeb
11196c92544dSBjoern A. Zeeb #define MCU_CMD(_t) FIELD_PREP(__MCU_CMD_FIELD_ID, \
11206c92544dSBjoern A. Zeeb MCU_CMD_##_t)
11216c92544dSBjoern A. Zeeb #define MCU_EXT_CMD(_t) (MCU_CMD(EXT_CID) | \
11226c92544dSBjoern A. Zeeb FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \
11236c92544dSBjoern A. Zeeb MCU_EXT_CMD_##_t))
11246c92544dSBjoern A. Zeeb #define MCU_EXT_QUERY(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_QUERY)
11256c92544dSBjoern A. Zeeb #define MCU_UNI_CMD(_t) (__MCU_CMD_FIELD_UNI | \
11266c92544dSBjoern A. Zeeb FIELD_PREP(__MCU_CMD_FIELD_ID, \
11276c92544dSBjoern A. Zeeb MCU_UNI_CMD_##_t))
11286c92544dSBjoern A. Zeeb #define MCU_CE_CMD(_t) (__MCU_CMD_FIELD_CE | \
11296c92544dSBjoern A. Zeeb FIELD_PREP(__MCU_CMD_FIELD_ID, \
11306c92544dSBjoern A. Zeeb MCU_CE_CMD_##_t))
11316c92544dSBjoern A. Zeeb #define MCU_CE_QUERY(_t) (MCU_CE_CMD(_t) | __MCU_CMD_FIELD_QUERY)
11326c92544dSBjoern A. Zeeb
11336c92544dSBjoern A. Zeeb #define MCU_WA_CMD(_t) (MCU_CMD(_t) | __MCU_CMD_FIELD_WA)
11346c92544dSBjoern A. Zeeb #define MCU_WA_EXT_CMD(_t) (MCU_EXT_CMD(_t) | __MCU_CMD_FIELD_WA)
11356c92544dSBjoern A. Zeeb #define MCU_WA_PARAM_CMD(_t) (MCU_WA_CMD(WA_PARAM) | \
11366c92544dSBjoern A. Zeeb FIELD_PREP(__MCU_CMD_FIELD_EXT_ID, \
11376c92544dSBjoern A. Zeeb MCU_WA_PARAM_CMD_##_t))
11386c92544dSBjoern A. Zeeb
1139cbb3ec25SBjoern A. Zeeb #define MCU_WM_UNI_CMD(_t) (MCU_UNI_CMD(_t) | \
1140cbb3ec25SBjoern A. Zeeb __MCU_CMD_FIELD_WM)
1141cbb3ec25SBjoern A. Zeeb #define MCU_WM_UNI_CMD_QUERY(_t) (MCU_UNI_CMD(_t) | \
1142cbb3ec25SBjoern A. Zeeb __MCU_CMD_FIELD_QUERY | \
1143cbb3ec25SBjoern A. Zeeb __MCU_CMD_FIELD_WM)
1144cbb3ec25SBjoern A. Zeeb #define MCU_WA_UNI_CMD(_t) (MCU_UNI_CMD(_t) | \
1145cbb3ec25SBjoern A. Zeeb __MCU_CMD_FIELD_WA)
1146cbb3ec25SBjoern A. Zeeb #define MCU_WMWA_UNI_CMD(_t) (MCU_WM_UNI_CMD(_t) | \
1147cbb3ec25SBjoern A. Zeeb __MCU_CMD_FIELD_WA)
1148cbb3ec25SBjoern A. Zeeb
11496c92544dSBjoern A. Zeeb enum {
11506c92544dSBjoern A. Zeeb MCU_EXT_CMD_EFUSE_ACCESS = 0x01,
11516c92544dSBjoern A. Zeeb MCU_EXT_CMD_RF_REG_ACCESS = 0x02,
11526c92544dSBjoern A. Zeeb MCU_EXT_CMD_RF_TEST = 0x04,
11536c92544dSBjoern A. Zeeb MCU_EXT_CMD_PM_STATE_CTRL = 0x07,
11546c92544dSBjoern A. Zeeb MCU_EXT_CMD_CHANNEL_SWITCH = 0x08,
11556c92544dSBjoern A. Zeeb MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11,
11566c92544dSBjoern A. Zeeb MCU_EXT_CMD_FW_LOG_2_HOST = 0x13,
11576c92544dSBjoern A. Zeeb MCU_EXT_CMD_TXBF_ACTION = 0x1e,
11586c92544dSBjoern A. Zeeb MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21,
11596c92544dSBjoern A. Zeeb MCU_EXT_CMD_THERMAL_PROT = 0x23,
11606c92544dSBjoern A. Zeeb MCU_EXT_CMD_STA_REC_UPDATE = 0x25,
11616c92544dSBjoern A. Zeeb MCU_EXT_CMD_BSS_INFO_UPDATE = 0x26,
11626c92544dSBjoern A. Zeeb MCU_EXT_CMD_EDCA_UPDATE = 0x27,
11636c92544dSBjoern A. Zeeb MCU_EXT_CMD_DEV_INFO_UPDATE = 0x2A,
11646c92544dSBjoern A. Zeeb MCU_EXT_CMD_THERMAL_CTRL = 0x2c,
11656c92544dSBjoern A. Zeeb MCU_EXT_CMD_WTBL_UPDATE = 0x32,
11666c92544dSBjoern A. Zeeb MCU_EXT_CMD_SET_DRR_CTRL = 0x36,
11676c92544dSBjoern A. Zeeb MCU_EXT_CMD_SET_RDD_CTRL = 0x3a,
11686c92544dSBjoern A. Zeeb MCU_EXT_CMD_ATE_CTRL = 0x3d,
11696c92544dSBjoern A. Zeeb MCU_EXT_CMD_PROTECT_CTRL = 0x3e,
11706c92544dSBjoern A. Zeeb MCU_EXT_CMD_DBDC_CTRL = 0x45,
11716c92544dSBjoern A. Zeeb MCU_EXT_CMD_MAC_INIT_CTRL = 0x46,
11726c92544dSBjoern A. Zeeb MCU_EXT_CMD_RX_HDR_TRANS = 0x47,
11736c92544dSBjoern A. Zeeb MCU_EXT_CMD_MUAR_UPDATE = 0x48,
11746c92544dSBjoern A. Zeeb MCU_EXT_CMD_BCN_OFFLOAD = 0x49,
11756c92544dSBjoern A. Zeeb MCU_EXT_CMD_RX_AIRTIME_CTRL = 0x4a,
11766c92544dSBjoern A. Zeeb MCU_EXT_CMD_SET_RX_PATH = 0x4e,
11776c92544dSBjoern A. Zeeb MCU_EXT_CMD_EFUSE_FREE_BLOCK = 0x4f,
11786c92544dSBjoern A. Zeeb MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58,
11796c92544dSBjoern A. Zeeb MCU_EXT_CMD_RXDCOC_CAL = 0x59,
11806c92544dSBjoern A. Zeeb MCU_EXT_CMD_GET_MIB_INFO = 0x5a,
11816c92544dSBjoern A. Zeeb MCU_EXT_CMD_TXDPD_CAL = 0x60,
11826c92544dSBjoern A. Zeeb MCU_EXT_CMD_CAL_CACHE = 0x67,
1183cbb3ec25SBjoern A. Zeeb MCU_EXT_CMD_RED_ENABLE = 0x68,
11846c92544dSBjoern A. Zeeb MCU_EXT_CMD_SET_RADAR_TH = 0x7c,
11856c92544dSBjoern A. Zeeb MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d,
11866c92544dSBjoern A. Zeeb MCU_EXT_CMD_MWDS_SUPPORT = 0x80,
11876c92544dSBjoern A. Zeeb MCU_EXT_CMD_SET_SER_TRIGGER = 0x81,
11886c92544dSBjoern A. Zeeb MCU_EXT_CMD_TWT_AGRT_UPDATE = 0x94,
11896c92544dSBjoern A. Zeeb MCU_EXT_CMD_FW_DBG_CTRL = 0x95,
11906c92544dSBjoern A. Zeeb MCU_EXT_CMD_OFFCH_SCAN_CTRL = 0x9a,
11916c92544dSBjoern A. Zeeb MCU_EXT_CMD_SET_RDD_TH = 0x9d,
11926c92544dSBjoern A. Zeeb MCU_EXT_CMD_MURU_CTRL = 0x9f,
11936c92544dSBjoern A. Zeeb MCU_EXT_CMD_SET_SPR = 0xa8,
11946c92544dSBjoern A. Zeeb MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab,
11956c92544dSBjoern A. Zeeb MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac,
11966c92544dSBjoern A. Zeeb MCU_EXT_CMD_PHY_STAT_INFO = 0xad,
11976c92544dSBjoern A. Zeeb };
11986c92544dSBjoern A. Zeeb
11996c92544dSBjoern A. Zeeb enum {
12006c92544dSBjoern A. Zeeb MCU_UNI_CMD_DEV_INFO_UPDATE = 0x01,
12016c92544dSBjoern A. Zeeb MCU_UNI_CMD_BSS_INFO_UPDATE = 0x02,
12026c92544dSBjoern A. Zeeb MCU_UNI_CMD_STA_REC_UPDATE = 0x03,
1203cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_EDCA_UPDATE = 0x04,
12046c92544dSBjoern A. Zeeb MCU_UNI_CMD_SUSPEND = 0x05,
12056c92544dSBjoern A. Zeeb MCU_UNI_CMD_OFFLOAD = 0x06,
12066c92544dSBjoern A. Zeeb MCU_UNI_CMD_HIF_CTRL = 0x07,
1207cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_BAND_CONFIG = 0x08,
1208cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_REPT_MUAR = 0x09,
1209cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_WSYS_CONFIG = 0x0b,
1210cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_REG_ACCESS = 0x0d,
1211cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_CHIP_CONFIG = 0x0e,
1212cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_POWER_CTRL = 0x0f,
1213cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_RX_HDR_TRANS = 0x12,
1214cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_SER = 0x13,
1215cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_TWT = 0x14,
1216cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_RDD_CTRL = 0x19,
1217cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_GET_MIB_INFO = 0x22,
12186c92544dSBjoern A. Zeeb MCU_UNI_CMD_SNIFFER = 0x24,
1219cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_SR = 0x25,
1220cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_ROC = 0x27,
1221cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_TXPOWER = 0x2b,
1222cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_EFUSE_CTRL = 0x2d,
1223cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_RA = 0x2f,
1224cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_MURU = 0x31,
1225cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_BF = 0x33,
1226cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_CHANNEL_SWITCH = 0x34,
1227cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_THERMAL = 0x35,
1228cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_VOW = 0x37,
1229cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_RRO = 0x57,
1230cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_OFFCH_SCAN_CTRL = 0x58,
1231cbb3ec25SBjoern A. Zeeb MCU_UNI_CMD_ASSERT_DUMP = 0x6f,
12326c92544dSBjoern A. Zeeb };
12336c92544dSBjoern A. Zeeb
12346c92544dSBjoern A. Zeeb enum {
12356c92544dSBjoern A. Zeeb MCU_CMD_TARGET_ADDRESS_LEN_REQ = 0x01,
12366c92544dSBjoern A. Zeeb MCU_CMD_FW_START_REQ = 0x02,
12376c92544dSBjoern A. Zeeb MCU_CMD_INIT_ACCESS_REG = 0x3,
12386c92544dSBjoern A. Zeeb MCU_CMD_NIC_POWER_CTRL = 0x4,
12396c92544dSBjoern A. Zeeb MCU_CMD_PATCH_START_REQ = 0x05,
12406c92544dSBjoern A. Zeeb MCU_CMD_PATCH_FINISH_REQ = 0x07,
12416c92544dSBjoern A. Zeeb MCU_CMD_PATCH_SEM_CONTROL = 0x10,
12426c92544dSBjoern A. Zeeb MCU_CMD_WA_PARAM = 0xc4,
12436c92544dSBjoern A. Zeeb MCU_CMD_EXT_CID = 0xed,
12446c92544dSBjoern A. Zeeb MCU_CMD_FW_SCATTER = 0xee,
12456c92544dSBjoern A. Zeeb MCU_CMD_RESTART_DL_REQ = 0xef,
12466c92544dSBjoern A. Zeeb };
12476c92544dSBjoern A. Zeeb
12486c92544dSBjoern A. Zeeb /* offload mcu commands */
12496c92544dSBjoern A. Zeeb enum {
12506c92544dSBjoern A. Zeeb MCU_CE_CMD_TEST_CTRL = 0x01,
12516c92544dSBjoern A. Zeeb MCU_CE_CMD_START_HW_SCAN = 0x03,
12526c92544dSBjoern A. Zeeb MCU_CE_CMD_SET_PS_PROFILE = 0x05,
1253cbb3ec25SBjoern A. Zeeb MCU_CE_CMD_SET_RX_FILTER = 0x0a,
12546c92544dSBjoern A. Zeeb MCU_CE_CMD_SET_CHAN_DOMAIN = 0x0f,
12556c92544dSBjoern A. Zeeb MCU_CE_CMD_SET_BSS_CONNECTED = 0x16,
12566c92544dSBjoern A. Zeeb MCU_CE_CMD_SET_BSS_ABORT = 0x17,
12576c92544dSBjoern A. Zeeb MCU_CE_CMD_CANCEL_HW_SCAN = 0x1b,
12586c92544dSBjoern A. Zeeb MCU_CE_CMD_SET_ROC = 0x1c,
12596c92544dSBjoern A. Zeeb MCU_CE_CMD_SET_EDCA_PARMS = 0x1d,
12606c92544dSBjoern A. Zeeb MCU_CE_CMD_SET_P2P_OPPPS = 0x33,
12616c92544dSBjoern A. Zeeb MCU_CE_CMD_SET_CLC = 0x5c,
12626c92544dSBjoern A. Zeeb MCU_CE_CMD_SET_RATE_TX_POWER = 0x5d,
12636c92544dSBjoern A. Zeeb MCU_CE_CMD_SCHED_SCAN_ENABLE = 0x61,
12646c92544dSBjoern A. Zeeb MCU_CE_CMD_SCHED_SCAN_REQ = 0x62,
12656c92544dSBjoern A. Zeeb MCU_CE_CMD_GET_NIC_CAPAB = 0x8a,
12666c92544dSBjoern A. Zeeb MCU_CE_CMD_SET_MU_EDCA_PARMS = 0xb0,
12676c92544dSBjoern A. Zeeb MCU_CE_CMD_REG_WRITE = 0xc0,
12686c92544dSBjoern A. Zeeb MCU_CE_CMD_REG_READ = 0xc0,
12696c92544dSBjoern A. Zeeb MCU_CE_CMD_CHIP_CONFIG = 0xca,
12706c92544dSBjoern A. Zeeb MCU_CE_CMD_FWLOG_2_HOST = 0xc5,
12716c92544dSBjoern A. Zeeb MCU_CE_CMD_GET_WTBL = 0xcd,
12726c92544dSBjoern A. Zeeb MCU_CE_CMD_GET_TXPWR = 0xd0,
12736c92544dSBjoern A. Zeeb };
12746c92544dSBjoern A. Zeeb
12756c92544dSBjoern A. Zeeb enum {
12766c92544dSBjoern A. Zeeb PATCH_SEM_RELEASE,
12776c92544dSBjoern A. Zeeb PATCH_SEM_GET
12786c92544dSBjoern A. Zeeb };
12796c92544dSBjoern A. Zeeb
12806c92544dSBjoern A. Zeeb enum {
12816c92544dSBjoern A. Zeeb UNI_BSS_INFO_BASIC = 0,
1282cbb3ec25SBjoern A. Zeeb UNI_BSS_INFO_RA = 1,
12836c92544dSBjoern A. Zeeb UNI_BSS_INFO_RLM = 2,
12846c92544dSBjoern A. Zeeb UNI_BSS_INFO_BSS_COLOR = 4,
12856c92544dSBjoern A. Zeeb UNI_BSS_INFO_HE_BASIC = 5,
12866c92544dSBjoern A. Zeeb UNI_BSS_INFO_BCN_CONTENT = 7,
1287cbb3ec25SBjoern A. Zeeb UNI_BSS_INFO_BCN_CSA = 8,
1288cbb3ec25SBjoern A. Zeeb UNI_BSS_INFO_BCN_BCC = 9,
1289cbb3ec25SBjoern A. Zeeb UNI_BSS_INFO_BCN_MBSSID = 10,
1290cbb3ec25SBjoern A. Zeeb UNI_BSS_INFO_RATE = 11,
12916c92544dSBjoern A. Zeeb UNI_BSS_INFO_QBSS = 15,
1292cbb3ec25SBjoern A. Zeeb UNI_BSS_INFO_SEC = 16,
1293cbb3ec25SBjoern A. Zeeb UNI_BSS_INFO_TXCMD = 18,
12946c92544dSBjoern A. Zeeb UNI_BSS_INFO_UAPSD = 19,
12956c92544dSBjoern A. Zeeb UNI_BSS_INFO_PS = 21,
12966c92544dSBjoern A. Zeeb UNI_BSS_INFO_BCNFT = 22,
1297cbb3ec25SBjoern A. Zeeb UNI_BSS_INFO_IFS_TIME = 23,
1298cbb3ec25SBjoern A. Zeeb UNI_BSS_INFO_OFFLOAD = 25,
1299cbb3ec25SBjoern A. Zeeb UNI_BSS_INFO_MLD = 26,
13006c92544dSBjoern A. Zeeb };
13016c92544dSBjoern A. Zeeb
13026c92544dSBjoern A. Zeeb enum {
13036c92544dSBjoern A. Zeeb UNI_OFFLOAD_OFFLOAD_ARP,
13046c92544dSBjoern A. Zeeb UNI_OFFLOAD_OFFLOAD_ND,
13056c92544dSBjoern A. Zeeb UNI_OFFLOAD_OFFLOAD_GTK_REKEY,
13066c92544dSBjoern A. Zeeb UNI_OFFLOAD_OFFLOAD_BMC_RPY_DETECT,
13076c92544dSBjoern A. Zeeb };
13086c92544dSBjoern A. Zeeb
13096c92544dSBjoern A. Zeeb enum {
13106c92544dSBjoern A. Zeeb MT_NIC_CAP_TX_RESOURCE,
13116c92544dSBjoern A. Zeeb MT_NIC_CAP_TX_EFUSE_ADDR,
13126c92544dSBjoern A. Zeeb MT_NIC_CAP_COEX,
13136c92544dSBjoern A. Zeeb MT_NIC_CAP_SINGLE_SKU,
13146c92544dSBjoern A. Zeeb MT_NIC_CAP_CSUM_OFFLOAD,
13156c92544dSBjoern A. Zeeb MT_NIC_CAP_HW_VER,
13166c92544dSBjoern A. Zeeb MT_NIC_CAP_SW_VER,
13176c92544dSBjoern A. Zeeb MT_NIC_CAP_MAC_ADDR,
13186c92544dSBjoern A. Zeeb MT_NIC_CAP_PHY,
13196c92544dSBjoern A. Zeeb MT_NIC_CAP_MAC,
13206c92544dSBjoern A. Zeeb MT_NIC_CAP_FRAME_BUF,
13216c92544dSBjoern A. Zeeb MT_NIC_CAP_BEAM_FORM,
13226c92544dSBjoern A. Zeeb MT_NIC_CAP_LOCATION,
13236c92544dSBjoern A. Zeeb MT_NIC_CAP_MUMIMO,
13246c92544dSBjoern A. Zeeb MT_NIC_CAP_BUFFER_MODE_INFO,
13256c92544dSBjoern A. Zeeb MT_NIC_CAP_HW_ADIE_VERSION = 0x14,
13266c92544dSBjoern A. Zeeb MT_NIC_CAP_ANTSWP = 0x16,
13276c92544dSBjoern A. Zeeb MT_NIC_CAP_WFDMA_REALLOC,
13286c92544dSBjoern A. Zeeb MT_NIC_CAP_6G,
13296c92544dSBjoern A. Zeeb };
13306c92544dSBjoern A. Zeeb
13316c92544dSBjoern A. Zeeb #define UNI_WOW_DETECT_TYPE_MAGIC BIT(0)
13326c92544dSBjoern A. Zeeb #define UNI_WOW_DETECT_TYPE_ANY BIT(1)
13336c92544dSBjoern A. Zeeb #define UNI_WOW_DETECT_TYPE_DISCONNECT BIT(2)
13346c92544dSBjoern A. Zeeb #define UNI_WOW_DETECT_TYPE_GTK_REKEY_FAIL BIT(3)
13356c92544dSBjoern A. Zeeb #define UNI_WOW_DETECT_TYPE_BCN_LOST BIT(4)
13366c92544dSBjoern A. Zeeb #define UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT BIT(5)
13376c92544dSBjoern A. Zeeb #define UNI_WOW_DETECT_TYPE_BITMAP BIT(6)
13386c92544dSBjoern A. Zeeb
13396c92544dSBjoern A. Zeeb enum {
13406c92544dSBjoern A. Zeeb UNI_SUSPEND_MODE_SETTING,
13416c92544dSBjoern A. Zeeb UNI_SUSPEND_WOW_CTRL,
13426c92544dSBjoern A. Zeeb UNI_SUSPEND_WOW_GPIO_PARAM,
13436c92544dSBjoern A. Zeeb UNI_SUSPEND_WOW_WAKEUP_PORT,
13446c92544dSBjoern A. Zeeb UNI_SUSPEND_WOW_PATTERN,
13456c92544dSBjoern A. Zeeb };
13466c92544dSBjoern A. Zeeb
13476c92544dSBjoern A. Zeeb enum {
13486c92544dSBjoern A. Zeeb WOW_USB = 1,
13496c92544dSBjoern A. Zeeb WOW_PCIE = 2,
13506c92544dSBjoern A. Zeeb WOW_GPIO = 3,
13516c92544dSBjoern A. Zeeb };
13526c92544dSBjoern A. Zeeb
13536c92544dSBjoern A. Zeeb struct mt76_connac_bss_basic_tlv {
13546c92544dSBjoern A. Zeeb __le16 tag;
13556c92544dSBjoern A. Zeeb __le16 len;
13566c92544dSBjoern A. Zeeb u8 active;
13576c92544dSBjoern A. Zeeb u8 omac_idx;
13586c92544dSBjoern A. Zeeb u8 hw_bss_idx;
13596c92544dSBjoern A. Zeeb u8 band_idx;
13606c92544dSBjoern A. Zeeb __le32 conn_type;
13616c92544dSBjoern A. Zeeb u8 conn_state;
13626c92544dSBjoern A. Zeeb u8 wmm_idx;
13636c92544dSBjoern A. Zeeb u8 bssid[ETH_ALEN];
13646c92544dSBjoern A. Zeeb __le16 bmc_tx_wlan_idx;
13656c92544dSBjoern A. Zeeb __le16 bcn_interval;
13666c92544dSBjoern A. Zeeb u8 dtim_period;
13676c92544dSBjoern A. Zeeb u8 phymode; /* bit(0): A
13686c92544dSBjoern A. Zeeb * bit(1): B
13696c92544dSBjoern A. Zeeb * bit(2): G
13706c92544dSBjoern A. Zeeb * bit(3): GN
13716c92544dSBjoern A. Zeeb * bit(4): AN
13726c92544dSBjoern A. Zeeb * bit(5): AC
13736c92544dSBjoern A. Zeeb * bit(6): AX2
13746c92544dSBjoern A. Zeeb * bit(7): AX5
13756c92544dSBjoern A. Zeeb * bit(8): AX6
13766c92544dSBjoern A. Zeeb */
13776c92544dSBjoern A. Zeeb __le16 sta_idx;
13786c92544dSBjoern A. Zeeb __le16 nonht_basic_phy;
13796c92544dSBjoern A. Zeeb u8 phymode_ext; /* bit(0) AX_6G */
13806c92544dSBjoern A. Zeeb u8 pad[1];
13816c92544dSBjoern A. Zeeb } __packed;
13826c92544dSBjoern A. Zeeb
13836c92544dSBjoern A. Zeeb struct mt76_connac_bss_qos_tlv {
13846c92544dSBjoern A. Zeeb __le16 tag;
13856c92544dSBjoern A. Zeeb __le16 len;
13866c92544dSBjoern A. Zeeb u8 qos;
13876c92544dSBjoern A. Zeeb u8 pad[3];
13886c92544dSBjoern A. Zeeb } __packed;
13896c92544dSBjoern A. Zeeb
13906c92544dSBjoern A. Zeeb struct mt76_connac_beacon_loss_event {
13916c92544dSBjoern A. Zeeb u8 bss_idx;
13926c92544dSBjoern A. Zeeb u8 reason;
13936c92544dSBjoern A. Zeeb u8 pad[2];
13946c92544dSBjoern A. Zeeb } __packed;
13956c92544dSBjoern A. Zeeb
13966c92544dSBjoern A. Zeeb struct mt76_connac_mcu_bss_event {
13976c92544dSBjoern A. Zeeb u8 bss_idx;
13986c92544dSBjoern A. Zeeb u8 is_absent;
13996c92544dSBjoern A. Zeeb u8 free_quota;
14006c92544dSBjoern A. Zeeb u8 pad;
14016c92544dSBjoern A. Zeeb } __packed;
14026c92544dSBjoern A. Zeeb
14036c92544dSBjoern A. Zeeb struct mt76_connac_mcu_scan_ssid {
14046c92544dSBjoern A. Zeeb __le32 ssid_len;
14056c92544dSBjoern A. Zeeb u8 ssid[IEEE80211_MAX_SSID_LEN];
14066c92544dSBjoern A. Zeeb } __packed;
14076c92544dSBjoern A. Zeeb
14086c92544dSBjoern A. Zeeb struct mt76_connac_mcu_scan_channel {
14096c92544dSBjoern A. Zeeb u8 band; /* 1: 2.4GHz
14106c92544dSBjoern A. Zeeb * 2: 5.0GHz
14116c92544dSBjoern A. Zeeb * Others: Reserved
14126c92544dSBjoern A. Zeeb */
14136c92544dSBjoern A. Zeeb u8 channel_num;
14146c92544dSBjoern A. Zeeb } __packed;
14156c92544dSBjoern A. Zeeb
14166c92544dSBjoern A. Zeeb struct mt76_connac_mcu_scan_match {
14176c92544dSBjoern A. Zeeb __le32 rssi_th;
14186c92544dSBjoern A. Zeeb u8 ssid[IEEE80211_MAX_SSID_LEN];
14196c92544dSBjoern A. Zeeb u8 ssid_len;
14206c92544dSBjoern A. Zeeb u8 rsv[3];
14216c92544dSBjoern A. Zeeb } __packed;
14226c92544dSBjoern A. Zeeb
14236c92544dSBjoern A. Zeeb struct mt76_connac_hw_scan_req {
14246c92544dSBjoern A. Zeeb u8 seq_num;
14256c92544dSBjoern A. Zeeb u8 bss_idx;
14266c92544dSBjoern A. Zeeb u8 scan_type; /* 0: PASSIVE SCAN
14276c92544dSBjoern A. Zeeb * 1: ACTIVE SCAN
14286c92544dSBjoern A. Zeeb */
14296c92544dSBjoern A. Zeeb u8 ssid_type; /* BIT(0) wildcard SSID
14306c92544dSBjoern A. Zeeb * BIT(1) P2P wildcard SSID
14316c92544dSBjoern A. Zeeb * BIT(2) specified SSID + wildcard SSID
14326c92544dSBjoern A. Zeeb * BIT(2) + ssid_type_ext BIT(0) specified SSID only
14336c92544dSBjoern A. Zeeb */
14346c92544dSBjoern A. Zeeb u8 ssids_num;
14356c92544dSBjoern A. Zeeb u8 probe_req_num; /* Number of probe request for each SSID */
14366c92544dSBjoern A. Zeeb u8 scan_func; /* BIT(0) Enable random MAC scan
14376c92544dSBjoern A. Zeeb * BIT(1) Disable DBDC scan type 1~3.
14386c92544dSBjoern A. Zeeb * BIT(2) Use DBDC scan type 3 (dedicated one RF to scan).
14396c92544dSBjoern A. Zeeb */
14406c92544dSBjoern A. Zeeb u8 version; /* 0: Not support fields after ies.
14416c92544dSBjoern A. Zeeb * 1: Support fields after ies.
14426c92544dSBjoern A. Zeeb */
14436c92544dSBjoern A. Zeeb struct mt76_connac_mcu_scan_ssid ssids[4];
14446c92544dSBjoern A. Zeeb __le16 probe_delay_time;
14456c92544dSBjoern A. Zeeb __le16 channel_dwell_time; /* channel Dwell interval */
14466c92544dSBjoern A. Zeeb __le16 timeout_value;
14476c92544dSBjoern A. Zeeb u8 channel_type; /* 0: Full channels
14486c92544dSBjoern A. Zeeb * 1: Only 2.4GHz channels
14496c92544dSBjoern A. Zeeb * 2: Only 5GHz channels
14506c92544dSBjoern A. Zeeb * 3: P2P social channel only (channel #1, #6 and #11)
14516c92544dSBjoern A. Zeeb * 4: Specified channels
14526c92544dSBjoern A. Zeeb * Others: Reserved
14536c92544dSBjoern A. Zeeb */
14546c92544dSBjoern A. Zeeb u8 channels_num; /* valid when channel_type is 4 */
14556c92544dSBjoern A. Zeeb /* valid when channels_num is set */
14566c92544dSBjoern A. Zeeb struct mt76_connac_mcu_scan_channel channels[32];
14576c92544dSBjoern A. Zeeb __le16 ies_len;
14586c92544dSBjoern A. Zeeb u8 ies[MT76_CONNAC_SCAN_IE_LEN];
14596c92544dSBjoern A. Zeeb /* following fields are valid if version > 0 */
14606c92544dSBjoern A. Zeeb u8 ext_channels_num;
14616c92544dSBjoern A. Zeeb u8 ext_ssids_num;
14626c92544dSBjoern A. Zeeb __le16 channel_min_dwell_time;
14636c92544dSBjoern A. Zeeb struct mt76_connac_mcu_scan_channel ext_channels[32];
14646c92544dSBjoern A. Zeeb struct mt76_connac_mcu_scan_ssid ext_ssids[6];
14656c92544dSBjoern A. Zeeb u8 bssid[ETH_ALEN];
14666c92544dSBjoern A. Zeeb u8 random_mac[ETH_ALEN]; /* valid when BIT(1) in scan_func is set. */
14676c92544dSBjoern A. Zeeb u8 pad[63];
14686c92544dSBjoern A. Zeeb u8 ssid_type_ext;
14696c92544dSBjoern A. Zeeb } __packed;
14706c92544dSBjoern A. Zeeb
14716c92544dSBjoern A. Zeeb #define MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM 64
14726c92544dSBjoern A. Zeeb
14736c92544dSBjoern A. Zeeb struct mt76_connac_hw_scan_done {
14746c92544dSBjoern A. Zeeb u8 seq_num;
14756c92544dSBjoern A. Zeeb u8 sparse_channel_num;
14766c92544dSBjoern A. Zeeb struct mt76_connac_mcu_scan_channel sparse_channel;
14776c92544dSBjoern A. Zeeb u8 complete_channel_num;
14786c92544dSBjoern A. Zeeb u8 current_state;
14796c92544dSBjoern A. Zeeb u8 version;
14806c92544dSBjoern A. Zeeb u8 pad;
14816c92544dSBjoern A. Zeeb __le32 beacon_scan_num;
14826c92544dSBjoern A. Zeeb u8 pno_enabled;
14836c92544dSBjoern A. Zeeb u8 pad2[3];
14846c92544dSBjoern A. Zeeb u8 sparse_channel_valid_num;
14856c92544dSBjoern A. Zeeb u8 pad3[3];
14866c92544dSBjoern A. Zeeb u8 channel_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM];
14876c92544dSBjoern A. Zeeb /* idle format for channel_idle_time
14886c92544dSBjoern A. Zeeb * 0: first bytes: idle time(ms) 2nd byte: dwell time(ms)
14896c92544dSBjoern A. Zeeb * 1: first bytes: idle time(8ms) 2nd byte: dwell time(8ms)
14906c92544dSBjoern A. Zeeb * 2: dwell time (16us)
14916c92544dSBjoern A. Zeeb */
14926c92544dSBjoern A. Zeeb __le16 channel_idle_time[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM];
14936c92544dSBjoern A. Zeeb /* beacon and probe response count */
14946c92544dSBjoern A. Zeeb u8 beacon_probe_num[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM];
14956c92544dSBjoern A. Zeeb u8 mdrdy_count[MT76_CONNAC_SCAN_DONE_EVENT_MAX_CHANNEL_NUM];
14966c92544dSBjoern A. Zeeb __le32 beacon_2g_num;
14976c92544dSBjoern A. Zeeb __le32 beacon_5g_num;
14986c92544dSBjoern A. Zeeb } __packed;
14996c92544dSBjoern A. Zeeb
15006c92544dSBjoern A. Zeeb struct mt76_connac_sched_scan_req {
15016c92544dSBjoern A. Zeeb u8 version;
15026c92544dSBjoern A. Zeeb u8 seq_num;
15036c92544dSBjoern A. Zeeb u8 stop_on_match;
15046c92544dSBjoern A. Zeeb u8 ssids_num;
15056c92544dSBjoern A. Zeeb u8 match_num;
15066c92544dSBjoern A. Zeeb u8 pad;
15076c92544dSBjoern A. Zeeb __le16 ie_len;
15086c92544dSBjoern A. Zeeb struct mt76_connac_mcu_scan_ssid ssids[MT76_CONNAC_MAX_SCHED_SCAN_SSID];
15096c92544dSBjoern A. Zeeb struct mt76_connac_mcu_scan_match match[MT76_CONNAC_MAX_SCAN_MATCH];
15106c92544dSBjoern A. Zeeb u8 channel_type;
15116c92544dSBjoern A. Zeeb u8 channels_num;
15126c92544dSBjoern A. Zeeb u8 intervals_num;
15136c92544dSBjoern A. Zeeb u8 scan_func; /* MT7663: BIT(0) eable random mac address */
15146c92544dSBjoern A. Zeeb struct mt76_connac_mcu_scan_channel channels[64];
15156c92544dSBjoern A. Zeeb __le16 intervals[MT76_CONNAC_MAX_NUM_SCHED_SCAN_INTERVAL];
15166c92544dSBjoern A. Zeeb union {
15176c92544dSBjoern A. Zeeb struct {
15186c92544dSBjoern A. Zeeb u8 random_mac[ETH_ALEN];
15196c92544dSBjoern A. Zeeb u8 pad2[58];
15206c92544dSBjoern A. Zeeb } mt7663;
15216c92544dSBjoern A. Zeeb struct {
15226c92544dSBjoern A. Zeeb u8 bss_idx;
15236c92544dSBjoern A. Zeeb u8 pad1[3];
15246c92544dSBjoern A. Zeeb __le32 delay;
15256c92544dSBjoern A. Zeeb u8 pad2[12];
15266c92544dSBjoern A. Zeeb u8 random_mac[ETH_ALEN];
15276c92544dSBjoern A. Zeeb u8 pad3[38];
15286c92544dSBjoern A. Zeeb } mt7921;
15296c92544dSBjoern A. Zeeb };
15306c92544dSBjoern A. Zeeb } __packed;
15316c92544dSBjoern A. Zeeb
15326c92544dSBjoern A. Zeeb struct mt76_connac_sched_scan_done {
15336c92544dSBjoern A. Zeeb u8 seq_num;
15346c92544dSBjoern A. Zeeb u8 status; /* 0: ssid found */
15356c92544dSBjoern A. Zeeb __le16 pad;
15366c92544dSBjoern A. Zeeb } __packed;
15376c92544dSBjoern A. Zeeb
15386c92544dSBjoern A. Zeeb struct bss_info_uni_bss_color {
15396c92544dSBjoern A. Zeeb __le16 tag;
15406c92544dSBjoern A. Zeeb __le16 len;
15416c92544dSBjoern A. Zeeb u8 enable;
15426c92544dSBjoern A. Zeeb u8 bss_color;
15436c92544dSBjoern A. Zeeb u8 rsv[2];
15446c92544dSBjoern A. Zeeb } __packed;
15456c92544dSBjoern A. Zeeb
15466c92544dSBjoern A. Zeeb struct bss_info_uni_he {
15476c92544dSBjoern A. Zeeb __le16 tag;
15486c92544dSBjoern A. Zeeb __le16 len;
15496c92544dSBjoern A. Zeeb __le16 he_rts_thres;
15506c92544dSBjoern A. Zeeb u8 he_pe_duration;
15516c92544dSBjoern A. Zeeb u8 su_disable;
15526c92544dSBjoern A. Zeeb __le16 max_nss_mcs[CMD_HE_MCS_BW_NUM];
15536c92544dSBjoern A. Zeeb u8 rsv[2];
15546c92544dSBjoern A. Zeeb } __packed;
15556c92544dSBjoern A. Zeeb
15566c92544dSBjoern A. Zeeb struct mt76_connac_gtk_rekey_tlv {
15576c92544dSBjoern A. Zeeb __le16 tag;
15586c92544dSBjoern A. Zeeb __le16 len;
15596c92544dSBjoern A. Zeeb u8 kek[NL80211_KEK_LEN];
15606c92544dSBjoern A. Zeeb u8 kck[NL80211_KCK_LEN];
15616c92544dSBjoern A. Zeeb u8 replay_ctr[NL80211_REPLAY_CTR_LEN];
15626c92544dSBjoern A. Zeeb u8 rekey_mode; /* 0: rekey offload enable
15636c92544dSBjoern A. Zeeb * 1: rekey offload disable
15646c92544dSBjoern A. Zeeb * 2: rekey update
15656c92544dSBjoern A. Zeeb */
15666c92544dSBjoern A. Zeeb u8 keyid;
15676c92544dSBjoern A. Zeeb u8 option; /* 1: rekey data update without enabling offload */
15686c92544dSBjoern A. Zeeb u8 pad[1];
15696c92544dSBjoern A. Zeeb __le32 proto; /* WPA-RSN-WAPI-OPSN */
15706c92544dSBjoern A. Zeeb __le32 pairwise_cipher;
15716c92544dSBjoern A. Zeeb __le32 group_cipher;
15726c92544dSBjoern A. Zeeb __le32 key_mgmt; /* NONE-PSK-IEEE802.1X */
15736c92544dSBjoern A. Zeeb __le32 mgmt_group_cipher;
15746c92544dSBjoern A. Zeeb u8 reserverd[4];
15756c92544dSBjoern A. Zeeb } __packed;
15766c92544dSBjoern A. Zeeb
15776c92544dSBjoern A. Zeeb #define MT76_CONNAC_WOW_MASK_MAX_LEN 16
15786c92544dSBjoern A. Zeeb #define MT76_CONNAC_WOW_PATTEN_MAX_LEN 128
15796c92544dSBjoern A. Zeeb
15806c92544dSBjoern A. Zeeb struct mt76_connac_wow_pattern_tlv {
15816c92544dSBjoern A. Zeeb __le16 tag;
15826c92544dSBjoern A. Zeeb __le16 len;
15836c92544dSBjoern A. Zeeb u8 index; /* pattern index */
15846c92544dSBjoern A. Zeeb u8 enable; /* 0: disable
15856c92544dSBjoern A. Zeeb * 1: enable
15866c92544dSBjoern A. Zeeb */
15876c92544dSBjoern A. Zeeb u8 data_len; /* pattern length */
15886c92544dSBjoern A. Zeeb u8 pad;
15896c92544dSBjoern A. Zeeb u8 mask[MT76_CONNAC_WOW_MASK_MAX_LEN];
15906c92544dSBjoern A. Zeeb u8 pattern[MT76_CONNAC_WOW_PATTEN_MAX_LEN];
15916c92544dSBjoern A. Zeeb u8 rsv[4];
15926c92544dSBjoern A. Zeeb } __packed;
15936c92544dSBjoern A. Zeeb
15946c92544dSBjoern A. Zeeb struct mt76_connac_wow_ctrl_tlv {
15956c92544dSBjoern A. Zeeb __le16 tag;
15966c92544dSBjoern A. Zeeb __le16 len;
15976c92544dSBjoern A. Zeeb u8 cmd; /* 0x1: PM_WOWLAN_REQ_START
15986c92544dSBjoern A. Zeeb * 0x2: PM_WOWLAN_REQ_STOP
15996c92544dSBjoern A. Zeeb * 0x3: PM_WOWLAN_PARAM_CLEAR
16006c92544dSBjoern A. Zeeb */
16016c92544dSBjoern A. Zeeb u8 trigger; /* 0: NONE
16026c92544dSBjoern A. Zeeb * BIT(0): NL80211_WOWLAN_TRIG_MAGIC_PKT
16036c92544dSBjoern A. Zeeb * BIT(1): NL80211_WOWLAN_TRIG_ANY
16046c92544dSBjoern A. Zeeb * BIT(2): NL80211_WOWLAN_TRIG_DISCONNECT
16056c92544dSBjoern A. Zeeb * BIT(3): NL80211_WOWLAN_TRIG_GTK_REKEY_FAILURE
16066c92544dSBjoern A. Zeeb * BIT(4): BEACON_LOST
16076c92544dSBjoern A. Zeeb * BIT(5): NL80211_WOWLAN_TRIG_NET_DETECT
16086c92544dSBjoern A. Zeeb */
16096c92544dSBjoern A. Zeeb u8 wakeup_hif; /* 0x0: HIF_SDIO
16106c92544dSBjoern A. Zeeb * 0x1: HIF_USB
16116c92544dSBjoern A. Zeeb * 0x2: HIF_PCIE
16126c92544dSBjoern A. Zeeb * 0x3: HIF_GPIO
16136c92544dSBjoern A. Zeeb */
16146c92544dSBjoern A. Zeeb u8 pad;
16156c92544dSBjoern A. Zeeb u8 rsv[4];
16166c92544dSBjoern A. Zeeb } __packed;
16176c92544dSBjoern A. Zeeb
16186c92544dSBjoern A. Zeeb struct mt76_connac_wow_gpio_param_tlv {
16196c92544dSBjoern A. Zeeb __le16 tag;
16206c92544dSBjoern A. Zeeb __le16 len;
16216c92544dSBjoern A. Zeeb u8 gpio_pin;
16226c92544dSBjoern A. Zeeb u8 trigger_lvl;
16236c92544dSBjoern A. Zeeb u8 pad[2];
16246c92544dSBjoern A. Zeeb __le32 gpio_interval;
16256c92544dSBjoern A. Zeeb u8 rsv[4];
16266c92544dSBjoern A. Zeeb } __packed;
16276c92544dSBjoern A. Zeeb
16286c92544dSBjoern A. Zeeb struct mt76_connac_arpns_tlv {
16296c92544dSBjoern A. Zeeb __le16 tag;
16306c92544dSBjoern A. Zeeb __le16 len;
16316c92544dSBjoern A. Zeeb u8 mode;
16326c92544dSBjoern A. Zeeb u8 ips_num;
16336c92544dSBjoern A. Zeeb u8 option;
16346c92544dSBjoern A. Zeeb u8 pad[1];
16356c92544dSBjoern A. Zeeb } __packed;
16366c92544dSBjoern A. Zeeb
16376c92544dSBjoern A. Zeeb struct mt76_connac_suspend_tlv {
16386c92544dSBjoern A. Zeeb __le16 tag;
16396c92544dSBjoern A. Zeeb __le16 len;
16406c92544dSBjoern A. Zeeb u8 enable; /* 0: suspend mode disabled
16416c92544dSBjoern A. Zeeb * 1: suspend mode enabled
16426c92544dSBjoern A. Zeeb */
16436c92544dSBjoern A. Zeeb u8 mdtim; /* LP parameter */
16446c92544dSBjoern A. Zeeb u8 wow_suspend; /* 0: update by origin policy
16456c92544dSBjoern A. Zeeb * 1: update by wow dtim
16466c92544dSBjoern A. Zeeb */
16476c92544dSBjoern A. Zeeb u8 pad[5];
16486c92544dSBjoern A. Zeeb } __packed;
16496c92544dSBjoern A. Zeeb
16506c92544dSBjoern A. Zeeb enum mt76_sta_info_state {
16516c92544dSBjoern A. Zeeb MT76_STA_INFO_STATE_NONE,
16526c92544dSBjoern A. Zeeb MT76_STA_INFO_STATE_AUTH,
16536c92544dSBjoern A. Zeeb MT76_STA_INFO_STATE_ASSOC
16546c92544dSBjoern A. Zeeb };
16556c92544dSBjoern A. Zeeb
16566c92544dSBjoern A. Zeeb struct mt76_sta_cmd_info {
16576c92544dSBjoern A. Zeeb struct ieee80211_sta *sta;
16586c92544dSBjoern A. Zeeb struct mt76_wcid *wcid;
16596c92544dSBjoern A. Zeeb
16606c92544dSBjoern A. Zeeb struct ieee80211_vif *vif;
16616c92544dSBjoern A. Zeeb
16626c92544dSBjoern A. Zeeb bool offload_fw;
16636c92544dSBjoern A. Zeeb bool enable;
16646c92544dSBjoern A. Zeeb bool newly;
16656c92544dSBjoern A. Zeeb int cmd;
16666c92544dSBjoern A. Zeeb u8 rcpi;
16676c92544dSBjoern A. Zeeb u8 state;
16686c92544dSBjoern A. Zeeb };
16696c92544dSBjoern A. Zeeb
16706c92544dSBjoern A. Zeeb #define MT_SKU_POWER_LIMIT 161
16716c92544dSBjoern A. Zeeb
16726c92544dSBjoern A. Zeeb struct mt76_connac_sku_tlv {
16736c92544dSBjoern A. Zeeb u8 channel;
16746c92544dSBjoern A. Zeeb s8 pwr_limit[MT_SKU_POWER_LIMIT];
16756c92544dSBjoern A. Zeeb } __packed;
16766c92544dSBjoern A. Zeeb
16776c92544dSBjoern A. Zeeb struct mt76_connac_tx_power_limit_tlv {
16786c92544dSBjoern A. Zeeb /* DW0 - common info*/
16796c92544dSBjoern A. Zeeb u8 ver;
16806c92544dSBjoern A. Zeeb u8 pad0;
16816c92544dSBjoern A. Zeeb __le16 len;
16826c92544dSBjoern A. Zeeb /* DW1 - cmd hint */
16836c92544dSBjoern A. Zeeb u8 n_chan; /* # channel */
16846c92544dSBjoern A. Zeeb u8 band; /* 2.4GHz - 5GHz - 6GHz */
16856c92544dSBjoern A. Zeeb u8 last_msg;
16866c92544dSBjoern A. Zeeb u8 pad1;
16876c92544dSBjoern A. Zeeb /* DW3 */
16886c92544dSBjoern A. Zeeb u8 alpha2[4]; /* regulatory_request.alpha2 */
16896c92544dSBjoern A. Zeeb u8 pad2[32];
16906c92544dSBjoern A. Zeeb } __packed;
16916c92544dSBjoern A. Zeeb
16926c92544dSBjoern A. Zeeb struct mt76_connac_config {
16936c92544dSBjoern A. Zeeb __le16 id;
16946c92544dSBjoern A. Zeeb u8 type;
16956c92544dSBjoern A. Zeeb u8 resp_type;
16966c92544dSBjoern A. Zeeb __le16 data_size;
16976c92544dSBjoern A. Zeeb __le16 resv;
16986c92544dSBjoern A. Zeeb u8 data[320];
16996c92544dSBjoern A. Zeeb } __packed;
17006c92544dSBjoern A. Zeeb
1701cbb3ec25SBjoern A. Zeeb struct mt76_connac_mcu_uni_event {
1702cbb3ec25SBjoern A. Zeeb u8 cid;
1703cbb3ec25SBjoern A. Zeeb u8 pad[3];
1704cbb3ec25SBjoern A. Zeeb __le32 status; /* 0: success, others: fail */
1705cbb3ec25SBjoern A. Zeeb } __packed;
1706cbb3ec25SBjoern A. Zeeb
1707cbb3ec25SBjoern A. Zeeb struct mt76_connac_mcu_reg_event {
1708cbb3ec25SBjoern A. Zeeb __le32 reg;
1709cbb3ec25SBjoern A. Zeeb __le32 val;
1710cbb3ec25SBjoern A. Zeeb } __packed;
1711cbb3ec25SBjoern A. Zeeb
17126c92544dSBjoern A. Zeeb static inline enum mcu_cipher_type
mt76_connac_mcu_get_cipher(int cipher)17136c92544dSBjoern A. Zeeb mt76_connac_mcu_get_cipher(int cipher)
17146c92544dSBjoern A. Zeeb {
17156c92544dSBjoern A. Zeeb switch (cipher) {
17166c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_WEP40:
17176c92544dSBjoern A. Zeeb return MCU_CIPHER_WEP40;
17186c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_WEP104:
17196c92544dSBjoern A. Zeeb return MCU_CIPHER_WEP104;
17206c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_TKIP:
17216c92544dSBjoern A. Zeeb return MCU_CIPHER_TKIP;
17226c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_AES_CMAC:
17236c92544dSBjoern A. Zeeb return MCU_CIPHER_BIP_CMAC_128;
17246c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_CCMP:
17256c92544dSBjoern A. Zeeb return MCU_CIPHER_AES_CCMP;
17266c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_CCMP_256:
17276c92544dSBjoern A. Zeeb return MCU_CIPHER_CCMP_256;
17286c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_GCMP:
17296c92544dSBjoern A. Zeeb return MCU_CIPHER_GCMP;
17306c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_GCMP_256:
17316c92544dSBjoern A. Zeeb return MCU_CIPHER_GCMP_256;
17326c92544dSBjoern A. Zeeb case WLAN_CIPHER_SUITE_SMS4:
17336c92544dSBjoern A. Zeeb return MCU_CIPHER_WAPI;
17346c92544dSBjoern A. Zeeb default:
17356c92544dSBjoern A. Zeeb return MCU_CIPHER_NONE;
17366c92544dSBjoern A. Zeeb }
17376c92544dSBjoern A. Zeeb }
17386c92544dSBjoern A. Zeeb
17396c92544dSBjoern A. Zeeb static inline u32
mt76_connac_mcu_gen_dl_mode(struct mt76_dev * dev,u8 feature_set,bool is_wa)17406c92544dSBjoern A. Zeeb mt76_connac_mcu_gen_dl_mode(struct mt76_dev *dev, u8 feature_set, bool is_wa)
17416c92544dSBjoern A. Zeeb {
17426c92544dSBjoern A. Zeeb u32 ret = 0;
17436c92544dSBjoern A. Zeeb
17446c92544dSBjoern A. Zeeb ret |= feature_set & FW_FEATURE_SET_ENCRYPT ?
17456c92544dSBjoern A. Zeeb DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV : 0;
17466c92544dSBjoern A. Zeeb if (is_mt7921(dev))
17476c92544dSBjoern A. Zeeb ret |= feature_set & FW_FEATURE_ENCRY_MODE ?
17486c92544dSBjoern A. Zeeb DL_CONFIG_ENCRY_MODE_SEL : 0;
17496c92544dSBjoern A. Zeeb ret |= FIELD_PREP(DL_MODE_KEY_IDX,
17506c92544dSBjoern A. Zeeb FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set));
17516c92544dSBjoern A. Zeeb ret |= DL_MODE_NEED_RSP;
17526c92544dSBjoern A. Zeeb ret |= is_wa ? DL_MODE_WORKING_PDA_CR4 : 0;
17536c92544dSBjoern A. Zeeb
17546c92544dSBjoern A. Zeeb return ret;
17556c92544dSBjoern A. Zeeb }
17566c92544dSBjoern A. Zeeb
17576c92544dSBjoern A. Zeeb #define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id)
1758cbb3ec25SBjoern A. Zeeb #define to_wcid_hi(id) FIELD_GET(GENMASK(10, 8), (u16)id)
17596c92544dSBjoern A. Zeeb
17606c92544dSBjoern A. Zeeb static inline void
mt76_connac_mcu_get_wlan_idx(struct mt76_dev * dev,struct mt76_wcid * wcid,u8 * wlan_idx_lo,u8 * wlan_idx_hi)17616c92544dSBjoern A. Zeeb mt76_connac_mcu_get_wlan_idx(struct mt76_dev *dev, struct mt76_wcid *wcid,
17626c92544dSBjoern A. Zeeb u8 *wlan_idx_lo, u8 *wlan_idx_hi)
17636c92544dSBjoern A. Zeeb {
17646c92544dSBjoern A. Zeeb *wlan_idx_hi = 0;
17656c92544dSBjoern A. Zeeb
17666c92544dSBjoern A. Zeeb if (!is_connac_v1(dev)) {
17676c92544dSBjoern A. Zeeb *wlan_idx_lo = wcid ? to_wcid_lo(wcid->idx) : 0;
17686c92544dSBjoern A. Zeeb *wlan_idx_hi = wcid ? to_wcid_hi(wcid->idx) : 0;
17696c92544dSBjoern A. Zeeb } else {
17706c92544dSBjoern A. Zeeb *wlan_idx_lo = wcid ? wcid->idx : 0;
17716c92544dSBjoern A. Zeeb }
17726c92544dSBjoern A. Zeeb }
17736c92544dSBjoern A. Zeeb
17746c92544dSBjoern A. Zeeb struct sk_buff *
17756c92544dSBjoern A. Zeeb __mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif,
17766c92544dSBjoern A. Zeeb struct mt76_wcid *wcid, int len);
17776c92544dSBjoern A. Zeeb static inline struct sk_buff *
mt76_connac_mcu_alloc_sta_req(struct mt76_dev * dev,struct mt76_vif * mvif,struct mt76_wcid * wcid)17786c92544dSBjoern A. Zeeb mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif,
17796c92544dSBjoern A. Zeeb struct mt76_wcid *wcid)
17806c92544dSBjoern A. Zeeb {
17816c92544dSBjoern A. Zeeb return __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid,
17826c92544dSBjoern A. Zeeb MT76_CONNAC_STA_UPDATE_MAX_SIZE);
17836c92544dSBjoern A. Zeeb }
17846c92544dSBjoern A. Zeeb
17856c92544dSBjoern A. Zeeb struct wtbl_req_hdr *
17866c92544dSBjoern A. Zeeb mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid,
17876c92544dSBjoern A. Zeeb int cmd, void *sta_wtbl, struct sk_buff **skb);
17886c92544dSBjoern A. Zeeb struct tlv *mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag,
17896c92544dSBjoern A. Zeeb int len, void *sta_ntlv,
17906c92544dSBjoern A. Zeeb void *sta_wtbl);
17916c92544dSBjoern A. Zeeb static inline struct tlv *
mt76_connac_mcu_add_tlv(struct sk_buff * skb,int tag,int len)17926c92544dSBjoern A. Zeeb mt76_connac_mcu_add_tlv(struct sk_buff *skb, int tag, int len)
17936c92544dSBjoern A. Zeeb {
17946c92544dSBjoern A. Zeeb return mt76_connac_mcu_add_nested_tlv(skb, tag, len, skb->data, NULL);
17956c92544dSBjoern A. Zeeb }
17966c92544dSBjoern A. Zeeb
17976c92544dSBjoern A. Zeeb int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy);
17986c92544dSBjoern A. Zeeb int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif);
1799cbb3ec25SBjoern A. Zeeb void mt76_connac_mcu_sta_basic_tlv(struct mt76_dev *dev, struct sk_buff *skb,
18006c92544dSBjoern A. Zeeb struct ieee80211_vif *vif,
18016c92544dSBjoern A. Zeeb struct ieee80211_sta *sta, bool enable,
18026c92544dSBjoern A. Zeeb bool newly);
18036c92544dSBjoern A. Zeeb void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, struct sk_buff *skb,
18046c92544dSBjoern A. Zeeb struct ieee80211_vif *vif,
18056c92544dSBjoern A. Zeeb struct ieee80211_sta *sta, void *sta_wtbl,
18066c92544dSBjoern A. Zeeb void *wtbl_tlv);
18076c92544dSBjoern A. Zeeb void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb,
18086c92544dSBjoern A. Zeeb struct ieee80211_vif *vif,
18096c92544dSBjoern A. Zeeb struct mt76_wcid *wcid,
18106c92544dSBjoern A. Zeeb void *sta_wtbl, void *wtbl_tlv);
18116c92544dSBjoern A. Zeeb int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev,
18126c92544dSBjoern A. Zeeb struct ieee80211_vif *vif,
18136c92544dSBjoern A. Zeeb struct mt76_wcid *wcid, int cmd);
18146c92544dSBjoern A. Zeeb int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev,
18156c92544dSBjoern A. Zeeb struct ieee80211_vif *vif,
18166c92544dSBjoern A. Zeeb struct ieee80211_sta *sta);
18176c92544dSBjoern A. Zeeb void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb,
18186c92544dSBjoern A. Zeeb struct ieee80211_sta *sta,
18196c92544dSBjoern A. Zeeb struct ieee80211_vif *vif,
18206c92544dSBjoern A. Zeeb u8 rcpi, u8 state);
18216c92544dSBjoern A. Zeeb void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb,
18226c92544dSBjoern A. Zeeb struct ieee80211_sta *sta, void *sta_wtbl,
18236c92544dSBjoern A. Zeeb void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc);
18246c92544dSBjoern A. Zeeb void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb,
18256c92544dSBjoern A. Zeeb struct ieee80211_ampdu_params *params,
18266c92544dSBjoern A. Zeeb bool enable, bool tx, void *sta_wtbl,
18276c92544dSBjoern A. Zeeb void *wtbl_tlv);
18286c92544dSBjoern A. Zeeb void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb,
18296c92544dSBjoern A. Zeeb struct ieee80211_ampdu_params *params,
18306c92544dSBjoern A. Zeeb bool enable, bool tx);
18316c92544dSBjoern A. Zeeb int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy,
18326c92544dSBjoern A. Zeeb struct ieee80211_vif *vif,
18336c92544dSBjoern A. Zeeb struct mt76_wcid *wcid,
18346c92544dSBjoern A. Zeeb bool enable);
18356c92544dSBjoern A. Zeeb int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif,
18366c92544dSBjoern A. Zeeb struct ieee80211_ampdu_params *params,
18376c92544dSBjoern A. Zeeb int cmd, bool enable, bool tx);
1838cbb3ec25SBjoern A. Zeeb int mt76_connac_mcu_uni_set_chctx(struct mt76_phy *phy,
1839cbb3ec25SBjoern A. Zeeb struct mt76_vif *vif,
1840cbb3ec25SBjoern A. Zeeb struct ieee80211_chanctx_conf *ctx);
18416c92544dSBjoern A. Zeeb int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy,
18426c92544dSBjoern A. Zeeb struct ieee80211_vif *vif,
18436c92544dSBjoern A. Zeeb struct mt76_wcid *wcid,
1844cbb3ec25SBjoern A. Zeeb bool enable,
1845cbb3ec25SBjoern A. Zeeb struct ieee80211_chanctx_conf *ctx);
18466c92544dSBjoern A. Zeeb int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy,
18476c92544dSBjoern A. Zeeb struct mt76_sta_cmd_info *info);
18486c92544dSBjoern A. Zeeb void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac,
18496c92544dSBjoern A. Zeeb struct ieee80211_vif *vif);
18506c92544dSBjoern A. Zeeb int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band);
18516c92544dSBjoern A. Zeeb int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable,
18526c92544dSBjoern A. Zeeb bool hdr_trans);
18536c92544dSBjoern A. Zeeb int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len,
18546c92544dSBjoern A. Zeeb u32 mode);
18556c92544dSBjoern A. Zeeb int mt76_connac_mcu_start_patch(struct mt76_dev *dev);
18566c92544dSBjoern A. Zeeb int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get);
18576c92544dSBjoern A. Zeeb int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option);
18586c92544dSBjoern A. Zeeb int mt76_connac_mcu_get_nic_capability(struct mt76_phy *phy);
18596c92544dSBjoern A. Zeeb
18606c92544dSBjoern A. Zeeb int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif,
18616c92544dSBjoern A. Zeeb struct ieee80211_scan_request *scan_req);
18626c92544dSBjoern A. Zeeb int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy,
18636c92544dSBjoern A. Zeeb struct ieee80211_vif *vif);
18646c92544dSBjoern A. Zeeb int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy,
18656c92544dSBjoern A. Zeeb struct ieee80211_vif *vif,
18666c92544dSBjoern A. Zeeb struct cfg80211_sched_scan_request *sreq);
18676c92544dSBjoern A. Zeeb int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy,
18686c92544dSBjoern A. Zeeb struct ieee80211_vif *vif,
18696c92544dSBjoern A. Zeeb bool enable);
18706c92544dSBjoern A. Zeeb int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev,
18716c92544dSBjoern A. Zeeb struct mt76_vif *vif,
18726c92544dSBjoern A. Zeeb struct ieee80211_bss_conf *info);
18736c92544dSBjoern A. Zeeb int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw,
18746c92544dSBjoern A. Zeeb struct ieee80211_vif *vif,
18756c92544dSBjoern A. Zeeb struct cfg80211_gtk_rekey_data *key);
18766c92544dSBjoern A. Zeeb int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend);
18776c92544dSBjoern A. Zeeb void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac,
18786c92544dSBjoern A. Zeeb struct ieee80211_vif *vif);
18796c92544dSBjoern A. Zeeb int mt76_connac_sta_state_dp(struct mt76_dev *dev,
18806c92544dSBjoern A. Zeeb enum ieee80211_sta_state old_state,
18816c92544dSBjoern A. Zeeb enum ieee80211_sta_state new_state);
18826c92544dSBjoern A. Zeeb int mt76_connac_mcu_chip_config(struct mt76_dev *dev);
18836c92544dSBjoern A. Zeeb int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable);
18846c92544dSBjoern A. Zeeb void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb,
18856c92544dSBjoern A. Zeeb struct mt76_connac_coredump *coredump);
18866c92544dSBjoern A. Zeeb int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy);
18876c92544dSBjoern A. Zeeb int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw,
18886c92544dSBjoern A. Zeeb struct ieee80211_vif *vif);
18896c92544dSBjoern A. Zeeb u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset);
18906c92544dSBjoern A. Zeeb void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val);
18916c92544dSBjoern A. Zeeb
18926c92544dSBjoern A. Zeeb const struct ieee80211_sta_he_cap *
18936c92544dSBjoern A. Zeeb mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif);
1894cbb3ec25SBjoern A. Zeeb const struct ieee80211_sta_eht_cap *
1895cbb3ec25SBjoern A. Zeeb mt76_connac_get_eht_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif);
18966c92544dSBjoern A. Zeeb u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif,
18976c92544dSBjoern A. Zeeb enum nl80211_band band, struct ieee80211_sta *sta);
1898cbb3ec25SBjoern A. Zeeb u8 mt76_connac_get_phy_mode_ext(struct mt76_phy *phy, struct ieee80211_vif *vif,
1899cbb3ec25SBjoern A. Zeeb enum nl80211_band band);
19006c92544dSBjoern A. Zeeb
19016c92544dSBjoern A. Zeeb int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif,
19026c92544dSBjoern A. Zeeb struct mt76_connac_sta_key_conf *sta_key_conf,
19036c92544dSBjoern A. Zeeb struct ieee80211_key_conf *key, int mcu_cmd,
19046c92544dSBjoern A. Zeeb struct mt76_wcid *wcid, enum set_key_cmd cmd);
19056c92544dSBjoern A. Zeeb
19066c92544dSBjoern A. Zeeb void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif);
19076c92544dSBjoern A. Zeeb void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb,
19086c92544dSBjoern A. Zeeb struct ieee80211_vif *vif);
19096c92544dSBjoern A. Zeeb int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb,
19106c92544dSBjoern A. Zeeb struct ieee80211_vif *vif,
19116c92544dSBjoern A. Zeeb struct ieee80211_sta *sta,
19126c92544dSBjoern A. Zeeb struct mt76_phy *phy, u16 wlan_idx,
19136c92544dSBjoern A. Zeeb bool enable);
19146c92544dSBjoern A. Zeeb void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif,
19156c92544dSBjoern A. Zeeb struct ieee80211_sta *sta);
19166c92544dSBjoern A. Zeeb void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb,
19176c92544dSBjoern A. Zeeb struct ieee80211_sta *sta,
19186c92544dSBjoern A. Zeeb void *sta_wtbl, void *wtbl_tlv);
19196c92544dSBjoern A. Zeeb int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter);
19206c92544dSBjoern A. Zeeb int mt76_connac_mcu_restart(struct mt76_dev *dev);
19216c92544dSBjoern A. Zeeb int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index,
19226c92544dSBjoern A. Zeeb u8 rx_sel, u8 val);
1923cbb3ec25SBjoern A. Zeeb int mt76_connac_mcu_sta_wed_update(struct mt76_dev *dev, struct sk_buff *skb);
19246c92544dSBjoern A. Zeeb int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm,
19256c92544dSBjoern A. Zeeb const char *fw_wa);
19266c92544dSBjoern A. Zeeb int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name);
19276c92544dSBjoern A. Zeeb int mt76_connac2_mcu_fill_message(struct mt76_dev *mdev, struct sk_buff *skb,
19286c92544dSBjoern A. Zeeb int cmd, int *wait_seq);
19296c92544dSBjoern A. Zeeb #endif /* __MT76_CONNAC_MCU_H */
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