1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (C) 2022 MediaTek Inc. 4 */ 5 6 #include <linux/etherdevice.h> 7 #include <linux/of.h> 8 #include <linux/thermal.h> 9 #include "mt7996.h" 10 #include "mac.h" 11 #include "mcu.h" 12 #include "coredump.h" 13 #include "eeprom.h" 14 #if defined(__FreeBSD__) 15 #include <linux/delay.h> 16 #endif 17 18 static const struct ieee80211_iface_limit if_limits[] = { 19 { 20 .max = 1, 21 .types = BIT(NL80211_IFTYPE_ADHOC) 22 }, { 23 .max = 16, 24 .types = BIT(NL80211_IFTYPE_AP) 25 #ifdef CONFIG_MAC80211_MESH 26 | BIT(NL80211_IFTYPE_MESH_POINT) 27 #endif 28 }, { 29 .max = MT7996_MAX_INTERFACES, 30 .types = BIT(NL80211_IFTYPE_STATION) 31 } 32 }; 33 34 static const struct ieee80211_iface_combination if_comb[] = { 35 { 36 .limits = if_limits, 37 .n_limits = ARRAY_SIZE(if_limits), 38 .max_interfaces = MT7996_MAX_INTERFACES, 39 .num_different_channels = 1, 40 .beacon_int_infra_match = true, 41 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) | 42 BIT(NL80211_CHAN_WIDTH_20) | 43 BIT(NL80211_CHAN_WIDTH_40) | 44 BIT(NL80211_CHAN_WIDTH_80) | 45 BIT(NL80211_CHAN_WIDTH_160), 46 } 47 }; 48 49 static void mt7996_led_set_config(struct led_classdev *led_cdev, 50 u8 delay_on, u8 delay_off) 51 { 52 struct mt7996_dev *dev; 53 struct mt76_phy *mphy; 54 u32 val; 55 56 mphy = container_of(led_cdev, struct mt76_phy, leds.cdev); 57 dev = container_of(mphy->dev, struct mt7996_dev, mt76); 58 59 /* select TX blink mode, 2: only data frames */ 60 mt76_rmw_field(dev, MT_TMAC_TCR0(0), MT_TMAC_TCR0_TX_BLINK, 2); 61 62 /* enable LED */ 63 mt76_wr(dev, MT_LED_EN(0), 1); 64 65 /* set LED Tx blink on/off time */ 66 val = FIELD_PREP(MT_LED_TX_BLINK_ON_MASK, delay_on) | 67 FIELD_PREP(MT_LED_TX_BLINK_OFF_MASK, delay_off); 68 mt76_wr(dev, MT_LED_TX_BLINK(0), val); 69 70 /* control LED */ 71 val = MT_LED_CTRL_BLINK_MODE | MT_LED_CTRL_KICK; 72 if (mphy->leds.al) 73 val |= MT_LED_CTRL_POLARITY; 74 75 mt76_wr(dev, MT_LED_CTRL(0), val); 76 mt76_clear(dev, MT_LED_CTRL(0), MT_LED_CTRL_KICK); 77 } 78 79 static int mt7996_led_set_blink(struct led_classdev *led_cdev, 80 unsigned long *delay_on, 81 unsigned long *delay_off) 82 { 83 u16 delta_on = 0, delta_off = 0; 84 85 #define HW_TICK 10 86 #define TO_HW_TICK(_t) (((_t) > HW_TICK) ? ((_t) / HW_TICK) : HW_TICK) 87 88 if (*delay_on) 89 delta_on = TO_HW_TICK(*delay_on); 90 if (*delay_off) 91 delta_off = TO_HW_TICK(*delay_off); 92 93 mt7996_led_set_config(led_cdev, delta_on, delta_off); 94 95 return 0; 96 } 97 98 static void mt7996_led_set_brightness(struct led_classdev *led_cdev, 99 enum led_brightness brightness) 100 { 101 if (!brightness) 102 mt7996_led_set_config(led_cdev, 0, 0xff); 103 else 104 mt7996_led_set_config(led_cdev, 0xff, 0); 105 } 106 107 void mt7996_init_txpower(struct mt7996_dev *dev, 108 struct ieee80211_supported_band *sband) 109 { 110 int i, nss = hweight8(dev->mphy.antenna_mask); 111 int nss_delta = mt76_tx_power_nss_delta(nss); 112 int pwr_delta = mt7996_eeprom_get_power_delta(dev, sband->band); 113 struct mt76_power_limits limits; 114 115 for (i = 0; i < sband->n_channels; i++) { 116 struct ieee80211_channel *chan = &sband->channels[i]; 117 int target_power = mt7996_eeprom_get_target_power(dev, chan); 118 119 target_power += pwr_delta; 120 target_power = mt76_get_rate_power_limits(&dev->mphy, chan, 121 &limits, 122 target_power); 123 target_power += nss_delta; 124 target_power = DIV_ROUND_UP(target_power, 2); 125 chan->max_power = min_t(int, chan->max_reg_power, 126 target_power); 127 chan->orig_mpwr = target_power; 128 } 129 } 130 131 static void 132 mt7996_regd_notifier(struct wiphy *wiphy, 133 struct regulatory_request *request) 134 { 135 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 136 struct mt7996_dev *dev = mt7996_hw_dev(hw); 137 struct mt7996_phy *phy = mt7996_hw_phy(hw); 138 139 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2)); 140 dev->mt76.region = request->dfs_region; 141 142 if (dev->mt76.region == NL80211_DFS_UNSET) 143 mt7996_mcu_rdd_background_enable(phy, NULL); 144 145 mt7996_init_txpower(dev, &phy->mt76->sband_2g.sband); 146 mt7996_init_txpower(dev, &phy->mt76->sband_5g.sband); 147 mt7996_init_txpower(dev, &phy->mt76->sband_6g.sband); 148 149 phy->mt76->dfs_state = MT_DFS_STATE_UNKNOWN; 150 mt7996_dfs_init_radar_detector(phy); 151 } 152 153 static void 154 mt7996_init_wiphy(struct ieee80211_hw *hw) 155 { 156 struct mt7996_phy *phy = mt7996_hw_phy(hw); 157 #if defined(CONFIG_OF) 158 struct mt76_dev *mdev = &phy->dev->mt76; 159 #endif 160 struct wiphy *wiphy = hw->wiphy; 161 u16 max_subframes = phy->dev->has_eht ? IEEE80211_MAX_AMPDU_BUF_EHT : 162 IEEE80211_MAX_AMPDU_BUF_HE; 163 164 hw->queues = 4; 165 hw->max_rx_aggregation_subframes = max_subframes; 166 hw->max_tx_aggregation_subframes = max_subframes; 167 hw->netdev_features = NETIF_F_RXCSUM; 168 169 hw->radiotap_timestamp.units_pos = 170 IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US; 171 172 phy->slottime = 9; 173 174 hw->sta_data_size = sizeof(struct mt7996_sta); 175 hw->vif_data_size = sizeof(struct mt7996_vif); 176 177 wiphy->iface_combinations = if_comb; 178 wiphy->n_iface_combinations = ARRAY_SIZE(if_comb); 179 wiphy->reg_notifier = mt7996_regd_notifier; 180 wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH; 181 182 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BSS_COLOR); 183 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS); 184 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY); 185 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT); 186 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT); 187 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE); 188 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP); 189 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_FILS_DISCOVERY); 190 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_ACK_SIGNAL_SUPPORT); 191 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); 192 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_MU_MIMO_AIR_SNIFFER); 193 194 #if defined(CONFIG_OF) 195 if (!mdev->dev->of_node || 196 !of_property_read_bool(mdev->dev->of_node, 197 "mediatek,disable-radar-background")) 198 #endif 199 wiphy_ext_feature_set(wiphy, 200 NL80211_EXT_FEATURE_RADAR_BACKGROUND); 201 202 ieee80211_hw_set(hw, HAS_RATE_CONTROL); 203 ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD); 204 ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD); 205 ieee80211_hw_set(hw, WANT_MONITOR_VIF); 206 207 hw->max_tx_fragments = 4; 208 209 if (phy->mt76->cap.has_2ghz) { 210 phy->mt76->sband_2g.sband.ht_cap.cap |= 211 IEEE80211_HT_CAP_LDPC_CODING | 212 IEEE80211_HT_CAP_MAX_AMSDU; 213 phy->mt76->sband_2g.sband.ht_cap.ampdu_density = 214 IEEE80211_HT_MPDU_DENSITY_2; 215 } 216 217 if (phy->mt76->cap.has_5ghz) { 218 phy->mt76->sband_5g.sband.ht_cap.cap |= 219 IEEE80211_HT_CAP_LDPC_CODING | 220 IEEE80211_HT_CAP_MAX_AMSDU; 221 222 phy->mt76->sband_5g.sband.vht_cap.cap |= 223 IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | 224 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK | 225 IEEE80211_VHT_CAP_SHORT_GI_160 | 226 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ; 227 phy->mt76->sband_5g.sband.ht_cap.ampdu_density = 228 IEEE80211_HT_MPDU_DENSITY_1; 229 230 ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW); 231 } 232 233 mt76_set_stream_caps(phy->mt76, true); 234 mt7996_set_stream_vht_txbf_caps(phy); 235 mt7996_set_stream_he_eht_caps(phy); 236 237 wiphy->available_antennas_rx = phy->mt76->antenna_mask; 238 wiphy->available_antennas_tx = phy->mt76->antenna_mask; 239 } 240 241 static void 242 mt7996_mac_init_band(struct mt7996_dev *dev, u8 band) 243 { 244 u32 mask, set; 245 246 /* clear estimated value of EIFS for Rx duration & OBSS time */ 247 mt76_wr(dev, MT_WF_RMAC_RSVD0(band), MT_WF_RMAC_RSVD0_EIFS_CLR); 248 249 /* clear backoff time for Rx duration */ 250 mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME1(band), 251 MT_WF_RMAC_MIB_NONQOSD_BACKOFF); 252 mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME3(band), 253 MT_WF_RMAC_MIB_QOS01_BACKOFF); 254 mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME4(band), 255 MT_WF_RMAC_MIB_QOS23_BACKOFF); 256 257 /* clear backoff time and set software compensation for OBSS time */ 258 mask = MT_WF_RMAC_MIB_OBSS_BACKOFF | MT_WF_RMAC_MIB_ED_OFFSET; 259 set = FIELD_PREP(MT_WF_RMAC_MIB_OBSS_BACKOFF, 0) | 260 FIELD_PREP(MT_WF_RMAC_MIB_ED_OFFSET, 4); 261 mt76_rmw(dev, MT_WF_RMAC_MIB_AIRTIME0(band), mask, set); 262 263 /* filter out non-resp frames and get instanstaeous signal reporting */ 264 mask = MT_WTBLOFF_RSCR_RCPI_MODE | MT_WTBLOFF_RSCR_RCPI_PARAM; 265 set = FIELD_PREP(MT_WTBLOFF_RSCR_RCPI_MODE, 0) | 266 FIELD_PREP(MT_WTBLOFF_RSCR_RCPI_PARAM, 0x3); 267 mt76_rmw(dev, MT_WTBLOFF_RSCR(band), mask, set); 268 } 269 270 static void mt7996_mac_init_basic_rates(struct mt7996_dev *dev) 271 { 272 int i; 273 274 for (i = 0; i < ARRAY_SIZE(mt76_rates); i++) { 275 u16 rate = mt76_rates[i].hw_value; 276 u16 idx = MT7996_BASIC_RATES_TBL + i; 277 278 rate = FIELD_PREP(MT_TX_RATE_MODE, rate >> 8) | 279 FIELD_PREP(MT_TX_RATE_IDX, rate & GENMASK(7, 0)); 280 mt7996_mac_set_fixed_rate_table(dev, idx, rate); 281 } 282 } 283 284 void mt7996_mac_init(struct mt7996_dev *dev) 285 { 286 #define HIF_TXD_V2_1 4 287 int i; 288 289 mt76_clear(dev, MT_MDP_DCR2, MT_MDP_DCR2_RX_TRANS_SHORT); 290 291 for (i = 0; i < mt7996_wtbl_size(dev); i++) 292 mt7996_mac_wtbl_update(dev, i, 293 MT_WTBL_UPDATE_ADM_COUNT_CLEAR); 294 295 if (IS_ENABLED(CONFIG_MT76_LEDS)) { 296 i = dev->mphy.leds.pin ? MT_LED_GPIO_MUX3 : MT_LED_GPIO_MUX2; 297 mt76_rmw_field(dev, i, MT_LED_GPIO_SEL_MASK, 4); 298 } 299 300 /* txs report queue */ 301 mt76_rmw_field(dev, MT_DMA_TCRF1(0), MT_DMA_TCRF1_QIDX, 0); 302 mt76_rmw_field(dev, MT_DMA_TCRF1(1), MT_DMA_TCRF1_QIDX, 6); 303 mt76_rmw_field(dev, MT_DMA_TCRF1(2), MT_DMA_TCRF1_QIDX, 0); 304 305 /* rro module init */ 306 mt7996_mcu_set_rro(dev, UNI_RRO_SET_PLATFORM_TYPE, 2); 307 mt7996_mcu_set_rro(dev, UNI_RRO_SET_BYPASS_MODE, 3); 308 mt7996_mcu_set_rro(dev, UNI_RRO_SET_TXFREE_PATH, 1); 309 310 mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), 311 MCU_WA_PARAM_HW_PATH_HIF_VER, 312 HIF_TXD_V2_1, 0); 313 314 for (i = MT_BAND0; i <= MT_BAND2; i++) 315 mt7996_mac_init_band(dev, i); 316 317 mt7996_mac_init_basic_rates(dev); 318 } 319 320 int mt7996_txbf_init(struct mt7996_dev *dev) 321 { 322 int ret; 323 324 if (dev->dbdc_support) { 325 ret = mt7996_mcu_set_txbf(dev, BF_MOD_EN_CTRL); 326 if (ret) 327 return ret; 328 } 329 330 /* trigger sounding packets */ 331 ret = mt7996_mcu_set_txbf(dev, BF_SOUNDING_ON); 332 if (ret) 333 return ret; 334 335 /* enable eBF */ 336 return mt7996_mcu_set_txbf(dev, BF_HW_EN_UPDATE); 337 } 338 339 static int mt7996_register_phy(struct mt7996_dev *dev, struct mt7996_phy *phy, 340 enum mt76_band_id band) 341 { 342 struct mt76_phy *mphy; 343 u32 mac_ofs, hif1_ofs = 0; 344 int ret; 345 346 if (band != MT_BAND1 && band != MT_BAND2) 347 return 0; 348 349 if ((band == MT_BAND1 && !dev->dbdc_support) || 350 (band == MT_BAND2 && !dev->tbtc_support)) 351 return 0; 352 353 if (phy) 354 return 0; 355 356 if (band == MT_BAND2 && dev->hif2) 357 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); 358 359 mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7996_ops, band); 360 if (!mphy) 361 return -ENOMEM; 362 363 phy = mphy->priv; 364 phy->dev = dev; 365 phy->mt76 = mphy; 366 mphy->dev->phys[band] = mphy; 367 368 INIT_DELAYED_WORK(&mphy->mac_work, mt7996_mac_work); 369 370 ret = mt7996_eeprom_parse_hw_cap(dev, phy); 371 if (ret) 372 goto error; 373 374 mac_ofs = band == MT_BAND2 ? MT_EE_MAC_ADDR3 : MT_EE_MAC_ADDR2; 375 #if defined(__linux__) 376 memcpy(mphy->macaddr, dev->mt76.eeprom.data + mac_ofs, ETH_ALEN); 377 #elif defined(__FreeBSD__) 378 memcpy(mphy->macaddr, (u8 *)dev->mt76.eeprom.data + mac_ofs, ETH_ALEN); 379 #endif 380 /* Make the extra PHY MAC address local without overlapping with 381 * the usual MAC address allocation scheme on multiple virtual interfaces 382 */ 383 if (!is_valid_ether_addr(mphy->macaddr)) { 384 #if defined(__linux__) 385 memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR, 386 #elif defined(__FreeBSD__) 387 memcpy(mphy->macaddr, (u8 *)dev->mt76.eeprom.data + MT_EE_MAC_ADDR, 388 #endif 389 ETH_ALEN); 390 mphy->macaddr[0] |= 2; 391 mphy->macaddr[0] ^= BIT(7); 392 if (band == MT_BAND2) 393 mphy->macaddr[0] ^= BIT(6); 394 } 395 mt76_eeprom_override(mphy); 396 397 /* init wiphy according to mphy and phy */ 398 mt7996_init_wiphy(mphy->hw); 399 ret = mt76_connac_init_tx_queues(phy->mt76, 400 MT_TXQ_ID(band), 401 MT7996_TX_RING_SIZE, 402 MT_TXQ_RING_BASE(band) + hif1_ofs, 0); 403 if (ret) 404 goto error; 405 406 ret = mt76_register_phy(mphy, true, mt76_rates, 407 ARRAY_SIZE(mt76_rates)); 408 if (ret) 409 goto error; 410 411 ret = mt7996_init_debugfs(phy); 412 if (ret) 413 goto error; 414 415 return 0; 416 417 error: 418 mphy->dev->phys[band] = NULL; 419 ieee80211_free_hw(mphy->hw); 420 return ret; 421 } 422 423 static void 424 mt7996_unregister_phy(struct mt7996_phy *phy, enum mt76_band_id band) 425 { 426 struct mt76_phy *mphy; 427 428 if (!phy) 429 return; 430 431 mphy = phy->dev->mt76.phys[band]; 432 mt76_unregister_phy(mphy); 433 ieee80211_free_hw(mphy->hw); 434 phy->dev->mt76.phys[band] = NULL; 435 } 436 437 static void mt7996_init_work(struct work_struct *work) 438 { 439 struct mt7996_dev *dev = container_of(work, struct mt7996_dev, 440 init_work); 441 442 mt7996_mcu_set_eeprom(dev); 443 mt7996_mac_init(dev); 444 mt7996_init_txpower(dev, &dev->mphy.sband_2g.sband); 445 mt7996_init_txpower(dev, &dev->mphy.sband_5g.sband); 446 mt7996_init_txpower(dev, &dev->mphy.sband_6g.sband); 447 mt7996_txbf_init(dev); 448 } 449 450 void mt7996_wfsys_reset(struct mt7996_dev *dev) 451 { 452 mt76_set(dev, MT_WF_SUBSYS_RST, 0x1); 453 msleep(20); 454 455 mt76_clear(dev, MT_WF_SUBSYS_RST, 0x1); 456 msleep(20); 457 } 458 459 static int mt7996_init_hardware(struct mt7996_dev *dev) 460 { 461 int ret, idx; 462 463 mt76_wr(dev, MT_INT_SOURCE_CSR, ~0); 464 465 INIT_WORK(&dev->init_work, mt7996_init_work); 466 467 dev->dbdc_support = true; 468 dev->tbtc_support = true; 469 470 ret = mt7996_dma_init(dev); 471 if (ret) 472 return ret; 473 474 set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); 475 476 ret = mt7996_mcu_init(dev); 477 if (ret) 478 return ret; 479 480 ret = mt7996_eeprom_init(dev); 481 if (ret < 0) 482 return ret; 483 484 /* Beacon and mgmt frames should occupy wcid 0 */ 485 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7996_WTBL_STA); 486 if (idx) 487 return -ENOSPC; 488 489 dev->mt76.global_wcid.idx = idx; 490 dev->mt76.global_wcid.hw_key_idx = -1; 491 dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET; 492 rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid); 493 494 return 0; 495 } 496 497 void mt7996_set_stream_vht_txbf_caps(struct mt7996_phy *phy) 498 { 499 int sts; 500 u32 *cap; 501 502 if (!phy->mt76->cap.has_5ghz) 503 return; 504 505 sts = hweight16(phy->mt76->chainmask); 506 cap = &phy->mt76->sband_5g.sband.vht_cap.cap; 507 508 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE | 509 IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE | 510 FIELD_PREP(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK, sts - 1); 511 512 *cap &= ~(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK | 513 IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE | 514 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE); 515 516 if (sts < 2) 517 return; 518 519 *cap |= IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE | 520 IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE | 521 FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK, sts - 1); 522 } 523 524 static void 525 mt7996_set_stream_he_txbf_caps(struct mt7996_phy *phy, 526 struct ieee80211_sta_he_cap *he_cap, int vif) 527 { 528 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem; 529 int sts = hweight16(phy->mt76->chainmask); 530 u8 c; 531 532 #ifdef CONFIG_MAC80211_MESH 533 if (vif == NL80211_IFTYPE_MESH_POINT) 534 return; 535 #endif 536 537 elem->phy_cap_info[3] &= ~IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER; 538 elem->phy_cap_info[4] &= ~IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER; 539 540 c = IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK | 541 IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK; 542 elem->phy_cap_info[5] &= ~c; 543 544 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 545 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB; 546 elem->phy_cap_info[6] &= ~c; 547 548 elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK; 549 550 c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US | 551 IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO | 552 IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO; 553 elem->phy_cap_info[2] |= c; 554 555 c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE | 556 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4 | 557 IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4; 558 elem->phy_cap_info[4] |= c; 559 560 /* do not support NG16 due to spec D4.0 changes subcarrier idx */ 561 c = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU | 562 IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU; 563 564 if (vif == NL80211_IFTYPE_STATION) 565 c |= IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO; 566 567 elem->phy_cap_info[6] |= c; 568 569 if (sts < 2) 570 return; 571 572 /* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */ 573 elem->phy_cap_info[7] |= min_t(int, sts - 1, 2) << 3; 574 575 if (vif != NL80211_IFTYPE_AP) 576 return; 577 578 elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER; 579 elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER; 580 581 c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, 582 sts - 1) | 583 FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, 584 sts - 1); 585 elem->phy_cap_info[5] |= c; 586 587 c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | 588 IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB; 589 elem->phy_cap_info[6] |= c; 590 591 c = IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ | 592 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ; 593 elem->phy_cap_info[7] |= c; 594 } 595 596 static void 597 mt7996_init_he_caps(struct mt7996_phy *phy, enum nl80211_band band, 598 struct ieee80211_sband_iftype_data *data, 599 enum nl80211_iftype iftype) 600 { 601 struct ieee80211_sta_he_cap *he_cap = &data->he_cap; 602 struct ieee80211_he_cap_elem *he_cap_elem = &he_cap->he_cap_elem; 603 struct ieee80211_he_mcs_nss_supp *he_mcs = &he_cap->he_mcs_nss_supp; 604 int i, nss = hweight8(phy->mt76->antenna_mask); 605 u16 mcs_map = 0; 606 607 for (i = 0; i < 8; i++) { 608 if (i < nss) 609 mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2)); 610 else 611 mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2)); 612 } 613 614 he_cap->has_he = true; 615 616 he_cap_elem->mac_cap_info[0] = IEEE80211_HE_MAC_CAP0_HTC_HE; 617 he_cap_elem->mac_cap_info[3] = IEEE80211_HE_MAC_CAP3_OMI_CONTROL | 618 IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3; 619 he_cap_elem->mac_cap_info[4] = IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU; 620 621 if (band == NL80211_BAND_2GHZ) 622 he_cap_elem->phy_cap_info[0] = 623 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G; 624 else 625 he_cap_elem->phy_cap_info[0] = 626 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | 627 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G; 628 629 he_cap_elem->phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD; 630 he_cap_elem->phy_cap_info[2] = IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ | 631 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ; 632 633 switch (iftype) { 634 case NL80211_IFTYPE_AP: 635 he_cap_elem->mac_cap_info[0] |= IEEE80211_HE_MAC_CAP0_TWT_RES; 636 he_cap_elem->mac_cap_info[2] |= IEEE80211_HE_MAC_CAP2_BSR; 637 he_cap_elem->mac_cap_info[4] |= IEEE80211_HE_MAC_CAP4_BQR; 638 he_cap_elem->mac_cap_info[5] |= 639 IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX; 640 he_cap_elem->phy_cap_info[3] |= 641 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK | 642 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK; 643 he_cap_elem->phy_cap_info[6] |= 644 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE | 645 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT; 646 he_cap_elem->phy_cap_info[9] |= 647 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 648 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU; 649 break; 650 case NL80211_IFTYPE_STATION: 651 he_cap_elem->mac_cap_info[1] |= 652 IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US; 653 654 if (band == NL80211_BAND_2GHZ) 655 he_cap_elem->phy_cap_info[0] |= 656 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G; 657 else 658 he_cap_elem->phy_cap_info[0] |= 659 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G; 660 661 he_cap_elem->phy_cap_info[1] |= 662 IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A | 663 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US; 664 he_cap_elem->phy_cap_info[3] |= 665 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK | 666 IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK; 667 he_cap_elem->phy_cap_info[6] |= 668 IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB | 669 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE | 670 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT; 671 he_cap_elem->phy_cap_info[7] |= 672 IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP | 673 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI; 674 he_cap_elem->phy_cap_info[8] |= 675 IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G | 676 IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU | 677 IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU | 678 IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_484; 679 he_cap_elem->phy_cap_info[9] |= 680 IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM | 681 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK | 682 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU | 683 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU | 684 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB | 685 IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB; 686 break; 687 default: 688 break; 689 } 690 691 he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map); 692 he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map); 693 he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map); 694 he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map); 695 696 mt7996_set_stream_he_txbf_caps(phy, he_cap, iftype); 697 698 memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres)); 699 if (he_cap_elem->phy_cap_info[6] & 700 IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) { 701 mt76_connac_gen_ppe_thresh(he_cap->ppe_thres, nss); 702 } else { 703 he_cap_elem->phy_cap_info[9] |= 704 u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US, 705 IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK); 706 } 707 708 if (band == NL80211_BAND_6GHZ) { 709 u16 cap = IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS | 710 IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS; 711 712 cap |= u16_encode_bits(IEEE80211_HT_MPDU_DENSITY_0_5, 713 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) | 714 u16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K, 715 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) | 716 u16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454, 717 IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN); 718 719 data->he_6ghz_capa.capa = cpu_to_le16(cap); 720 } 721 } 722 723 static void 724 mt7996_init_eht_caps(struct mt7996_phy *phy, enum nl80211_band band, 725 struct ieee80211_sband_iftype_data *data, 726 enum nl80211_iftype iftype) 727 { 728 struct ieee80211_sta_eht_cap *eht_cap = &data->eht_cap; 729 struct ieee80211_eht_cap_elem_fixed *eht_cap_elem = &eht_cap->eht_cap_elem; 730 struct ieee80211_eht_mcs_nss_supp *eht_nss = &eht_cap->eht_mcs_nss_supp; 731 enum nl80211_chan_width width = phy->mt76->chandef.width; 732 int nss = hweight8(phy->mt76->antenna_mask); 733 int sts = hweight16(phy->mt76->chainmask); 734 u8 val; 735 736 if (!phy->dev->has_eht) 737 return; 738 739 eht_cap->has_eht = true; 740 741 eht_cap_elem->mac_cap_info[0] = 742 IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS | 743 IEEE80211_EHT_MAC_CAP0_OM_CONTROL; 744 745 eht_cap_elem->phy_cap_info[0] = 746 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ | 747 IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI | 748 IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMER | 749 IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE; 750 751 eht_cap_elem->phy_cap_info[0] |= 752 u8_encode_bits(u8_get_bits(sts - 1, BIT(0)), 753 IEEE80211_EHT_PHY_CAP0_BEAMFORMEE_SS_80MHZ_MASK); 754 755 eht_cap_elem->phy_cap_info[1] = 756 u8_encode_bits(u8_get_bits(sts - 1, GENMASK(2, 1)), 757 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_80MHZ_MASK) | 758 u8_encode_bits(sts - 1, 759 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_160MHZ_MASK) | 760 u8_encode_bits(sts - 1, 761 IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_320MHZ_MASK); 762 763 eht_cap_elem->phy_cap_info[2] = 764 u8_encode_bits(sts - 1, IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_80MHZ_MASK) | 765 u8_encode_bits(sts - 1, IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_160MHZ_MASK) | 766 u8_encode_bits(sts - 1, IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_320MHZ_MASK); 767 768 eht_cap_elem->phy_cap_info[3] = 769 IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK | 770 IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK | 771 IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK | 772 IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK | 773 IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK | 774 IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK | 775 IEEE80211_EHT_PHY_CAP3_TRIG_CQI_FDBK; 776 777 eht_cap_elem->phy_cap_info[4] = 778 u8_encode_bits(min_t(int, sts - 1, 2), 779 IEEE80211_EHT_PHY_CAP4_MAX_NC_MASK); 780 781 eht_cap_elem->phy_cap_info[5] = 782 IEEE80211_EHT_PHY_CAP5_NON_TRIG_CQI_FEEDBACK | 783 u8_encode_bits(IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_16US, 784 IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK) | 785 u8_encode_bits(u8_get_bits(0x11, GENMASK(1, 0)), 786 IEEE80211_EHT_PHY_CAP5_MAX_NUM_SUPP_EHT_LTF_MASK); 787 788 val = width == NL80211_CHAN_WIDTH_320 ? 0xf : 789 width == NL80211_CHAN_WIDTH_160 ? 0x7 : 790 width == NL80211_CHAN_WIDTH_80 ? 0x3 : 0x1; 791 eht_cap_elem->phy_cap_info[6] = 792 u8_encode_bits(u8_get_bits(0x11, GENMASK(4, 2)), 793 IEEE80211_EHT_PHY_CAP6_MAX_NUM_SUPP_EHT_LTF_MASK) | 794 u8_encode_bits(val, IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK); 795 796 eht_cap_elem->phy_cap_info[7] = 797 IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_80MHZ | 798 IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_160MHZ | 799 IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_320MHZ | 800 IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_80MHZ | 801 IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_160MHZ | 802 IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_320MHZ; 803 804 val = u8_encode_bits(nss, IEEE80211_EHT_MCS_NSS_RX) | 805 u8_encode_bits(nss, IEEE80211_EHT_MCS_NSS_TX); 806 #define SET_EHT_MAX_NSS(_bw, _val) do { \ 807 eht_nss->bw._##_bw.rx_tx_mcs9_max_nss = _val; \ 808 eht_nss->bw._##_bw.rx_tx_mcs11_max_nss = _val; \ 809 eht_nss->bw._##_bw.rx_tx_mcs13_max_nss = _val; \ 810 } while (0) 811 812 SET_EHT_MAX_NSS(80, val); 813 SET_EHT_MAX_NSS(160, val); 814 SET_EHT_MAX_NSS(320, val); 815 #undef SET_EHT_MAX_NSS 816 } 817 818 static void 819 __mt7996_set_stream_he_eht_caps(struct mt7996_phy *phy, 820 struct ieee80211_supported_band *sband, 821 enum nl80211_band band) 822 { 823 struct ieee80211_sband_iftype_data *data = phy->iftype[band]; 824 int i, n = 0; 825 826 for (i = 0; i < NUM_NL80211_IFTYPES; i++) { 827 switch (i) { 828 case NL80211_IFTYPE_STATION: 829 case NL80211_IFTYPE_AP: 830 #ifdef CONFIG_MAC80211_MESH 831 case NL80211_IFTYPE_MESH_POINT: 832 #endif 833 break; 834 default: 835 continue; 836 } 837 838 data[n].types_mask = BIT(i); 839 mt7996_init_he_caps(phy, band, &data[n], i); 840 mt7996_init_eht_caps(phy, band, &data[n], i); 841 842 n++; 843 } 844 845 sband->iftype_data = data; 846 sband->n_iftype_data = n; 847 } 848 849 void mt7996_set_stream_he_eht_caps(struct mt7996_phy *phy) 850 { 851 if (phy->mt76->cap.has_2ghz) 852 __mt7996_set_stream_he_eht_caps(phy, &phy->mt76->sband_2g.sband, 853 NL80211_BAND_2GHZ); 854 855 if (phy->mt76->cap.has_5ghz) 856 __mt7996_set_stream_he_eht_caps(phy, &phy->mt76->sband_5g.sband, 857 NL80211_BAND_5GHZ); 858 859 if (phy->mt76->cap.has_6ghz) 860 __mt7996_set_stream_he_eht_caps(phy, &phy->mt76->sband_6g.sband, 861 NL80211_BAND_6GHZ); 862 } 863 864 int mt7996_register_device(struct mt7996_dev *dev) 865 { 866 struct ieee80211_hw *hw = mt76_hw(dev); 867 int ret; 868 869 dev->phy.dev = dev; 870 dev->phy.mt76 = &dev->mt76.phy; 871 dev->mt76.phy.priv = &dev->phy; 872 INIT_WORK(&dev->rc_work, mt7996_mac_sta_rc_work); 873 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7996_mac_work); 874 INIT_LIST_HEAD(&dev->sta_rc_list); 875 INIT_LIST_HEAD(&dev->twt_list); 876 877 init_waitqueue_head(&dev->reset_wait); 878 INIT_WORK(&dev->reset_work, mt7996_mac_reset_work); 879 INIT_WORK(&dev->dump_work, mt7996_mac_dump_work); 880 mutex_init(&dev->dump_mutex); 881 882 ret = mt7996_init_hardware(dev); 883 if (ret) 884 return ret; 885 886 mt7996_init_wiphy(hw); 887 888 /* init led callbacks */ 889 if (IS_ENABLED(CONFIG_MT76_LEDS)) { 890 dev->mphy.leds.cdev.brightness_set = mt7996_led_set_brightness; 891 dev->mphy.leds.cdev.blink_set = mt7996_led_set_blink; 892 } 893 894 ret = mt76_register_device(&dev->mt76, true, mt76_rates, 895 ARRAY_SIZE(mt76_rates)); 896 if (ret) 897 return ret; 898 899 ieee80211_queue_work(mt76_hw(dev), &dev->init_work); 900 901 ret = mt7996_register_phy(dev, mt7996_phy2(dev), MT_BAND1); 902 if (ret) 903 return ret; 904 905 ret = mt7996_register_phy(dev, mt7996_phy3(dev), MT_BAND2); 906 if (ret) 907 return ret; 908 909 dev->recovery.hw_init_done = true; 910 911 ret = mt7996_init_debugfs(&dev->phy); 912 if (ret) 913 return ret; 914 915 return mt7996_coredump_register(dev); 916 } 917 918 void mt7996_unregister_device(struct mt7996_dev *dev) 919 { 920 mt7996_unregister_phy(mt7996_phy3(dev), MT_BAND2); 921 mt7996_unregister_phy(mt7996_phy2(dev), MT_BAND1); 922 mt7996_coredump_unregister(dev); 923 mt76_unregister_device(&dev->mt76); 924 mt7996_mcu_exit(dev); 925 mt7996_tx_token_put(dev); 926 mt7996_dma_cleanup(dev); 927 tasklet_disable(&dev->mt76.irq_tasklet); 928 929 mt76_free_device(&dev->mt76); 930 } 931