18e93258fSBjoern A. Zeeb /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 28e93258fSBjoern A. Zeeb /* Copyright(c) 2019-2020 Realtek Corporation 38e93258fSBjoern A. Zeeb */ 48e93258fSBjoern A. Zeeb 58e93258fSBjoern A. Zeeb #ifndef __RTW89_8852A_H__ 68e93258fSBjoern A. Zeeb #define __RTW89_8852A_H__ 78e93258fSBjoern A. Zeeb 88e93258fSBjoern A. Zeeb #include "core.h" 98e93258fSBjoern A. Zeeb 108e93258fSBjoern A. Zeeb #define RF_PATH_NUM_8852A 2 118e93258fSBjoern A. Zeeb 128e93258fSBjoern A. Zeeb enum rtw8852a_pmac_mode { 138e93258fSBjoern A. Zeeb NONE_TEST, 148e93258fSBjoern A. Zeeb PKTS_TX, 158e93258fSBjoern A. Zeeb PKTS_RX, 168e93258fSBjoern A. Zeeb CONT_TX 178e93258fSBjoern A. Zeeb }; 188e93258fSBjoern A. Zeeb 198e93258fSBjoern A. Zeeb struct rtw8852au_efuse { 208e93258fSBjoern A. Zeeb u8 rsvd[0x38]; 218e93258fSBjoern A. Zeeb u8 mac_addr[ETH_ALEN]; 228e93258fSBjoern A. Zeeb }; 238e93258fSBjoern A. Zeeb 248e93258fSBjoern A. Zeeb struct rtw8852ae_efuse { 258e93258fSBjoern A. Zeeb u8 mac_addr[ETH_ALEN]; 268e93258fSBjoern A. Zeeb }; 278e93258fSBjoern A. Zeeb 288e93258fSBjoern A. Zeeb struct rtw8852a_tssi_offset { 298e93258fSBjoern A. Zeeb u8 cck_tssi[TSSI_CCK_CH_GROUP_NUM]; 308e93258fSBjoern A. Zeeb u8 bw40_tssi[TSSI_MCS_2G_CH_GROUP_NUM]; 318e93258fSBjoern A. Zeeb u8 rsvd[7]; 328e93258fSBjoern A. Zeeb u8 bw40_1s_tssi_5g[TSSI_MCS_5G_CH_GROUP_NUM]; 338e93258fSBjoern A. Zeeb } __packed; 348e93258fSBjoern A. Zeeb 358e93258fSBjoern A. Zeeb struct rtw8852a_efuse { 368e93258fSBjoern A. Zeeb u8 rsvd[0x210]; 378e93258fSBjoern A. Zeeb struct rtw8852a_tssi_offset path_a_tssi; 388e93258fSBjoern A. Zeeb u8 rsvd1[10]; 398e93258fSBjoern A. Zeeb struct rtw8852a_tssi_offset path_b_tssi; 408e93258fSBjoern A. Zeeb u8 rsvd2[94]; 418e93258fSBjoern A. Zeeb u8 channel_plan; 428e93258fSBjoern A. Zeeb u8 xtal_k; 438e93258fSBjoern A. Zeeb u8 rsvd3; 448e93258fSBjoern A. Zeeb u8 iqk_lck; 458e93258fSBjoern A. Zeeb u8 rsvd4[5]; 468e93258fSBjoern A. Zeeb u8 reg_setting:2; 478e93258fSBjoern A. Zeeb u8 tx_diversity:1; 488e93258fSBjoern A. Zeeb u8 rx_diversity:2; 498e93258fSBjoern A. Zeeb u8 ac_mode:1; 508e93258fSBjoern A. Zeeb u8 module_type:2; 518e93258fSBjoern A. Zeeb u8 rsvd5; 528e93258fSBjoern A. Zeeb u8 shared_ant:1; 538e93258fSBjoern A. Zeeb u8 coex_type:3; 548e93258fSBjoern A. Zeeb u8 ant_iso:1; 558e93258fSBjoern A. Zeeb u8 radio_on_off:1; 568e93258fSBjoern A. Zeeb u8 rsvd6:2; 578e93258fSBjoern A. Zeeb u8 eeprom_version; 588e93258fSBjoern A. Zeeb u8 customer_id; 598e93258fSBjoern A. Zeeb u8 tx_bb_swing_2g; 608e93258fSBjoern A. Zeeb u8 tx_bb_swing_5g; 618e93258fSBjoern A. Zeeb u8 tx_cali_pwr_trk_mode; 628e93258fSBjoern A. Zeeb u8 trx_path_selection; 638e93258fSBjoern A. Zeeb u8 rfe_type; 648e93258fSBjoern A. Zeeb u8 country_code[2]; 658e93258fSBjoern A. Zeeb u8 rsvd7[3]; 668e93258fSBjoern A. Zeeb u8 path_a_therm; 678e93258fSBjoern A. Zeeb u8 path_b_therm; 688e93258fSBjoern A. Zeeb u8 rsvd8[46]; 698e93258fSBjoern A. Zeeb u8 path_a_cck_pwr_idx[6]; 708e93258fSBjoern A. Zeeb u8 path_a_bw40_1tx_pwr_idx[5]; 718e93258fSBjoern A. Zeeb u8 path_a_ofdm_1tx_pwr_idx_diff:4; 728e93258fSBjoern A. Zeeb u8 path_a_bw20_1tx_pwr_idx_diff:4; 738e93258fSBjoern A. Zeeb u8 path_a_bw20_2tx_pwr_idx_diff:4; 748e93258fSBjoern A. Zeeb u8 path_a_bw40_2tx_pwr_idx_diff:4; 758e93258fSBjoern A. Zeeb u8 path_a_cck_2tx_pwr_idx_diff:4; 768e93258fSBjoern A. Zeeb u8 path_a_ofdm_2tx_pwr_idx_diff:4; 778e93258fSBjoern A. Zeeb u8 rsvd9[0xf2]; 788e93258fSBjoern A. Zeeb union { 798e93258fSBjoern A. Zeeb struct rtw8852au_efuse u; 808e93258fSBjoern A. Zeeb struct rtw8852ae_efuse e; 818e93258fSBjoern A. Zeeb }; 828e93258fSBjoern A. Zeeb } __packed; 838e93258fSBjoern A. Zeeb 848e93258fSBjoern A. Zeeb struct rtw8852a_bb_pmac_info { 858e93258fSBjoern A. Zeeb u8 en_pmac_tx:1; 868e93258fSBjoern A. Zeeb u8 is_cck:1; 878e93258fSBjoern A. Zeeb u8 mode:3; 888e93258fSBjoern A. Zeeb u8 rsvd:3; 898e93258fSBjoern A. Zeeb u16 tx_cnt; 908e93258fSBjoern A. Zeeb u16 period; 918e93258fSBjoern A. Zeeb u16 tx_time; 928e93258fSBjoern A. Zeeb u8 duty_cycle; 938e93258fSBjoern A. Zeeb }; 948e93258fSBjoern A. Zeeb 958e93258fSBjoern A. Zeeb extern const struct rtw89_chip_info rtw8852a_chip_info; 968e93258fSBjoern A. Zeeb 978e93258fSBjoern A. Zeeb void rtw8852a_bb_set_plcp_tx(struct rtw89_dev *rtwdev); 988e93258fSBjoern A. Zeeb void rtw8852a_bb_set_pmac_tx(struct rtw89_dev *rtwdev, 998e93258fSBjoern A. Zeeb struct rtw8852a_bb_pmac_info *tx_info, 1008e93258fSBjoern A. Zeeb enum rtw89_phy_idx idx); 1018e93258fSBjoern A. Zeeb void rtw8852a_bb_set_pmac_pkt_tx(struct rtw89_dev *rtwdev, u8 enable, 1028e93258fSBjoern A. Zeeb u16 tx_cnt, u16 period, u16 tx_time, 1038e93258fSBjoern A. Zeeb enum rtw89_phy_idx idx); 1048e93258fSBjoern A. Zeeb void rtw8852a_bb_set_power(struct rtw89_dev *rtwdev, s16 pwr_dbm, 1058e93258fSBjoern A. Zeeb enum rtw89_phy_idx idx); 1068e93258fSBjoern A. Zeeb void rtw8852a_bb_cfg_tx_path(struct rtw89_dev *rtwdev, u8 tx_path); 1078e93258fSBjoern A. Zeeb void rtw8852a_bb_tx_mode_switch(struct rtw89_dev *rtwdev, 1088e93258fSBjoern A. Zeeb enum rtw89_phy_idx idx, u8 mode); 1098e93258fSBjoern A. Zeeb 1108e93258fSBjoern A. Zeeb #endif 111