1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/arm/apple/apple,pmgr.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Apple SoC Power Manager (PMGR)
8
9maintainers:
10  - Hector Martin <marcan@marcan.st>
11
12description: |
13  Apple SoCs include PMGR blocks responsible for power management,
14  which can control various clocks, resets, power states, and
15  performance features. This node represents the PMGR as a syscon,
16  with sub-nodes representing individual features.
17
18properties:
19  $nodename:
20    pattern: "^power-management@[0-9a-f]+$"
21
22  compatible:
23    items:
24      - enum:
25          - apple,t8103-pmgr
26          - apple,t8112-pmgr
27          - apple,t6000-pmgr
28      - const: apple,pmgr
29      - const: syscon
30      - const: simple-mfd
31
32  reg:
33    maxItems: 1
34
35  "#address-cells":
36    const: 1
37
38  "#size-cells":
39    const: 1
40
41patternProperties:
42  "power-controller@[0-9a-f]+$":
43    description:
44      The individual power management domains within this controller
45    type: object
46    $ref: /schemas/power/apple,pmgr-pwrstate.yaml#
47
48required:
49  - compatible
50  - reg
51
52additionalProperties: false
53
54examples:
55  - |
56    soc {
57        #address-cells = <2>;
58        #size-cells = <2>;
59
60        power-management@23b700000 {
61            compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
62            #address-cells = <1>;
63            #size-cells = <1>;
64            reg = <0x2 0x3b700000 0x0 0x14000>;
65
66            ps_sio: power-controller@1c0 {
67                compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
68                reg = <0x1c0 8>;
69                #power-domain-cells = <0>;
70                #reset-cells = <0>;
71                label = "sio";
72                apple,always-on;
73            };
74
75            ps_uart_p: power-controller@220 {
76                compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
77                reg = <0x220 8>;
78                #power-domain-cells = <0>;
79                #reset-cells = <0>;
80                label = "uart_p";
81                power-domains = <&ps_sio>;
82            };
83
84            ps_uart0: power-controller@270 {
85                compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
86                reg = <0x270 8>;
87                #power-domain-cells = <0>;
88                #reset-cells = <0>;
89                label = "uart0";
90                power-domains = <&ps_uart_p>;
91            };
92        };
93
94        power-management@23d280000 {
95            compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
96            #address-cells = <1>;
97            #size-cells = <1>;
98            reg = <0x2 0x3d280000 0x0 0xc000>;
99
100            ps_aop_filter: power-controller@4000 {
101                compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
102                reg = <0x4000 8>;
103                #power-domain-cells = <0>;
104                #reset-cells = <0>;
105                label = "aop_filter";
106            };
107
108            ps_aop_base: power-controller@4010 {
109                compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
110                reg = <0x4010 8>;
111                #power-domain-cells = <0>;
112                #reset-cells = <0>;
113                label = "aop_base";
114                power-domains = <&ps_aop_filter>;
115            };
116
117            ps_aop_shim: power-controller@4038 {
118                compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
119                reg = <0x4038 8>;
120                #power-domain-cells = <0>;
121                #reset-cells = <0>;
122                label = "aop_shim";
123                power-domains = <&ps_aop_base>;
124            };
125
126            ps_aop_uart0: power-controller@4048 {
127                compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
128                reg = <0x4048 8>;
129                #power-domain-cells = <0>;
130                #reset-cells = <0>;
131                label = "aop_uart0";
132                power-domains = <&ps_aop_shim>;
133            };
134        };
135    };
136