1NVIDIA Tegra Power Management Controller (PMC)
2
3Required properties:
4- compatible: Should contain one of the following:
5  - "nvidia,tegra186-pmc": for Tegra186
6  - "nvidia,tegra194-pmc": for Tegra194
7  - "nvidia,tegra234-pmc": for Tegra234
8- reg: Must contain an (offset, length) pair of the register set for each
9  entry in reg-names.
10- reg-names: Must include the following entries:
11  - "pmc"
12  - "wake"
13  - "aotag"
14  - "scratch"
15  - "misc" (Only for Tegra194 and later)
16
17Optional properties:
18- nvidia,invert-interrupt: If present, inverts the PMU interrupt signal.
19- interrupt-controller: Identifies the node as an interrupt controller.
20- #interrupt-cells: Specifies the number of cells needed to encode an
21  interrupt source. The value must be 2.
22
23Example:
24
25SoC DTSI:
26
27	pmc@c3600000 {
28		compatible = "nvidia,tegra186-pmc";
29		reg = <0 0x0c360000 0 0x10000>,
30		      <0 0x0c370000 0 0x10000>,
31		      <0 0x0c380000 0 0x10000>,
32		      <0 0x0c390000 0 0x10000>;
33		reg-names = "pmc", "wake", "aotag", "scratch";
34	};
35
36Board DTS:
37
38	pmc@c360000 {
39		nvidia,invert-interrupt;
40	};
41
42== Pad Control ==
43
44On Tegra SoCs a pad is a set of pins which are configured as a group.
45The pin grouping is a fixed attribute of the hardware. The PMC can be
46used to set pad power state and signaling voltage. A pad can be either
47in active or power down mode. The support for power state and signaling
48voltage configuration varies depending on the pad in question. 3.3 V and
491.8 V signaling voltages are supported on pins where software
50controllable signaling voltage switching is available.
51
52Pad configurations are described with pin configuration nodes which
53are placed under the pmc node and they are referred to by the pinctrl
54client properties. For more information see
55Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
56
57The following pads are present on Tegra186:
58csia		csib		dsi		mipi-bias
59pex-clk-bias	pex-clk3	pex-clk2	pex-clk1
60usb0		usb1		usb2		usb-bias
61uart		audio		hsic		dbg
62hdmi-dp0	hdmi-dp1	pex-cntrl	sdmmc2-hv
63sdmmc4		cam		dsib		dsic
64dsid		csic		csid		csie
65dsif		spi		ufs		dmic-hv
66edp		sdmmc1-hv	sdmmc3-hv	conn
67audio-hv	ao-hv
68
69Required pin configuration properties:
70  - pins: A list of strings, each of which contains the name of a pad
71	  to be configured.
72
73Optional pin configuration properties:
74  - low-power-enable: Configure the pad into power down mode
75  - low-power-disable: Configure the pad into active mode
76  - power-source: Must contain either TEGRA_IO_PAD_VOLTAGE_1V8 or
77    TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages.
78    The values are defined in
79    include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.
80
81Note: The power state can be configured on all of the above pads except
82      for ao-hv. Following pads have software configurable signaling
83      voltages: sdmmc2-hv, dmic-hv, sdmmc1-hv, sdmmc3-hv, audio-hv,
84      ao-hv.
85
86Pad configuration state example:
87	pmc: pmc@7000e400 {
88		compatible = "nvidia,tegra186-pmc";
89		reg = <0 0x0c360000 0 0x10000>,
90		      <0 0x0c370000 0 0x10000>,
91		      <0 0x0c380000 0 0x10000>,
92		      <0 0x0c390000 0 0x10000>;
93		reg-names = "pmc", "wake", "aotag", "scratch";
94
95		...
96
97		sdmmc1_3v3: sdmmc1-3v3 {
98			pins = "sdmmc1-hv";
99			power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
100		};
101
102		sdmmc1_1v8: sdmmc1-1v8 {
103			pins = "sdmmc1-hv";
104			power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
105		};
106
107		hdmi_off: hdmi-off {
108			pins = "hdmi";
109			low-power-enable;
110		}
111
112		hdmi_on: hdmi-on {
113			pins = "hdmi";
114			low-power-disable;
115		}
116	};
117
118Pinctrl client example:
119	sdmmc1: sdhci@3400000 {
120		...
121		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
122		pinctrl-0 = <&sdmmc1_3v3>;
123		pinctrl-1 = <&sdmmc1_1v8>;
124	};
125
126	...
127
128	sor0: sor@15540000 {
129		...
130		pinctrl-0 = <&hdmi_off>;
131		pinctrl-1 = <&hdmi_on>;
132		pinctrl-names = "hdmi-on", "hdmi-off";
133	};
134